Hi,
Not tested, so please kindly test.
I am sending as RFC to gather some comments. If it looks good, I will
convert other TXT bindings to DT schema format.
Dependencies
============
1. The DTS patches (5-8) depend on scsi/ufs driver change (patch 4), so
they should go in a following release, after merging driver.
This is also might affect out-of-tree users of these DTSes (other
projects, e.g. U-boot).
Best regards,
Krzysztof
Krzysztof Kozlowski (8):
dt-bindings: ufs: add common platform bindings
dt-bindings: ufs: samsung,exynos-ufs: use common bindings
dt-bindings: ufs: cdns,ufshc: convert to dtschema
scsi: ufs: deprecate 'freq-table-hz' property
arm64: dts: hi3670: use 'freq-table' in UFS node
arm64: dts: exynos: use 'freq-table' in UFS node
arm64: dts: qcom: use 'freq-table' in UFS node
arm64: dts: ti: use 'freq-table' in UFS node
.../devicetree/bindings/ufs/cdns,ufshc.txt | 32 -------
.../devicetree/bindings/ufs/cdns,ufshc.yaml | 56 ++++++++++++
.../bindings/ufs/samsung,exynos-ufs.yaml | 10 +--
.../devicetree/bindings/ufs/ti,j721e-ufs.yaml | 2 +-
.../devicetree/bindings/ufs/ufs-common.yaml | 86 +++++++++++++++++++
.../devicetree/bindings/ufs/ufs-hisi.txt | 4 +-
MAINTAINERS | 1 +
arch/arm64/boot/dts/exynos/exynos7.dtsi | 3 +-
arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 3 +-
arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 4 +-
arch/arm64/boot/dts/qcom/msm8996.dtsi | 23 +++--
arch/arm64/boot/dts/qcom/msm8998.dtsi | 17 ++--
arch/arm64/boot/dts/qcom/sdm845.dtsi | 19 ++--
arch/arm64/boot/dts/qcom/sm8150.dtsi | 19 ++--
arch/arm64/boot/dts/qcom/sm8250.dtsi | 17 ++--
arch/arm64/boot/dts/qcom/sm8350.dtsi | 19 ++--
arch/arm64/boot/dts/qcom/sm8450.dtsi | 17 ++--
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 4 +-
drivers/scsi/ufs/ufshcd-pltfrm.c | 21 +++--
19 files changed, 234 insertions(+), 123 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
create mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
create mode 100644 Documentation/devicetree/bindings/ufs/ufs-common.yaml
--
2.32.0
The 'freq-table-hz' property is deprecated by UFS bindings.
The uint32-array requires also element to be passed within one <> block.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
index 636c8817df7e..0860c5688977 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
@@ -671,8 +671,8 @@ ufs: ufs@ff3c0000 {
clocks = <&crg_ctrl HI3670_CLK_GATE_UFSIO_REF>,
<&crg_ctrl HI3670_CLK_GATE_UFS_SUBSYS>;
clock-names = "ref_clk", "phy_clk";
- freq-table-hz = <0 0
- 0 0>;
+ freq-table = <0 0
+ 0 0>;
/* offset: 0x84; bit: 12 */
resets = <&crg_rst 0x84 12>;
reset-names = "rst";
--
2.32.0
Convert the Cadence Universal Flash Storage (UFS) Controlle to DT schema
format.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../devicetree/bindings/ufs/cdns,ufshc.txt | 32 -----------
.../devicetree/bindings/ufs/cdns,ufshc.yaml | 56 +++++++++++++++++++
2 files changed, 56 insertions(+), 32 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
create mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
diff --git a/Documentation/devicetree/bindings/ufs/cdns,ufshc.txt b/Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
deleted file mode 100644
index 02347b017abd..000000000000
--- a/Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
+++ /dev/null
@@ -1,32 +0,0 @@
-* Cadence Universal Flash Storage (UFS) Controller
-
-UFS nodes are defined to describe on-chip UFS host controllers.
-Each UFS controller instance should have its own node.
-Please see the ufshcd-pltfrm.txt for a list of all available properties.
-
-Required properties:
-- compatible : Compatible list, contains one of the following controllers:
- "cdns,ufshc" - Generic CDNS HCI,
- "cdns,ufshc-m31-16nm" - CDNS UFS HC + M31 16nm PHY
- complemented with the JEDEC version:
- "jedec,ufs-2.0"
-
-- reg : Address and length of the UFS register set.
-- interrupts : One interrupt mapping.
-- freq-table-hz : Clock frequency table.
- See the ufshcd-pltfrm.txt for details.
-- clocks : List of phandle and clock specifier pairs.
-- clock-names : List of clock input name strings sorted in the same
- order as the clocks property. "core_clk" is mandatory.
- Depending on a type of a PHY,
- the "phy_clk" clock can also be added, if needed.
-
-Example:
- ufs@fd030000 {
- compatible = "cdns,ufshc", "jedec,ufs-2.0";
- reg = <0xfd030000 0x10000>;
- interrupts = <0 1 IRQ_TYPE_LEVEL_HIGH>;
- freq-table-hz = <0 0>, <0 0>;
- clocks = <&ufs_core_clk>, <&ufs_phy_clk>;
- clock-names = "core_clk", "phy_clk";
- };
diff --git a/Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml b/Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
new file mode 100644
index 000000000000..68ae5663cd25
--- /dev/null
+++ b/Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
@@ -0,0 +1,56 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ufs/cdns,ufshc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cadence Universal Flash Storage (UFS) Controller
+
+maintainers:
+ - Jan Kotas <[email protected]>
+
+allOf:
+ - $ref: ufs-common.yaml
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - cdns,ufshc
+ # CDNS UFS HC + M31 16nm PHY
+ - cdns,ufshc-m31-16nm
+ - const: jedec,ufs-2.0
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ minItems: 1
+ maxItems: 3
+
+ clock-names:
+ items:
+ - const: core_clk
+ - const: phy_clk
+ - const: ref_clk
+
+required:
+ - compatible
+ - clocks
+ - clock-names
+ - reg
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ ufs@fd030000 {
+ compatible = "cdns,ufshc", "jedec,ufs-2.0";
+ reg = <0xfd030000 0x10000>;
+ interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+ freq-table = <0 0 0 0>;
+ clocks = <&ufs_core_clk>, <&ufs_phy_clk>;
+ clock-names = "core_clk", "phy_clk";
+ };
--
2.32.0
The 'freq-table-hz' property is deprecated by UFS bindings.
The uint32-array requires also element to be passed within one <> block.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm64/boot/dts/exynos/exynos7.dtsi | 3 ++-
arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi
index e38bb02a2152..beeca27a7415 100644
--- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
@@ -656,7 +656,8 @@ ufs: ufs@15570000 {
clocks = <&clock_fsys1 ACLK_UFS20_LINK>,
<&clock_fsys1 SCLK_UFSUNIPRO20_USER>;
clock-names = "core_clk", "sclk_unipro_main";
- freq-table-hz = <0 0>, <0 0>;
+ freq-table = <0 0
+ 0 0>;
pinctrl-names = "default";
pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>;
phys = <&ufs_phy>;
diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
index 807d500d6022..0d00543952c6 100644
--- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi
@@ -311,7 +311,8 @@ ufs_0: ufs0@17e00000 {
clocks = <&ufs_core_clock>,
<&ufs_core_clock>;
clock-names = "core_clk", "sclk_unipro_main";
- freq-table-hz = <0 0>, <0 0>;
+ freq-table = <0 0
+ 0 0>;
pinctrl-names = "default";
pinctrl-0 = <&ufs_rst_n &ufs_refclk_out>;
phys = <&ufs_0_phy>;
--
2.32.0
Add bindings for common parts (platform) of Universal Flash Storage
(UFS) Host Controllers in dtschema format.
The 'freq-table-hz' is not correct in dtschema, because '-hz' suffix
defines uint32 type, not an array. Therefore deprecate 'freq-table-hz'
and use 'freq-table' instead.
Include also the bindings directory in UFS maintainers entry.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../devicetree/bindings/ufs/ti,j721e-ufs.yaml | 2 +-
.../devicetree/bindings/ufs/ufs-common.yaml | 86 +++++++++++++++++++
.../devicetree/bindings/ufs/ufs-hisi.txt | 4 +-
MAINTAINERS | 1 +
4 files changed, 90 insertions(+), 3 deletions(-)
create mode 100644 Documentation/devicetree/bindings/ufs/ufs-common.yaml
diff --git a/Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml b/Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml
index 4d13e6bc1c50..dc93fe2d3458 100644
--- a/Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml
+++ b/Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml
@@ -80,7 +80,7 @@ examples:
compatible = "cdns,ufshc-m31-16nm", "jedec,ufs-2.0";
reg = <0x0 0x4000 0x0 0x10000>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
- freq-table-hz = <19200000 19200000>;
+ freq-table = <19200000 19200000>;
power-domains = <&k3_pds 277>;
clocks = <&k3_clks 277 1>;
assigned-clocks = <&k3_clks 277 1>;
diff --git a/Documentation/devicetree/bindings/ufs/ufs-common.yaml b/Documentation/devicetree/bindings/ufs/ufs-common.yaml
new file mode 100644
index 000000000000..66d0612b9991
--- /dev/null
+++ b/Documentation/devicetree/bindings/ufs/ufs-common.yaml
@@ -0,0 +1,86 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ufs/ufs-common.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Common properties for Universal Flash Storage (UFS) Host Controllers
+
+maintainers:
+ - Alim Akhtar <[email protected]>
+ - Avri Altman <[email protected]>
+
+properties:
+ clocks: true
+
+ clock-names: true
+
+ freq-table-hz:
+ deprecated: true
+ description:
+ Use freq-table.
+
+ freq-table:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ minItems: 2
+ maxItems: 64
+ description: |
+ Array of <min max> operating frequencies in Hz stored in the same order
+ as the clocks property. If this property is not defined or a value in the
+ array is "0" then it is assumed that the frequency is set by the parent
+ clock or a fixed rate clock source.
+
+ interrupts:
+ maxItems: 1
+
+ lanes-per-direction:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [1, 2]
+ default: 2
+ description:
+ Number of lanes available per direction. Note that it is assume same
+ number of lanes is used both directions at once.
+
+ vdd-hba-supply:
+ description:
+ Phandle to UFS host controller supply regulator node.
+
+ vcc-supply:
+ description:
+ Phandle to VCC supply regulator node.
+
+ vccq-supply:
+ description:
+ Phandle to VCCQ supply regulator node.
+
+ vccq2-supply:
+ description:
+ Phandle to VCCQ2 supply regulator node.
+
+ vcc-supply-1p8:
+ type: boolean
+ description:
+ For embedded UFS devices, valid VCC range is 1.7-1.95V or 2.7-3.6V. This
+ boolean property when set, specifies to use low voltage range of
+ 1.7-1.95V. Note for external UFS cards this property is invalid and valid
+ VCC range is always 2.7-3.6V.
+
+ vcc-max-microamp:
+ description:
+ Specifies max. load that can be drawn from VCC supply.
+
+ vccq-max-microamp:
+ description:
+ Specifies max. load that can be drawn from VCCQ supply.
+
+ vccq2-max-microamp:
+ description:
+ Specifies max. load that can be drawn from VCCQ2 supply.
+
+dependencies:
+ freq-table: [ 'clocks' ]
+
+required:
+ - interrupts
+
+additionalProperties: true
diff --git a/Documentation/devicetree/bindings/ufs/ufs-hisi.txt b/Documentation/devicetree/bindings/ufs/ufs-hisi.txt
index 0b83df1a5418..7e9cf4cff3d3 100644
--- a/Documentation/devicetree/bindings/ufs/ufs-hisi.txt
+++ b/Documentation/devicetree/bindings/ufs/ufs-hisi.txt
@@ -14,7 +14,7 @@ Required properties:
- clocks : List of phandle and clock specifier pairs
- clock-names : List of clock input name strings sorted in the same
order as the clocks property. "ref_clk", "phy_clk" is optional
-- freq-table-hz : Array of <min max> operating frequencies stored in the same
+- freq-table : Array of <min max> operating frequencies stored in the same
order as the clocks property. If this property is not
defined or a value in the array is "0" then it is assumed
that the frequency is set by the parent clock or a
@@ -35,7 +35,7 @@ Example:
clocks = <&crg_ctrl HI3660_CLK_GATE_UFSIO_REF>,
<&crg_ctrl HI3660_CLK_GATE_UFSPHY_CFG>;
clock-names = "ref_clk", "phy_clk";
- freq-table-hz = <0 0>, <0 0>;
+ freq-table = <0 0 0 0>;
/* offset: 0x84; bit: 12 */
resets = <&crg_rst 0x84 12>;
reset-names = "rst";
diff --git a/MAINTAINERS b/MAINTAINERS
index cae5b0c8400d..542174f434ce 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -20015,6 +20015,7 @@ R: Alim Akhtar <[email protected]>
R: Avri Altman <[email protected]>
L: [email protected]
S: Supported
+F: Documentation/devicetree/bindings/ufs/
F: Documentation/scsi/ufs.rst
F: drivers/scsi/ufs/
--
2.32.0
Use common UFS bindings in Samsung Exynos UFS to cover generic/common
properties in DTS.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
.../devicetree/bindings/ufs/samsung,exynos-ufs.yaml | 10 ++++------
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
index 95ac1c18334d..e01408b4fcc2 100644
--- a/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
+++ b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml
@@ -15,8 +15,10 @@ description: |
in the common ufshcd bindings
[1] Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
-properties:
+allOf:
+ - $ref: ufs-common.yaml
+properties:
compatible:
enum:
- samsung,exynos7-ufs
@@ -47,9 +49,6 @@ properties:
- const: core_clk
- const: sclk_unipro_main
- interrupts:
- maxItems: 1
-
phys:
maxItems: 1
@@ -67,13 +66,12 @@ properties:
required:
- compatible
- reg
- - interrupts
- phys
- phy-names
- clocks
- clock-names
-additionalProperties: false
+unevaluatedProperties: false
examples:
- |
--
2.32.0
The 'freq-table-hz' property is deprecated by UFS bindings.
The uint32-array requires also element to be passed within one <> block.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 23 +++++++++++------------
arch/arm64/boot/dts/qcom/msm8998.dtsi | 17 ++++++++---------
arch/arm64/boot/dts/qcom/sdm845.dtsi | 19 +++++++++----------
arch/arm64/boot/dts/qcom/sm8150.dtsi | 19 +++++++++----------
arch/arm64/boot/dts/qcom/sm8250.dtsi | 17 ++++++++---------
arch/arm64/boot/dts/qcom/sm8350.dtsi | 19 +++++++++----------
arch/arm64/boot/dts/qcom/sm8450.dtsi | 17 ++++++++---------
7 files changed, 62 insertions(+), 69 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index c85825ea1623..2d6ad6dfa0dd 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -1761,18 +1761,17 @@ ufshc: ufshc@624000 {
<&rpmcc RPM_SMD_LN_BB_CLK>,
<&gcc GCC_UFS_TX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_RX_SYMBOL_0_CLK>;
- freq-table-hz =
- <100000000 200000000>,
- <0 0>,
- <0 0>,
- <0 0>,
- <0 0>,
- <150000000 300000000>,
- <0 0>,
- <0 0>,
- <0 0>,
- <0 0>,
- <0 0>;
+ freq-table = <100000000 200000000
+ 0 0
+ 0 0
+ 0 0
+ 0 0
+ 150000000 300000000
+ 0 0
+ 0 0
+ 0 0
+ 0 0
+ 0 0>;
lanes-per-direction = <1>;
#reset-cells = <1>;
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index 2fda21e810c9..eee7bc35e468 100644
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -990,15 +990,14 @@ ufshc: ufshc@1da4000 {
<&gcc GCC_UFS_TX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_RX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_RX_SYMBOL_1_CLK>;
- freq-table-hz =
- <50000000 200000000>,
- <0 0>,
- <0 0>,
- <37500000 150000000>,
- <0 0>,
- <0 0>,
- <0 0>,
- <0 0>;
+ freq-table = <50000000 200000000
+ 0 0
+ 0 0
+ 37500000 150000000
+ 0 0
+ 0 0
+ 0 0
+ 0 0>;
resets = <&gcc GCC_UFS_BCR>;
reset-names = "rst";
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 0d6286d27dd4..987730032c0b 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -2274,16 +2274,15 @@ ufs_mem_hc: ufshc@1d84000 {
<&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>,
<&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
- freq-table-hz =
- <50000000 200000000>,
- <0 0>,
- <0 0>,
- <37500000 150000000>,
- <0 0>,
- <0 0>,
- <0 0>,
- <0 0>,
- <0 300000000>;
+ freq-table = <50000000 200000000
+ 0 0
+ 0 0
+ 37500000 150000000
+ 0 0
+ 0 0
+ 0 0
+ 0 0
+ 0 300000000>;
status = "disabled";
};
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index d15fee495238..3c5acf07337d 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -1782,16 +1782,15 @@ ufs_mem_hc: ufshc@1d84000 {
<&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>,
<&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
- freq-table-hz =
- <37500000 300000000>,
- <0 0>,
- <0 0>,
- <37500000 300000000>,
- <0 0>,
- <0 0>,
- <0 0>,
- <0 0>,
- <0 300000000>;
+ freq-table = <37500000 300000000
+ 0 0
+ 0 0
+ 37500000 300000000
+ 0 0
+ 0 0
+ 0 0
+ 0 0
+ 0 300000000>;
status = "disabled";
};
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index fdaf303ba047..308585cde3b0 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -2133,15 +2133,14 @@ ufs_mem_hc: ufshc@1d84000 {
<&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>;
- freq-table-hz =
- <37500000 300000000>,
- <0 0>,
- <0 0>,
- <37500000 300000000>,
- <0 0>,
- <0 0>,
- <0 0>,
- <0 0>;
+ freq-table = <37500000 300000000
+ 0 0
+ 0 0
+ 37500000 300000000
+ 0 0
+ 0 0
+ 0 0
+ 0 0>;
status = "disabled";
};
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index d242bab69c2e..526a328a9b7e 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -1935,16 +1935,15 @@ ufs_mem_hc: ufshc@1d84000 {
<&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>;
- freq-table-hz =
- <75000000 300000000>,
- <75000000 300000000>,
- <0 0>,
- <0 0>,
- <75000000 300000000>,
- <0 0>,
- <0 0>,
- <0 0>,
- <0 0>;
+ freq-table = <75000000 300000000
+ 75000000 300000000
+ 0 0
+ 0 0
+ 75000000 300000000
+ 0 0
+ 0 0
+ 0 0
+ 0 0>;
status = "disabled";
};
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 934e29b9e153..ed72dbdf3435 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -1398,15 +1398,14 @@ ufs_mem_hc: ufshc@1d84000 {
<&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>;
- freq-table-hz =
- <75000000 300000000>,
- <0 0>,
- <0 0>,
- <75000000 300000000>,
- <75000000 300000000>,
- <0 0>,
- <0 0>,
- <0 0>;
+ freq-table = <75000000 300000000
+ 0 0
+ 0 0
+ 75000000 300000000
+ 75000000 300000000
+ 0 0
+ 0 0
+ 0 0>;
status = "disabled";
};
--
2.32.0
On Sat, 19 Feb 2022 19:42:19 +0100, Krzysztof Kozlowski wrote:
> Convert the Cadence Universal Flash Storage (UFS) Controlle to DT schema
> format.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> ---
> .../devicetree/bindings/ufs/cdns,ufshc.txt | 32 -----------
> .../devicetree/bindings/ufs/cdns,ufshc.yaml | 56 +++++++++++++++++++
> 2 files changed, 56 insertions(+), 32 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
> create mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/ufs/cdns,ufshc.example.dt.yaml: ufs@fd030000: clock-names: ['core_clk', 'phy_clk'] is too short
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/ufs/ti,j721e-ufs.example.dt.yaml: ufs@4000: clock-names: ['core_clk'] is too short
From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
doc reference errors (make refcheckdocs):
Warning: Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml references a file that doesn't exist: Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml: Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
See https://patchwork.ozlabs.org/patch/1595072
This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
The 'freq-table-hz' is not correct in DT schema, because '-hz' suffix
defines uint32 type, not an array. Therefore deprecate 'freq-table-hz'
and use 'freq-table' instead.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
drivers/scsi/ufs/ufshcd-pltfrm.c | 21 +++++++++++++--------
1 file changed, 13 insertions(+), 8 deletions(-)
diff --git a/drivers/scsi/ufs/ufshcd-pltfrm.c b/drivers/scsi/ufs/ufshcd-pltfrm.c
index 87975d1a21c8..2b192477d158 100644
--- a/drivers/scsi/ufs/ufshcd-pltfrm.c
+++ b/drivers/scsi/ufs/ufshcd-pltfrm.c
@@ -47,8 +47,9 @@ static int ufshcd_parse_clock_info(struct ufs_hba *hba)
if (cnt <= 0)
goto out;
- if (!of_get_property(np, "freq-table-hz", &len)) {
- dev_info(dev, "freq-table-hz property not specified\n");
+ if (!of_get_property(np, "freq-table", &len) ||
+ !of_get_property(np, "freq-table-hz", &len)) {
+ dev_info(dev, "freq-table property not specified\n");
goto out;
}
@@ -57,7 +58,7 @@ static int ufshcd_parse_clock_info(struct ufs_hba *hba)
sz = len / sizeof(*clkfreq);
if (sz != 2 * cnt) {
- dev_err(dev, "%s len mismatch\n", "freq-table-hz");
+ dev_err(dev, "%s len mismatch\n", "freq-table");
ret = -EINVAL;
goto out;
}
@@ -69,12 +70,16 @@ static int ufshcd_parse_clock_info(struct ufs_hba *hba)
goto out;
}
- ret = of_property_read_u32_array(np, "freq-table-hz",
+ ret = of_property_read_u32_array(np, "freq-table",
clkfreq, sz);
if (ret && (ret != -EINVAL)) {
- dev_err(dev, "%s: error reading array %d\n",
- "freq-table-hz", ret);
- return ret;
+ ret = of_property_read_u32_array(np, "freq-table-hz",
+ clkfreq, sz);
+ if (ret && (ret != -EINVAL)) {
+ dev_err(dev, "%s: error reading array %d\n",
+ "freq-table", ret);
+ return ret;
+ }
}
for (i = 0; i < sz; i += 2) {
@@ -99,7 +104,7 @@ static int ufshcd_parse_clock_info(struct ufs_hba *hba)
if (!strcmp(name, "ref_clk"))
clki->keep_link_active = true;
- dev_dbg(dev, "%s: min %u max %u name %s\n", "freq-table-hz",
+ dev_dbg(dev, "%s: min %u max %u name %s\n", "freq-table",
clki->min_freq, clki->max_freq, clki->name);
list_add_tail(&clki->list, &hba->clk_list_head);
}
--
2.32.0
The 'freq-table-hz' property is deprecated by UFS bindings.
The uint32-array requires also element to be passed within one <> block.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index 599861259a30..c3afef0321ae 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -1257,7 +1257,9 @@ ufs@4e84000 {
compatible = "cdns,ufshc-m31-16nm", "jedec,ufs-2.0";
reg = <0x0 0x4e84000 0x0 0x10000>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
- freq-table-hz = <250000000 250000000>, <19200000 19200000>, <19200000 19200000>;
+ freq-table = <250000000 250000000
+ 19200000 19200000
+ 19200000 19200000>;
clocks = <&k3_clks 277 0>, <&k3_clks 277 1>, <&k3_clks 277 1>;
clock-names = "core_clk", "phy_clk", "ref_clk";
dma-coherent;
--
2.32.0
On 19/02/2022 19:42, Krzysztof Kozlowski wrote:
> Convert the Cadence Universal Flash Storage (UFS) Controlle to DT schema
> format.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> ---
> .../devicetree/bindings/ufs/cdns,ufshc.txt | 32 -----------
> .../devicetree/bindings/ufs/cdns,ufshc.yaml | 56 +++++++++++++++++++
> 2 files changed, 56 insertions(+), 32 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
> create mode 100644 Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
>
> diff --git a/Documentation/devicetree/bindings/ufs/cdns,ufshc.txt b/Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
> deleted file mode 100644
> index 02347b017abd..000000000000
> --- a/Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
> +++ /dev/null
> @@ -1,32 +0,0 @@
> -* Cadence Universal Flash Storage (UFS) Controller
> -
> -UFS nodes are defined to describe on-chip UFS host controllers.
> -Each UFS controller instance should have its own node.
> -Please see the ufshcd-pltfrm.txt for a list of all available properties.
> -
> -Required properties:
> -- compatible : Compatible list, contains one of the following controllers:
> - "cdns,ufshc" - Generic CDNS HCI,
> - "cdns,ufshc-m31-16nm" - CDNS UFS HC + M31 16nm PHY
> - complemented with the JEDEC version:
> - "jedec,ufs-2.0"
> -
> -- reg : Address and length of the UFS register set.
> -- interrupts : One interrupt mapping.
> -- freq-table-hz : Clock frequency table.
> - See the ufshcd-pltfrm.txt for details.
> -- clocks : List of phandle and clock specifier pairs.
> -- clock-names : List of clock input name strings sorted in the same
> - order as the clocks property. "core_clk" is mandatory.
> - Depending on a type of a PHY,
> - the "phy_clk" clock can also be added, if needed.
> -
> -Example:
> - ufs@fd030000 {
> - compatible = "cdns,ufshc", "jedec,ufs-2.0";
> - reg = <0xfd030000 0x10000>;
> - interrupts = <0 1 IRQ_TYPE_LEVEL_HIGH>;
> - freq-table-hz = <0 0>, <0 0>;
> - clocks = <&ufs_core_clk>, <&ufs_phy_clk>;
> - clock-names = "core_clk", "phy_clk";
> - };
> diff --git a/Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml b/Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
> new file mode 100644
> index 000000000000..68ae5663cd25
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
> @@ -0,0 +1,56 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/ufs/cdns,ufshc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Cadence Universal Flash Storage (UFS) Controller
> +
> +maintainers:
> + - Jan Kotas <[email protected]>
> +
This will require a "select:" to avoid clash with qcom (and maybe other)
schemas.
Best regards,
Krzysztof
On 21/02/2022 14:13, Nishanth Menon wrote:
> On 19:45-20220219, Krzysztof Kozlowski wrote:
>> The 'freq-table-hz' property is deprecated by UFS bindings.
>> The uint32-array requires also element to be passed within one <> block.
>>
>> Signed-off-by: Krzysztof Kozlowski <[email protected]>
>> ---
>> arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 4 +++-
>> 1 file changed, 3 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
>> index 599861259a30..c3afef0321ae 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
>> @@ -1257,7 +1257,9 @@ ufs@4e84000 {
>> compatible = "cdns,ufshc-m31-16nm", "jedec,ufs-2.0";
>> reg = <0x0 0x4e84000 0x0 0x10000>;
>> interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
>> - freq-table-hz = <250000000 250000000>, <19200000 19200000>, <19200000 19200000>;
>> + freq-table = <250000000 250000000
>
> <min max> is much more readable and less error prone in case of a large
> set.
Pairs are easily visible if split per line, so readability is similar.
Not much is lost.
>
>> + 19200000 19200000
>> + 19200000 19200000>;
>
> are you sure the removal of the tuple adds value?
DT schema requires it, or rather: I do not know how to express uint32
tuples in DT schema. All my tries failed.
Best regards,
Krzysztof
On 19:45-20220219, Krzysztof Kozlowski wrote:
> The 'freq-table-hz' property is deprecated by UFS bindings.
> The uint32-array requires also element to be passed within one <> block.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> ---
> arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> index 599861259a30..c3afef0321ae 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> @@ -1257,7 +1257,9 @@ ufs@4e84000 {
> compatible = "cdns,ufshc-m31-16nm", "jedec,ufs-2.0";
> reg = <0x0 0x4e84000 0x0 0x10000>;
> interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
> - freq-table-hz = <250000000 250000000>, <19200000 19200000>, <19200000 19200000>;
> + freq-table = <250000000 250000000
<min max> is much more readable and less error prone in case of a large
set.
> + 19200000 19200000
> + 19200000 19200000>;
are you sure the removal of the tuple adds value?
> clocks = <&k3_clks 277 0>, <&k3_clks 277 1>, <&k3_clks 277 1>;
> clock-names = "core_clk", "phy_clk", "ref_clk";
> dma-coherent;
> --
> 2.32.0
>
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D)/Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
On 22/02/2022 15:07, Nishanth Menon wrote:
> On 14:20-20220221, Krzysztof Kozlowski wrote:
>> On 21/02/2022 14:13, Nishanth Menon wrote:
>>> On 19:45-20220219, Krzysztof Kozlowski wrote:
>>>> The 'freq-table-hz' property is deprecated by UFS bindings.
>>>> The uint32-array requires also element to be passed within one <> block.
>>>>
>>>> Signed-off-by: Krzysztof Kozlowski <[email protected]>
>>>> ---
>>>> arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 4 +++-
>>>> 1 file changed, 3 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
>>>> index 599861259a30..c3afef0321ae 100644
>>>> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
>>>> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
>>>> @@ -1257,7 +1257,9 @@ ufs@4e84000 {
>>>> compatible = "cdns,ufshc-m31-16nm", "jedec,ufs-2.0";
>>>> reg = <0x0 0x4e84000 0x0 0x10000>;
>>>> interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
>>>> - freq-table-hz = <250000000 250000000>, <19200000 19200000>, <19200000 19200000>;
>>>> + freq-table = <250000000 250000000
>>>
>>> <min max> is much more readable and less error prone in case of a large
>>> set.
>>
>> Pairs are easily visible if split per line, so readability is similar.
>> Not much is lost.
>>
>>>
>>>> + 19200000 19200000
>>>> + 19200000 19200000>;
>>>
>>> are you sure the removal of the tuple adds value?
>>
>> DT schema requires it, or rather: I do not know how to express uint32
>> tuples in DT schema. All my tries failed.
>
> https://www.kernel.org/doc/Documentation/devicetree/bindings/opp/opp-v1.yaml
> comes to mind..
This works nice, thanks!
Best regards,
Krzysztof
On 14:20-20220221, Krzysztof Kozlowski wrote:
> On 21/02/2022 14:13, Nishanth Menon wrote:
> > On 19:45-20220219, Krzysztof Kozlowski wrote:
> >> The 'freq-table-hz' property is deprecated by UFS bindings.
> >> The uint32-array requires also element to be passed within one <> block.
> >>
> >> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> >> ---
> >> arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 4 +++-
> >> 1 file changed, 3 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> >> index 599861259a30..c3afef0321ae 100644
> >> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> >> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> >> @@ -1257,7 +1257,9 @@ ufs@4e84000 {
> >> compatible = "cdns,ufshc-m31-16nm", "jedec,ufs-2.0";
> >> reg = <0x0 0x4e84000 0x0 0x10000>;
> >> interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
> >> - freq-table-hz = <250000000 250000000>, <19200000 19200000>, <19200000 19200000>;
> >> + freq-table = <250000000 250000000
> >
> > <min max> is much more readable and less error prone in case of a large
> > set.
>
> Pairs are easily visible if split per line, so readability is similar.
> Not much is lost.
>
> >
> >> + 19200000 19200000
> >> + 19200000 19200000>;
> >
> > are you sure the removal of the tuple adds value?
>
> DT schema requires it, or rather: I do not know how to express uint32
> tuples in DT schema. All my tries failed.
https://www.kernel.org/doc/Documentation/devicetree/bindings/opp/opp-v1.yaml
comes to mind..
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D