Add support to runtime PM using SoundWire clock stop on supported instances
and bus reset on instances that require full reset.
Signed-off-by: Srinivas Kandagatla <[email protected]>
---
drivers/soundwire/qcom.c | 150 ++++++++++++++++++++++++++++++++++++++-
1 file changed, 149 insertions(+), 1 deletion(-)
diff --git a/drivers/soundwire/qcom.c b/drivers/soundwire/qcom.c
index 54813417ef8e..3b2eb95a7e96 100644
--- a/drivers/soundwire/qcom.c
+++ b/drivers/soundwire/qcom.c
@@ -11,6 +11,7 @@
#include <linux/of.h>
#include <linux/of_irq.h>
#include <linux/of_device.h>
+#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <linux/slab.h>
#include <linux/slimbus.h>
@@ -20,6 +21,9 @@
#include <sound/soc.h>
#include "bus.h"
+#define SWRM_COMP_SW_RESET 0x008
+#define SWRM_COMP_STATUS 0x014
+#define SWRM_FRM_GEN_ENABLED BIT(0)
#define SWRM_COMP_HW_VERSION 0x00
#define SWRM_COMP_CFG_ADDR 0x04
#define SWRM_COMP_CFG_IRQ_LEVEL_OR_PULSE_MSK BIT(1)
@@ -29,6 +33,7 @@
#define SWRM_COMP_PARAMS_RD_FIFO_DEPTH GENMASK(19, 15)
#define SWRM_COMP_PARAMS_DOUT_PORTS_MASK GENMASK(4, 0)
#define SWRM_COMP_PARAMS_DIN_PORTS_MASK GENMASK(9, 5)
+#define SWRM_COMP_MASTER_ID 0x104
#define SWRM_INTERRUPT_STATUS 0x200
#define SWRM_INTERRUPT_STATUS_RMSK GENMASK(16, 0)
#define SWRM_INTERRUPT_STATUS_SLAVE_PEND_IRQ BIT(0)
@@ -111,6 +116,13 @@
#define SWR_MAX_CMD_ID 14
#define MAX_FIFO_RD_RETRY 3
#define SWR_OVERFLOW_RETRY_COUNT 30
+#define SWRM_LINK_STATUS_RETRY_CNT 100
+
+enum {
+ MASTER_ID_WSA = 1,
+ MASTER_ID_RX,
+ MASTER_ID_TX
+};
struct qcom_swrm_port_config {
u8 si;
@@ -159,6 +171,7 @@ struct qcom_swrm_ctrl {
u32 slave_status;
u32 wr_fifo_depth;
u32 rd_fifo_depth;
+ bool clk_stop_bus_reset;
};
struct qcom_swrm_data {
@@ -497,6 +510,7 @@ static irqreturn_t qcom_swrm_irq_handler(int irq, void *dev_id)
u32 i;
int devnum;
int ret = IRQ_HANDLED;
+ clk_prepare_enable(swrm->hclk);
swrm->reg_read(swrm, SWRM_INTERRUPT_STATUS, &intr_sts);
intr_sts_masked = intr_sts & swrm->intr_mask;
@@ -604,6 +618,7 @@ static irqreturn_t qcom_swrm_irq_handler(int irq, void *dev_id)
intr_sts_masked = intr_sts & swrm->intr_mask;
} while (intr_sts_masked);
+ clk_disable_unprepare(swrm->hclk);
return ret;
}
@@ -1017,6 +1032,15 @@ static int qcom_swrm_startup(struct snd_pcm_substream *substream,
struct snd_soc_dai *codec_dai;
int ret, i;
+ ret = pm_runtime_get_sync(ctrl->dev);
+ if (ret < 0 && ret != -EACCES) {
+ dev_err_ratelimited(ctrl->dev,
+ "pm_runtime_get_sync failed in %s, ret %d\n",
+ __func__, ret);
+ pm_runtime_put_noidle(ctrl->dev);
+ return ret;
+ }
+
sruntime = sdw_alloc_stream(dai->name);
if (!sruntime)
return -ENOMEM;
@@ -1044,6 +1068,9 @@ static void qcom_swrm_shutdown(struct snd_pcm_substream *substream,
sdw_release_stream(ctrl->sruntime[dai->id]);
ctrl->sruntime[dai->id] = NULL;
+ pm_runtime_mark_last_busy(ctrl->dev);
+ pm_runtime_put_autosuspend(ctrl->dev);
+
}
static const struct snd_soc_dai_ops qcom_swrm_pdm_dai_ops = {
@@ -1197,12 +1224,23 @@ static int qcom_swrm_get_port_config(struct qcom_swrm_ctrl *ctrl)
static int swrm_reg_show(struct seq_file *s_file, void *data)
{
struct qcom_swrm_ctrl *swrm = s_file->private;
- int reg, reg_val;
+ int reg, reg_val, ret;
+
+ ret = pm_runtime_get_sync(swrm->dev);
+ if (ret < 0 && ret != -EACCES) {
+ dev_err_ratelimited(swrm->dev,
+ "pm_runtime_get_sync failed in %s, ret %d\n",
+ __func__, ret);
+ pm_runtime_put_noidle(swrm->dev);
+ }
for (reg = 0; reg <= SWR_MSTR_MAX_REG_ADDR; reg += 4) {
swrm->reg_read(swrm, reg, ®_val);
seq_printf(s_file, "0x%.3x: 0x%.2x\n", reg, reg_val);
}
+ pm_runtime_mark_last_busy(swrm->dev);
+ pm_runtime_put_autosuspend(swrm->dev);
+
return 0;
}
@@ -1267,6 +1305,7 @@ static int qcom_swrm_probe(struct platform_device *pdev)
ctrl->bus.ops = &qcom_swrm_ops;
ctrl->bus.port_ops = &qcom_swrm_port_ops;
ctrl->bus.compute_params = &qcom_swrm_compute_params;
+ ctrl->bus.clk_stop_timeout = 300;
ret = qcom_swrm_get_port_config(ctrl);
if (ret)
@@ -1319,6 +1358,21 @@ static int qcom_swrm_probe(struct platform_device *pdev)
(ctrl->version >> 24) & 0xff, (ctrl->version >> 16) & 0xff,
ctrl->version & 0xffff);
+ pm_runtime_set_autosuspend_delay(dev, 3000);
+ pm_runtime_use_autosuspend(dev);
+ pm_runtime_mark_last_busy(dev);
+ pm_runtime_set_active(dev);
+ pm_runtime_enable(dev);
+
+ /* Clk stop is not supported on WSA Soundwire masters */
+ if (ctrl->version <= 0x01030000) {
+ ctrl->clk_stop_bus_reset = true;
+ } else {
+ ctrl->reg_read(ctrl, SWRM_COMP_MASTER_ID, &val);
+ if (val == MASTER_ID_WSA)
+ ctrl->clk_stop_bus_reset = true;
+ }
+
#ifdef CONFIG_DEBUG_FS
ctrl->debugfs = debugfs_create_dir("qualcomm-sdw", ctrl->bus.debugfs);
debugfs_create_file("qualcomm-registers", 0400, ctrl->debugfs, ctrl,
@@ -1345,6 +1399,99 @@ static int qcom_swrm_remove(struct platform_device *pdev)
return 0;
}
+static bool swrm_wait_for_frame_gen_enabled(struct qcom_swrm_ctrl *swrm)
+{
+ int retry = SWRM_LINK_STATUS_RETRY_CNT;
+ int comp_sts;
+
+ do {
+ swrm->reg_read(swrm, SWRM_COMP_STATUS, &comp_sts);
+
+ if (comp_sts & SWRM_FRM_GEN_ENABLED)
+ return true;
+
+ usleep_range(500, 510);
+ } while (retry--);
+
+ dev_err(swrm->dev, "%s: link status not %s\n", __func__,
+ comp_sts && SWRM_FRM_GEN_ENABLED ? "connected" : "disconnected");
+
+ return false;
+}
+
+static int swrm_runtime_resume(struct device *dev)
+{
+ struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dev);
+ int ret;
+
+ clk_prepare_enable(ctrl->hclk);
+
+ if (ctrl->clk_stop_bus_reset) {
+ reinit_completion(&ctrl->enumeration);
+ ctrl->reg_write(ctrl, SWRM_COMP_SW_RESET, 0x01);
+ qcom_swrm_get_device_status(ctrl);
+ sdw_handle_slave_status(&ctrl->bus, ctrl->status);
+ qcom_swrm_init(ctrl);
+ wait_for_completion_timeout(&ctrl->enumeration,
+ msecs_to_jiffies(TIMEOUT_MS));
+ } else {
+ ctrl->reg_write(ctrl, SWRM_MCP_BUS_CTRL, SWRM_MCP_BUS_CLK_START);
+ ctrl->reg_write(ctrl, SWRM_INTERRUPT_CLEAR,
+ SWRM_INTERRUPT_STATUS_MASTER_CLASH_DET);
+
+ ctrl->intr_mask |= SWRM_INTERRUPT_STATUS_MASTER_CLASH_DET;
+ ctrl->reg_write(ctrl, SWRM_INTERRUPT_MASK_ADDR, ctrl->intr_mask);
+ ctrl->reg_write(ctrl, SWRM_INTERRUPT_CPU_EN, ctrl->intr_mask);
+
+ usleep_range(100, 105);
+ }
+
+ if (!swrm_wait_for_frame_gen_enabled(ctrl))
+ dev_err(ctrl->dev, "link failed to connect\n");
+
+ usleep_range(300, 305);
+ ret = sdw_bus_exit_clk_stop(&ctrl->bus);
+ if (ret < 0)
+ dev_err(ctrl->dev, "bus failed to exit clock stop %d\n", ret);
+
+ return 0;
+}
+
+static int __maybe_unused swrm_runtime_suspend(struct device *dev)
+{
+ struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dev);
+ int ret;
+
+ if (!ctrl->clk_stop_bus_reset) {
+ /* Mask bus clash interrupt */
+ ctrl->intr_mask &= ~SWRM_INTERRUPT_STATUS_MASTER_CLASH_DET;
+ ctrl->reg_write(ctrl, SWRM_INTERRUPT_MASK_ADDR, ctrl->intr_mask);
+ ctrl->reg_write(ctrl, SWRM_INTERRUPT_CPU_EN, ctrl->intr_mask);
+ }
+ /* Prepare slaves for clock stop */
+ ret = sdw_bus_prep_clk_stop(&ctrl->bus);
+ if (ret < 0) {
+ dev_err(dev, "prepare clock stop failed %d", ret);
+ return ret;
+ }
+
+ ret = sdw_bus_clk_stop(&ctrl->bus);
+ if (ret < 0 && ret != -ENODATA) {
+ dev_err(dev, "bus clock stop failed %d", ret);
+ return ret;
+ }
+
+ clk_disable_unprepare(ctrl->hclk);
+
+ usleep_range(300, 305);
+
+ return 0;
+}
+
+static const struct dev_pm_ops swrm_dev_pm_ops = {
+ SET_RUNTIME_PM_OPS(swrm_runtime_suspend, swrm_runtime_resume, NULL)
+};
+
static const struct of_device_id qcom_swrm_of_match[] = {
{ .compatible = "qcom,soundwire-v1.3.0", .data = &swrm_v1_3_data },
{ .compatible = "qcom,soundwire-v1.5.1", .data = &swrm_v1_5_data },
@@ -1359,6 +1506,7 @@ static struct platform_driver qcom_swrm_driver = {
.driver = {
.name = "qcom-soundwire",
.of_match_table = qcom_swrm_of_match,
+ .pm = &swrm_dev_pm_ops,
}
};
module_platform_driver(qcom_swrm_driver);
--
2.21.0
On 2/21/22 04:41, Srinivas Kandagatla wrote:
> Add support to runtime PM using SoundWire clock stop on supported instances
> and bus reset on instances that require full reset.
This commit message and code are a bit confusing, e.g. you have a
boolean state
ctrl->clk_stop_bus_reset = true;
Does this mean bus reset on exiting clock stop? or just that clock stop
is not supported and bus reset is required with complete re-enumeration.
It would be good to try and explain using SoundWire 1.x terminology what
actions are taken on resume.
> @@ -1267,6 +1305,7 @@ static int qcom_swrm_probe(struct platform_device *pdev)
> ctrl->bus.ops = &qcom_swrm_ops;
> ctrl->bus.port_ops = &qcom_swrm_port_ops;
> ctrl->bus.compute_params = &qcom_swrm_compute_params;
> + ctrl->bus.clk_stop_timeout = 300;
>
> ret = qcom_swrm_get_port_config(ctrl);
> if (ret)
> @@ -1319,6 +1358,21 @@ static int qcom_swrm_probe(struct platform_device *pdev)
> (ctrl->version >> 24) & 0xff, (ctrl->version >> 16) & 0xff,
> ctrl->version & 0xffff);
>
> + pm_runtime_set_autosuspend_delay(dev, 3000);
> + pm_runtime_use_autosuspend(dev);
> + pm_runtime_mark_last_busy(dev);
> + pm_runtime_set_active(dev);
> + pm_runtime_enable(dev);
> +
> + /* Clk stop is not supported on WSA Soundwire masters */
> + if (ctrl->version <= 0x01030000) {
> + ctrl->clk_stop_bus_reset = true;
> + } else {
> + ctrl->reg_read(ctrl, SWRM_COMP_MASTER_ID, &val);
> + if (val == MASTER_ID_WSA)
> + ctrl->clk_stop_bus_reset = true;
> + }
I think this means clock_stop_not_supported?
> +static int swrm_runtime_resume(struct device *dev)
> +{
> + struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dev);
> + int ret;
> +
> + clk_prepare_enable(ctrl->hclk);
> +
> + if (ctrl->clk_stop_bus_reset) {
> + reinit_completion(&ctrl->enumeration);
> + ctrl->reg_write(ctrl, SWRM_COMP_SW_RESET, 0x01);
> + qcom_swrm_get_device_status(ctrl);
don't you need some sort of delay before checking the controller and
device status? The bus reset sequence takes 4096 bits, that's a non-zero
time.
> + sdw_handle_slave_status(&ctrl->bus, ctrl->status);
> + qcom_swrm_init(ctrl);
> + wait_for_completion_timeout(&ctrl->enumeration,
> + msecs_to_jiffies(TIMEOUT_MS));
> + } else {
> + ctrl->reg_write(ctrl, SWRM_MCP_BUS_CTRL, SWRM_MCP_BUS_CLK_START);
> + ctrl->reg_write(ctrl, SWRM_INTERRUPT_CLEAR,
> + SWRM_INTERRUPT_STATUS_MASTER_CLASH_DET);
> +
> + ctrl->intr_mask |= SWRM_INTERRUPT_STATUS_MASTER_CLASH_DET;
> + ctrl->reg_write(ctrl, SWRM_INTERRUPT_MASK_ADDR, ctrl->intr_mask);
> + ctrl->reg_write(ctrl, SWRM_INTERRUPT_CPU_EN, ctrl->intr_mask);
> +
> + usleep_range(100, 105);
> + }
> +
> + if (!swrm_wait_for_frame_gen_enabled(ctrl))
> + dev_err(ctrl->dev, "link failed to connect\n");
> +
> + usleep_range(300, 305);
> + ret = sdw_bus_exit_clk_stop(&ctrl->bus);
> + if (ret < 0)
> + dev_err(ctrl->dev, "bus failed to exit clock stop %d\n", ret);
> +
> + return 0;
> +}
> +
> +static int __maybe_unused swrm_runtime_suspend(struct device *dev)
> +{
> + struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dev);
> + int ret;
> +
> + if (!ctrl->clk_stop_bus_reset) {
> + /* Mask bus clash interrupt */
> + ctrl->intr_mask &= ~SWRM_INTERRUPT_STATUS_MASTER_CLASH_DET;
> + ctrl->reg_write(ctrl, SWRM_INTERRUPT_MASK_ADDR, ctrl->intr_mask);
> + ctrl->reg_write(ctrl, SWRM_INTERRUPT_CPU_EN, ctrl->intr_mask);
> + }
> + /* Prepare slaves for clock stop */
> + ret = sdw_bus_prep_clk_stop(&ctrl->bus);
> + if (ret < 0) {
if a device has lost sync and reports -ENODATA, you want still want to
go ahead and not prevent the suspend operation from happening.
> + dev_err(dev, "prepare clock stop failed %d", ret);
> + return ret;
> + }
> +
> + ret = sdw_bus_clk_stop(&ctrl->bus);
> + if (ret < 0 && ret != -ENODATA) {
> + dev_err(dev, "bus clock stop failed %d", ret);
> + return ret;
> + }
> +
> + clk_disable_unprepare(ctrl->hclk);
> +
> + usleep_range(300, 305);
> +
> + return 0;
> +}
> +
> +static const struct dev_pm_ops swrm_dev_pm_ops = {
> + SET_RUNTIME_PM_OPS(swrm_runtime_suspend, swrm_runtime_resume, NULL)
> +};
> +
> static const struct of_device_id qcom_swrm_of_match[] = {
> { .compatible = "qcom,soundwire-v1.3.0", .data = &swrm_v1_3_data },
> { .compatible = "qcom,soundwire-v1.5.1", .data = &swrm_v1_5_data },
> @@ -1359,6 +1506,7 @@ static struct platform_driver qcom_swrm_driver = {
> .driver = {
> .name = "qcom-soundwire",
> .of_match_table = qcom_swrm_of_match,
> + .pm = &swrm_dev_pm_ops,
> }
> };
> module_platform_driver(qcom_swrm_driver);
> There are two cases here.
>
> 1> Controller Instance support ClockStop Mode0, we mostly use the
> generic core to do that except in resume path we make sure that we start
> the clock.
>
> 2> Controller Instances which that do not support ClockStop, we do soft
> reset of controller along with hard resetting slaves.
both are fine. we have similar cases defined in sdw_intel.h
>>> +static int swrm_runtime_resume(struct device *dev)
>>> +{
>>> + struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dev);
>>> + int ret;
>>> +
>>> + clk_prepare_enable(ctrl->hclk);
>>> +
>>> + if (ctrl->clk_stop_bus_reset) {
>>> + reinit_completion(&ctrl->enumeration);
>>> + ctrl->reg_write(ctrl, SWRM_COMP_SW_RESET, 0x01);
>>> + qcom_swrm_get_device_status(ctrl);
>>
>> don't you need some sort of delay before checking the controller and
>> device status? The bus reset sequence takes 4096 bits, that's a non-zero
>> time.
>
> This is soft reset not full Bus Reset as WSA slaves have hard reset pins
> that will be toggled as part of suspend-resume.
Above you mentioned the peripherals go through a reset as well, in which
case they can only re-attach on the bus after 16 frames best case - they
need to observe a full cycle of the dynamic sync before changing status.
That's still a non-zero delay (0.3ms for a 48kHz frame rate)
>>
>>> + sdw_handle_slave_status(&ctrl->bus, ctrl->status);
>>> + qcom_swrm_init(ctrl);
On 22/02/2022 19:15, Pierre-Louis Bossart wrote:
>
>
> On 2/21/22 04:41, Srinivas Kandagatla wrote:
>> Add support to runtime PM using SoundWire clock stop on supported instances
>> and bus reset on instances that require full reset.
>
> This commit message and code are a bit confusing, e.g. you have a
> boolean state
>
> ctrl->clk_stop_bus_reset = true;
>
> Does this mean bus reset on exiting clock stop? or just that clock stop
> is not supported and bus reset is required with complete re-enumeration.
WSA instances of SoundWire controllers do not support clk stop and a
reset of ip is required with complete re-enumeration when a clock is cut
off during suspend.
>
> It would be good to try and explain using SoundWire 1.x terminology what
> actions are taken on resume.
>
There are two cases here.
1> Controller Instance support ClockStop Mode0, we mostly use the
generic core to do that except in resume path we make sure that we start
the clock.
2> Controller Instances which that do not support ClockStop, we do soft
reset of controller along with hard resetting slaves.
>
>> @@ -1267,6 +1305,7 @@ static int qcom_swrm_probe(struct platform_device *pdev)
>> ctrl->bus.ops = &qcom_swrm_ops;
>> ctrl->bus.port_ops = &qcom_swrm_port_ops;
>> ctrl->bus.compute_params = &qcom_swrm_compute_params;
>> + ctrl->bus.clk_stop_timeout = 300;
>>
>> ret = qcom_swrm_get_port_config(ctrl);
>> if (ret)
>> @@ -1319,6 +1358,21 @@ static int qcom_swrm_probe(struct platform_device *pdev)
>> (ctrl->version >> 24) & 0xff, (ctrl->version >> 16) & 0xff,
>> ctrl->version & 0xffff);
>>
>> + pm_runtime_set_autosuspend_delay(dev, 3000);
>> + pm_runtime_use_autosuspend(dev);
>> + pm_runtime_mark_last_busy(dev);
>> + pm_runtime_set_active(dev);
>> + pm_runtime_enable(dev);
>> +
>> + /* Clk stop is not supported on WSA Soundwire masters */
>> + if (ctrl->version <= 0x01030000) {
>> + ctrl->clk_stop_bus_reset = true;
>> + } else {
>> + ctrl->reg_read(ctrl, SWRM_COMP_MASTER_ID, &val);
>> + if (val == MASTER_ID_WSA)
>> + ctrl->clk_stop_bus_reset = true;
>> + }
>
> I think this means clock_stop_not_supported?
Yes It makes more sense to reword this to clock_stop_not_supported.
>
>> +static int swrm_runtime_resume(struct device *dev)
>> +{
>> + struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dev);
>> + int ret;
>> +
>> + clk_prepare_enable(ctrl->hclk);
>> +
>> + if (ctrl->clk_stop_bus_reset) {
>> + reinit_completion(&ctrl->enumeration);
>> + ctrl->reg_write(ctrl, SWRM_COMP_SW_RESET, 0x01);
>> + qcom_swrm_get_device_status(ctrl);
>
> don't you need some sort of delay before checking the controller and
> device status? The bus reset sequence takes 4096 bits, that's a non-zero
> time.
This is soft reset not full Bus Reset as WSA slaves have hard reset pins
that will be toggled as part of suspend-resume.
>
>> + sdw_handle_slave_status(&ctrl->bus, ctrl->status);
>> + qcom_swrm_init(ctrl);
>> + wait_for_completion_timeout(&ctrl->enumeration,
>> + msecs_to_jiffies(TIMEOUT_MS));
>> + } else {
>> + ctrl->reg_write(ctrl, SWRM_MCP_BUS_CTRL, SWRM_MCP_BUS_CLK_START);
>> + ctrl->reg_write(ctrl, SWRM_INTERRUPT_CLEAR,
>> + SWRM_INTERRUPT_STATUS_MASTER_CLASH_DET);
>> +
>> + ctrl->intr_mask |= SWRM_INTERRUPT_STATUS_MASTER_CLASH_DET;
>> + ctrl->reg_write(ctrl, SWRM_INTERRUPT_MASK_ADDR, ctrl->intr_mask);
>> + ctrl->reg_write(ctrl, SWRM_INTERRUPT_CPU_EN, ctrl->intr_mask);
>> +
>> + usleep_range(100, 105);
>> + }
>> +
>> + if (!swrm_wait_for_frame_gen_enabled(ctrl))
>> + dev_err(ctrl->dev, "link failed to connect\n");
>> +
>> + usleep_range(300, 305);
>> + ret = sdw_bus_exit_clk_stop(&ctrl->bus);
>> + if (ret < 0)
>> + dev_err(ctrl->dev, "bus failed to exit clock stop %d\n", ret);
>> +
>> + return 0;
>> +}
>> +
>> +static int __maybe_unused swrm_runtime_suspend(struct device *dev)
>> +{
>> + struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dev);
>> + int ret;
>> +
>> + if (!ctrl->clk_stop_bus_reset) {
>> + /* Mask bus clash interrupt */
>> + ctrl->intr_mask &= ~SWRM_INTERRUPT_STATUS_MASTER_CLASH_DET;
>> + ctrl->reg_write(ctrl, SWRM_INTERRUPT_MASK_ADDR, ctrl->intr_mask);
>> + ctrl->reg_write(ctrl, SWRM_INTERRUPT_CPU_EN, ctrl->intr_mask);
>> + }
>> + /* Prepare slaves for clock stop */
>> + ret = sdw_bus_prep_clk_stop(&ctrl->bus);
>> + if (ret < 0) {
>
> if a device has lost sync and reports -ENODATA, you want still want to
> go ahead and not prevent the suspend operation from happening.
okay.
--srini
>
>> + dev_err(dev, "prepare clock stop failed %d", ret);
>> + return ret;
>> + }
>> +
>> + ret = sdw_bus_clk_stop(&ctrl->bus);
>> + if (ret < 0 && ret != -ENODATA) {
>> + dev_err(dev, "bus clock stop failed %d", ret);
>> + return ret;
>> + }
>> +
>> + clk_disable_unprepare(ctrl->hclk);
>> +
>> + usleep_range(300, 305);
>> +
>> + return 0;
>> +}
>> +
>> +static const struct dev_pm_ops swrm_dev_pm_ops = {
>> + SET_RUNTIME_PM_OPS(swrm_runtime_suspend, swrm_runtime_resume, NULL)
>> +};
>> +
>> static const struct of_device_id qcom_swrm_of_match[] = {
>> { .compatible = "qcom,soundwire-v1.3.0", .data = &swrm_v1_3_data },
>> { .compatible = "qcom,soundwire-v1.5.1", .data = &swrm_v1_5_data },
>> @@ -1359,6 +1506,7 @@ static struct platform_driver qcom_swrm_driver = {
>> .driver = {
>> .name = "qcom-soundwire",
>> .of_match_table = qcom_swrm_of_match,
>> + .pm = &swrm_dev_pm_ops,
>> }
>> };
>> module_platform_driver(qcom_swrm_driver);