2022-02-27 22:53:36

by Prabhakar Mahadev Lad

Subject: [PATCH 01/12] arm64: dts: renesas: r9a07g054: Fillup the SDHI{0,1} stub nodes

Fillup the SDHI{0,1} stub nodes in RZ/V2L (R9A07G054) SoC DTSI.

Signed-off-by: Lad Prabhakar <[email protected]>
Reviewed-by: Biju Das <[email protected]>
---
arch/arm64/boot/dts/renesas/r9a07g054.dtsi | 26 ++++++++++++++++++++--
1 file changed, 24 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
index 3ddf0f24071c..0b0e924e28ae 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
@@ -398,13 +398,35 @@
};

sdhi0: mmc@11c00000 {
+ compatible = "renesas,sdhi-r9a07g054",
+ "renesas,rcar-gen3-sdhi";
reg = <0x0 0x11c00000 0 0x10000>;
- /* place holder */
+ interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A07G054_SDHI0_IMCLK>,
+ <&cpg CPG_MOD R9A07G054_SDHI0_CLK_HS>,
+ <&cpg CPG_MOD R9A07G054_SDHI0_IMCLK2>,
+ <&cpg CPG_MOD R9A07G054_SDHI0_ACLK>;
+ clock-names = "core", "clkh", "cd", "aclk";
+ resets = <&cpg R9A07G054_SDHI0_IXRST>;
+ power-domains = <&cpg>;
+ status = "disabled";
};

sdhi1: mmc@11c10000 {
+ compatible = "renesas,sdhi-r9a07g054",
+ "renesas,rcar-gen3-sdhi";
reg = <0x0 0x11c10000 0 0x10000>;
- /* place holder */
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A07G054_SDHI1_IMCLK>,
+ <&cpg CPG_MOD R9A07G054_SDHI1_CLK_HS>,
+ <&cpg CPG_MOD R9A07G054_SDHI1_IMCLK2>,
+ <&cpg CPG_MOD R9A07G054_SDHI1_ACLK>;
+ clock-names = "core", "clkh", "cd", "aclk";
+ resets = <&cpg R9A07G054_SDHI1_IXRST>;
+ power-domains = <&cpg>;
+ status = "disabled";
};

eth0: ethernet@11c20000 {
--
2.17.1

2022-03-01 13:56:27

by Geert Uytterhoeven

Subject: Re: [PATCH 01/12] arm64: dts: renesas: r9a07g054: Fillup the SDHI{0,1} stub nodes

On Sun, Feb 27, 2022 at 9:38 PM Lad Prabhakar
<[email protected]> wrote:
> Fillup the SDHI{0,1} stub nodes in RZ/V2L (R9A07G054) SoC DTSI.
>
> Signed-off-by: Lad Prabhakar <[email protected]>
> Reviewed-by: Biju Das <[email protected]>

Reviewed-by: Geert Uytterhoeven <[email protected]>
i.e. will queue in renesas-devel for v5.19.

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds