2022-02-18 16:16:02

by Tudor Ambarus

Subject: [PATCH 4/4] mtd: spi-nor: core: Introduce SPI_NOR_DTR_BSWAP16 no_sfdp_flag

Introduce SPI_NOR_DTR_BSWAP16 flag for flashes that don't define the
mandatory BFPT table. When set it indicates that the byte order of 16-bit
words is swapped when read in 8D-8D-8D mode compared to 1-1-1 mode.

Signed-off-by: Tudor Ambarus <[email protected]>
---
drivers/mtd/spi-nor/core.c | 5 ++++-
drivers/mtd/spi-nor/core.h | 5 ++++-
2 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index 453d8c54d062..c3128a8e1544 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -2572,7 +2572,7 @@ static void spi_nor_no_sfdp_init_params(struct spi_nor *nor)
{
struct spi_nor_flash_parameter *params = nor->params;
struct spi_nor_erase_map *map = &params->erase_map;
- const u8 no_sfdp_flags = nor->info->no_sfdp_flags;
+ const u16 no_sfdp_flags = nor->info->no_sfdp_flags;
u8 i, erase_mask;

if (no_sfdp_flags & SPI_NOR_DUAL_READ) {
@@ -2613,6 +2613,9 @@ static void spi_nor_no_sfdp_init_params(struct spi_nor *nor)
SPINOR_OP_PP, SNOR_PROTO_8_8_8_DTR);
}

+ if (no_sfdp_flags & SPI_NOR_DTR_BSWAP16)
+ nor->flags |= SNOR_F_DTR_BSWAP16;
+
/*
* Sector Erase settings. Sort Erase Types in ascending order, with the
* smallest erase size starting at BIT(0).
diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
index 7c077d41c335..1cb887437193 100644
--- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h
@@ -362,6 +362,8 @@ struct spi_nor_fixups {
* SPI_NOR_OCTAL_READ: flash supports Octal Read.
* SPI_NOR_OCTAL_DTR_READ: flash supports octal DTR Read.
* SPI_NOR_OCTAL_DTR_PP: flash supports Octal DTR Page Program.
+ * SPI_NOR_DTR_BSWAP16: the byte order of 16-bit words is swapped when
+ * read or written in DTR mode compared to STR mode.
*
* @fixup_flags: flags that indicate support that can be discovered via SFDP
* ideally, but can not be discovered for this particular flash
@@ -404,7 +406,7 @@ struct flash_info {
#define USE_FSR BIT(10)
#define SPI_NOR_XSR_RDY BIT(11)

- u8 no_sfdp_flags;
+ u16 no_sfdp_flags;
#define SPI_NOR_SKIP_SFDP BIT(0)
#define SECT_4K BIT(1)
#define SECT_4K_PMC BIT(2)
@@ -413,6 +415,7 @@ struct flash_info {
#define SPI_NOR_OCTAL_READ BIT(5)
#define SPI_NOR_OCTAL_DTR_READ BIT(6)
#define SPI_NOR_OCTAL_DTR_PP BIT(7)
+#define SPI_NOR_DTR_BSWAP16 BIT(8)

u8 fixup_flags;
#define SPI_NOR_4B_OPCODES BIT(0)
--
2.25.1

2022-02-21 08:52:10

by Michael Walle

Subject: Re: [PATCH 4/4] mtd: spi-nor: core: Introduce SPI_NOR_DTR_BSWAP16 no_sfdp_flag

Am 2022-02-18 15:59, schrieb Tudor Ambarus:
> Introduce SPI_NOR_DTR_BSWAP16 flag for flashes that don't define the
> mandatory BFPT table. When set it indicates that the byte order of
> 16-bit
> words is swapped when read in 8D-8D-8D mode compared to 1-1-1 mode.
>
> Signed-off-by: Tudor Ambarus <[email protected]>
> ---
> drivers/mtd/spi-nor/core.c | 5 ++++-
> drivers/mtd/spi-nor/core.h | 5 ++++-
> 2 files changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
> index 453d8c54d062..c3128a8e1544 100644
> --- a/drivers/mtd/spi-nor/core.c
> +++ b/drivers/mtd/spi-nor/core.c
> @@ -2572,7 +2572,7 @@ static void spi_nor_no_sfdp_init_params(struct
> spi_nor *nor)
> {
> struct spi_nor_flash_parameter *params = nor->params;
> struct spi_nor_erase_map *map = &params->erase_map;
> - const u8 no_sfdp_flags = nor->info->no_sfdp_flags;
> + const u16 no_sfdp_flags = nor->info->no_sfdp_flags;
> u8 i, erase_mask;
>
> if (no_sfdp_flags & SPI_NOR_DUAL_READ) {
> @@ -2613,6 +2613,9 @@ static void spi_nor_no_sfdp_init_params(struct
> spi_nor *nor)
> SPINOR_OP_PP, SNOR_PROTO_8_8_8_DTR);
> }
>
> + if (no_sfdp_flags & SPI_NOR_DTR_BSWAP16)
> + nor->flags |= SNOR_F_DTR_BSWAP16;
> +
> /*
> * Sector Erase settings. Sort Erase Types in ascending order, with
> the
> * smallest erase size starting at BIT(0).
> diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
> index 7c077d41c335..1cb887437193 100644
> --- a/drivers/mtd/spi-nor/core.h
> +++ b/drivers/mtd/spi-nor/core.h
> @@ -362,6 +362,8 @@ struct spi_nor_fixups {
> * SPI_NOR_OCTAL_READ: flash supports Octal Read.
> * SPI_NOR_OCTAL_DTR_READ: flash supports octal DTR Read.
> * SPI_NOR_OCTAL_DTR_PP: flash supports Octal DTR Page Program.
> + * SPI_NOR_DTR_BSWAP16: the byte order of 16-bit words is
> swapped when
> + * read or written in DTR mode compared to STR mode.
> *
> * @fixup_flags: flags that indicate support that can be discovered
> via SFDP
> * ideally, but can not be discovered for this
> particular flash
> @@ -404,7 +406,7 @@ struct flash_info {
> #define USE_FSR BIT(10)
> #define SPI_NOR_XSR_RDY BIT(11)
>
> - u8 no_sfdp_flags;
> + u16 no_sfdp_flags;
> #define SPI_NOR_SKIP_SFDP BIT(0)
> #define SECT_4K BIT(1)
> #define SECT_4K_PMC BIT(2)
> @@ -413,6 +415,7 @@ struct flash_info {
> #define SPI_NOR_OCTAL_READ BIT(5)
> #define SPI_NOR_OCTAL_DTR_READ BIT(6)
> #define SPI_NOR_OCTAL_DTR_PP BIT(7)
> +#define SPI_NOR_DTR_BSWAP16 BIT(8)
>
> u8 fixup_flags;
> #define SPI_NOR_4B_OPCODES BIT(0)

Reviewed-by: Michael Walle <[email protected]>

-michael

2022-03-02 14:07:31

by Pratyush Yadav

Subject: Re: [PATCH 4/4] mtd: spi-nor: core: Introduce SPI_NOR_DTR_BSWAP16 no_sfdp_flag

On 18/02/22 04:59PM, Tudor Ambarus wrote:
> Introduce SPI_NOR_DTR_BSWAP16 flag for flashes that don't define the
> mandatory BFPT table. When set it indicates that the byte order of 16-bit
> words is swapped when read in 8D-8D-8D mode compared to 1-1-1 mode.

Is there any flash that currently needs this flag but does not define
BFPT? If there is no user, let's not add it. It can always be added
later.

>
> Signed-off-by: Tudor Ambarus <[email protected]>
> ---
> drivers/mtd/spi-nor/core.c | 5 ++++-
> drivers/mtd/spi-nor/core.h | 5 ++++-
> 2 files changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
> index 453d8c54d062..c3128a8e1544 100644
> --- a/drivers/mtd/spi-nor/core.c
> +++ b/drivers/mtd/spi-nor/core.c
> @@ -2572,7 +2572,7 @@ static void spi_nor_no_sfdp_init_params(struct spi_nor *nor)
> {
> struct spi_nor_flash_parameter *params = nor->params;
> struct spi_nor_erase_map *map = &params->erase_map;
> - const u8 no_sfdp_flags = nor->info->no_sfdp_flags;
> + const u16 no_sfdp_flags = nor->info->no_sfdp_flags;
> u8 i, erase_mask;
>
> if (no_sfdp_flags & SPI_NOR_DUAL_READ) {
> @@ -2613,6 +2613,9 @@ static void spi_nor_no_sfdp_init_params(struct spi_nor *nor)
> SPINOR_OP_PP, SNOR_PROTO_8_8_8_DTR);
> }
>
> + if (no_sfdp_flags & SPI_NOR_DTR_BSWAP16)
> + nor->flags |= SNOR_F_DTR_BSWAP16;
> +
> /*
> * Sector Erase settings. Sort Erase Types in ascending order, with the
> * smallest erase size starting at BIT(0).
> diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
> index 7c077d41c335..1cb887437193 100644
> --- a/drivers/mtd/spi-nor/core.h
> +++ b/drivers/mtd/spi-nor/core.h
> @@ -362,6 +362,8 @@ struct spi_nor_fixups {
> * SPI_NOR_OCTAL_READ: flash supports Octal Read.
> * SPI_NOR_OCTAL_DTR_READ: flash supports octal DTR Read.
> * SPI_NOR_OCTAL_DTR_PP: flash supports Octal DTR Page Program.
> + * SPI_NOR_DTR_BSWAP16: the byte order of 16-bit words is swapped when
> + * read or written in DTR mode compared to STR mode.
> *
> * @fixup_flags: flags that indicate support that can be discovered via SFDP
> * ideally, but can not be discovered for this particular flash
> @@ -404,7 +406,7 @@ struct flash_info {
> #define USE_FSR BIT(10)
> #define SPI_NOR_XSR_RDY BIT(11)
>
> - u8 no_sfdp_flags;
> + u16 no_sfdp_flags;
> #define SPI_NOR_SKIP_SFDP BIT(0)
> #define SECT_4K BIT(1)
> #define SECT_4K_PMC BIT(2)
> @@ -413,6 +415,7 @@ struct flash_info {
> #define SPI_NOR_OCTAL_READ BIT(5)
> #define SPI_NOR_OCTAL_DTR_READ BIT(6)
> #define SPI_NOR_OCTAL_DTR_PP BIT(7)
> +#define SPI_NOR_DTR_BSWAP16 BIT(8)
>
> u8 fixup_flags;
> #define SPI_NOR_4B_OPCODES BIT(0)
> --
> 2.25.1
>

--
Regards,
Pratyush Yadav
Texas Instruments Inc.

2022-03-10 06:52:44

by Tudor Ambarus

Subject: Re: [PATCH 4/4] mtd: spi-nor: core: Introduce SPI_NOR_DTR_BSWAP16 no_sfdp_flag

On 3/2/22 14:30, Pratyush Yadav wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> On 18/02/22 04:59PM, Tudor Ambarus wrote:
>> Introduce SPI_NOR_DTR_BSWAP16 flag for flashes that don't define the
>> mandatory BFPT table. When set it indicates that the byte order of 16-bit
>> words is swapped when read in 8D-8D-8D mode compared to 1-1-1 mode.
>
> Is there any flash that currently needs this flag but does not define
> BFPT? If there is no user, let's not add it. It can always be added
> later.

it's needed by mx66lm1g45g, the flash that I'm currently working on.
It doesn't define SFDP tables, at least the one that I currently have.
Let me add support for it in the next version.