2022-03-03 08:50:29

by Tyrone Ting

[permalink] [raw]

Subject: [PATCH v3 01/11] arm: dts: add new property for NPCM i2c module

---

From: Tyrone Ting <[email protected]>

Add nuvoton,sys-mgr property for controlling NPCM gcr register.

Signed-off-by: Tyrone Ting <[email protected]>
Signed-off-by: Tali Perry <[email protected]>
---
arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)

diff --git a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
index 3696980a3da1..0fee5fc67e02 100644
--- a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
+++ b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
@@ -371,6 +371,7 @@
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&smb0_pins>;
+ nuvoton,sys-mgr = <&gcr>;
status = "disabled";
};

@@ -383,6 +384,7 @@
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&smb1_pins>;
+ nuvoton,sys-mgr = <&gcr>;
status = "disabled";
};

@@ -395,6 +397,7 @@
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&smb2_pins>;
+ nuvoton,sys-mgr = <&gcr>;
status = "disabled";
};

@@ -407,6 +410,7 @@
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&smb3_pins>;
+ nuvoton,sys-mgr = <&gcr>;
status = "disabled";
};

@@ -419,6 +423,7 @@
interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&smb4_pins>;
+ nuvoton,sys-mgr = <&gcr>;
status = "disabled";
};

@@ -431,6 +436,7 @@
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&smb5_pins>;
+ nuvoton,sys-mgr = <&gcr>;
status = "disabled";
};

@@ -443,6 +449,7 @@
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&smb6_pins>;
+ nuvoton,sys-mgr = <&gcr>;
status = "disabled";
};

@@ -455,6 +462,7 @@
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&smb7_pins>;
+ nuvoton,sys-mgr = <&gcr>;
status = "disabled";
};

@@ -467,6 +475,7 @@
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&smb8_pins>;
+ nuvoton,sys-mgr = <&gcr>;
status = "disabled";
};

@@ -479,6 +488,7 @@
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&smb9_pins>;
+ nuvoton,sys-mgr = <&gcr>;
status = "disabled";
};

@@ -491,6 +501,7 @@
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&smb10_pins>;
+ nuvoton,sys-mgr = <&gcr>;
status = "disabled";
};

@@ -503,6 +514,7 @@
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&smb11_pins>;
+ nuvoton,sys-mgr = <&gcr>;
status = "disabled";
};

@@ -515,6 +527,7 @@
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&smb12_pins>;
+ nuvoton,sys-mgr = <&gcr>;
status = "disabled";
};

@@ -527,6 +540,7 @@
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&smb13_pins>;
+ nuvoton,sys-mgr = <&gcr>;
status = "disabled";
};

@@ -539,6 +553,7 @@
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&smb14_pins>;
+ nuvoton,sys-mgr = <&gcr>;
status = "disabled";
};

@@ -551,6 +566,7 @@
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&smb15_pins>;
+ nuvoton,sys-mgr = <&gcr>;
status = "disabled";
};
};
--
2.17.1

2022-03-19 00:03:39

by Wolfram Sang

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Subject: Re: [PATCH v3 01/11] arm: dts: add new property for NPCM i2c module

---

On Thu, Mar 03, 2022 at 04:31:31PM +0800, Tyrone Ting wrote:
> From: Tyrone Ting <[email protected]>
>
> Add nuvoton,sys-mgr property for controlling NPCM gcr register.
>
> Signed-off-by: Tyrone Ting <[email protected]>
> Signed-off-by: Tali Perry <[email protected]>

There are some comments about this series, so I am expecting a v4
somewhen. However, I already want to state that I usually don't take DTS
patches. So, I guess the path forward is that Rob needs to ack the patch
which is now patch 2. Once he does this and I apply it, you can take this
DTS patch via arm-soc. Sounds good?

---

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2022-03-21 22:16:31

by Wolfram Sang

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Subject: Re: [PATCH v3 01/11] arm: dts: add new property for NPCM i2c module

---

Hi Tyrone,

> There are still some discussions for the patch V4 and it might take
> some time though.

Take your time, I am not in a hurry. Just wanted to outline the best
process so it will be easier to apply the new version.

> Yes, the dts patch could be submitted via arm-soc.

Great.

> I really appreciate your comments.

Thank you and happy hacking,

Wolfram

---

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2022-03-21 22:43:14

by Tyrone Ting

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Subject: Re: [PATCH v3 01/11] arm: dts: add new property for NPCM i2c module

---

Hi Wolfram:

Thank you for your reminder and suggestion.

There are still some discussions for the patch V4 and it might take
some time though.

Yes, the dts patch could be submitted via arm-soc.

I really appreciate your comments.

Wolfram Sang <[email protected]> 於 2022年3月19日 週六 上午4:29寫道：
>
> On Thu, Mar 03, 2022 at 04:31:31PM +0800, Tyrone Ting wrote:
> > From: Tyrone Ting <[email protected]>
> >
> > Add nuvoton,sys-mgr property for controlling NPCM gcr register.
> >
> > Signed-off-by: Tyrone Ting <[email protected]>
> > Signed-off-by: Tali Perry <[email protected]>
>
> There are some comments about this series, so I am expecting a v4
> somewhen. However, I already want to state that I usually don't take DTS
> patches. So, I guess the path forward is that Rob needs to ack the patch
> which is now patch 2. Once he does this and I apply it, you can take this
> DTS patch via arm-soc. Sounds good?
>

Regards,
Tyrone