Similar to ibt_selftest_ip, apply the same pattern.
Suggested-by: Josh Poimboeuf <[email protected]>
Signed-off-by: Peter Zijlstra (Intel) <[email protected]>
---
arch/x86/kernel/alternative.c | 13 +++----------
1 file changed, 3 insertions(+), 10 deletions(-)
--- a/arch/x86/kernel/alternative.c
+++ b/arch/x86/kernel/alternative.c
@@ -719,7 +719,7 @@ asm (
" .popsection\n"
);
-extern __initdata unsigned long int3_selftest_ip; /* defined in asm below */
+extern void int3_selftest_ip(void); /* defined in asm below */
static int __init
int3_exception_notify(struct notifier_block *self, unsigned long val, void *data)
@@ -733,7 +733,7 @@ int3_exception_notify(struct notifier_bl
if (val != DIE_INT3)
return NOTIFY_DONE;
- if (regs->ip - INT3_INSN_SIZE != int3_selftest_ip)
+ if (regs->ip - INT3_INSN_SIZE != (unsigned long)&int3_selftest_ip)
return NOTIFY_DONE;
int3_emulate_call(regs, (unsigned long)&int3_magic);
@@ -757,14 +757,7 @@ static void __init int3_selftest(void)
* then trigger the INT3, padded with NOPs to match a CALL instruction
* length.
*/
- asm volatile ("1: int3; nop; nop; nop; nop\n\t"
- ".pushsection .init.data,\"aw\"\n\t"
- ".align " __ASM_SEL(4, 8) "\n\t"
- ".type int3_selftest_ip, @object\n\t"
- ".size int3_selftest_ip, " __ASM_SEL(4, 8) "\n\t"
- "int3_selftest_ip:\n\t"
- __ASM_SEL(.long, .quad) " 1b\n\t"
- ".popsection\n\t"
+ asm volatile ("int3_selftest_ip: int3; nop; nop; nop; nop\n\t"
: ASM_CALL_CONSTRAINT
: __ASM_SEL_RAW(a, D) (&val)
: "memory");
On Thu, Mar 03, 2022 at 12:23:44PM +0100, Peter Zijlstra wrote:
> @@ -733,7 +733,7 @@ int3_exception_notify(struct notifier_bl
> if (val != DIE_INT3)
> return NOTIFY_DONE;
>
> - if (regs->ip - INT3_INSN_SIZE != int3_selftest_ip)
> + if (regs->ip - INT3_INSN_SIZE != (unsigned long)&int3_selftest_ip)
> return NOTIFY_DONE;
>
> int3_emulate_call(regs, (unsigned long)&int3_magic);
> @@ -757,14 +757,7 @@ static void __init int3_selftest(void)
> * then trigger the INT3, padded with NOPs to match a CALL instruction
> * length.
> */
> - asm volatile ("1: int3; nop; nop; nop; nop\n\t"
> - ".pushsection .init.data,\"aw\"\n\t"
> - ".align " __ASM_SEL(4, 8) "\n\t"
> - ".type int3_selftest_ip, @object\n\t"
> - ".size int3_selftest_ip, " __ASM_SEL(4, 8) "\n\t"
> - "int3_selftest_ip:\n\t"
> - __ASM_SEL(.long, .quad) " 1b\n\t"
> - ".popsection\n\t"
> + asm volatile ("int3_selftest_ip: int3; nop; nop; nop; nop\n\t"
> : ASM_CALL_CONSTRAINT
> : __ASM_SEL_RAW(a, D) (&val)
> : "memory");
Hm, why doesn't this need ANNOTATE_NOENDBR?
--
Josh
On Fri, Mar 04, 2022 at 10:02:23AM -0800, Josh Poimboeuf wrote:
> On Thu, Mar 03, 2022 at 12:23:44PM +0100, Peter Zijlstra wrote:
> > @@ -733,7 +733,7 @@ int3_exception_notify(struct notifier_bl
> > if (val != DIE_INT3)
> > return NOTIFY_DONE;
> >
> > - if (regs->ip - INT3_INSN_SIZE != int3_selftest_ip)
> > + if (regs->ip - INT3_INSN_SIZE != (unsigned long)&int3_selftest_ip)
> > return NOTIFY_DONE;
> >
> > int3_emulate_call(regs, (unsigned long)&int3_magic);
> > @@ -757,14 +757,7 @@ static void __init int3_selftest(void)
> > * then trigger the INT3, padded with NOPs to match a CALL instruction
> > * length.
> > */
> > - asm volatile ("1: int3; nop; nop; nop; nop\n\t"
> > - ".pushsection .init.data,\"aw\"\n\t"
> > - ".align " __ASM_SEL(4, 8) "\n\t"
> > - ".type int3_selftest_ip, @object\n\t"
> > - ".size int3_selftest_ip, " __ASM_SEL(4, 8) "\n\t"
> > - "int3_selftest_ip:\n\t"
> > - __ASM_SEL(.long, .quad) " 1b\n\t"
> > - ".popsection\n\t"
> > + asm volatile ("int3_selftest_ip: int3; nop; nop; nop; nop\n\t"
> > : ASM_CALL_CONSTRAINT
> > : __ASM_SEL_RAW(a, D) (&val)
> > : "memory");
>
> Hm, why doesn't this need ANNOTATE_NOENDBR?
Never mind, I see it's added later... though I still have the same
comment about the ANNOTATE_ENDBR coming after the label.
--
Josh