2022-03-11 21:11:00

by [email protected]

Subject: [PATCH v2 5/8] arm64: Create cache sysfs directory without ACPI PPTT for hardware prefetch control

This patch create a cache sysfs directory without ACPI PPTT if the
CONFIG_HWPF_CONTROL is true.

Hardware prefetch control driver need cache sysfs directory and cache
level/type information. In ARM processor, these information can be
obtained from the register even without PPTT. Therefore, we set the
cpu_map_populated to true to create cache sysfs directory if the
machine doesn't have PPTT.

Signed-off-by: Kohei Tarumizu <[email protected]>
---
arch/arm64/kernel/cacheinfo.c | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)

diff --git a/arch/arm64/kernel/cacheinfo.c b/arch/arm64/kernel/cacheinfo.c
index 587543c6c51c..039ec32d0b3d 100644
--- a/arch/arm64/kernel/cacheinfo.c
+++ b/arch/arm64/kernel/cacheinfo.c
@@ -43,6 +43,21 @@ static void ci_leaf_init(struct cacheinfo *this_leaf,
this_leaf->type = type;
}

+#if defined(CONFIG_HWPF_CONTROL)
+static bool acpi_has_pptt(void)
+{
+ struct acpi_table_header *table;
+ acpi_status status;
+
+ status = acpi_get_table(ACPI_SIG_PPTT, 0, &table);
+ if (ACPI_FAILURE(status))
+ return false;
+
+ acpi_put_table(table);
+ return true;
+}
+#endif
+
int init_cache_level(unsigned int cpu)
{
unsigned int ctype, level, leaves, fw_level;
@@ -95,5 +110,19 @@ int populate_cache_leaves(unsigned int cpu)
ci_leaf_init(this_leaf++, type, level);
}
}
+
+#if defined(CONFIG_HWPF_CONTROL)
+ /*
+ * Hardware prefetch functions need cache sysfs directory and cache
+ * level/type information. In ARM processor, these information can be
+ * obtained from registers even without PPTT. Therefore, we set the
+ * cpu_map_populated to true to create cache sysfs directory, if the
+ * machine doesn't have PPTT.
+ **/
+ if (!acpi_disabled)
+ if (!acpi_has_pptt())
+ this_cpu_ci->cpu_map_populated = true;
+#endif
+
return 0;
}
--
2.27.0

2022-03-31 05:00:15

by Rob Herring

Subject: Re: [PATCH v2 5/8] arm64: Create cache sysfs directory without ACPI PPTT for hardware prefetch control

On Fri, Mar 11, 2022 at 4:23 AM Kohei Tarumizu
<[email protected]> wrote:
>
> This patch create a cache sysfs directory without ACPI PPTT if the
> CONFIG_HWPF_CONTROL is true.
>
> Hardware prefetch control driver need cache sysfs directory and cache
> level/type information. In ARM processor, these information can be
> obtained from the register even without PPTT.

What registers? CCSIDR register is no longer used. You must use DT or PPTT.

> Therefore, we set the
> cpu_map_populated to true to create cache sysfs directory if the
> machine doesn't have PPTT.
>
> Signed-off-by: Kohei Tarumizu <[email protected]>
> ---
> arch/arm64/kernel/cacheinfo.c | 29 +++++++++++++++++++++++++++++
> 1 file changed, 29 insertions(+)

2022-04-05 02:46:54

by [email protected]

Subject: RE: [PATCH v2 5/8] arm64: Create cache sysfs directory without ACPI PPTT for hardware prefetch control

> What registers?

>> Hardware prefetch control driver need cache sysfs directory and cache
>> level/type information. In ARM processor, these information can be
>> obtained from the register even without PPTT.

This register mean CLIDR_EL1.

> CCSIDR register is no longer used. You must use DT or PPTT.

I know that commit "a8d4636f96ad" (arm64: cacheinfo: Remove CCSIDR-based
cache information probing) removed the code to read the CCSIDR from the
kernel.
Therefore, I only use level and type information that can be read from
CLIDR_EL1. Are there similar concerns when using only CLIDR_EL1
information?