On 13/03/2022 22:04, Ansuel Smith wrote:
> Add 8064 errata workaround where the sec_src clock gating needs to be
Could you please be more specific whether the errata applies only to the
ipq8064 or to the apq8064 too? 8064 is not specific enough.
> disabled during switching. To enable this set disable_sec_src_gating in
> the mux struct.
>
> Signed-off-by: Ansuel Smith <[email protected]>
> ---
> drivers/clk/qcom/clk-krait.c | 16 ++++++++++++++++
> drivers/clk/qcom/clk-krait.h | 1 +
> drivers/clk/qcom/krait-cc.c | 1 +
> 3 files changed, 18 insertions(+)
>
> diff --git a/drivers/clk/qcom/clk-krait.c b/drivers/clk/qcom/clk-krait.c
> index d8af281eba0e..82fe7031e1f4 100644
> --- a/drivers/clk/qcom/clk-krait.c
> +++ b/drivers/clk/qcom/clk-krait.c
> @@ -18,13 +18,23 @@
> static DEFINE_SPINLOCK(krait_clock_reg_lock);
>
> #define LPL_SHIFT 8
> +#define SECCLKAGD BIT(4)
> +
> static void __krait_mux_set_sel(struct krait_mux_clk *mux, int sel)
> {
> unsigned long flags;
> u32 regval;
>
> spin_lock_irqsave(&krait_clock_reg_lock, flags);
> +
> regval = krait_get_l2_indirect_reg(mux->offset);
> +
> + /* 8064 Errata: disable sec_src clock gating during switch. */
> + if (mux->disable_sec_src_gating) {
> + regval |= SECCLKAGD;
> + krait_set_l2_indirect_reg(mux->offset, regval);
> + }
> +
> regval &= ~(mux->mask << mux->shift);
> regval |= (sel & mux->mask) << mux->shift;
> if (mux->lpl) {
> @@ -33,6 +43,12 @@ static void __krait_mux_set_sel(struct krait_mux_clk *mux, int sel)
> }
> krait_set_l2_indirect_reg(mux->offset, regval);
>
> + /* 8064 Errata: re-enabled sec_src clock gating. */
And here too
> + if (mux->disable_sec_src_gating) {
> + regval &= ~SECCLKAGD;
> + krait_set_l2_indirect_reg(mux->offset, regval);
> + }
> +
> /* Wait for switch to complete. */
> mb();
> udelay(1);
> diff --git a/drivers/clk/qcom/clk-krait.h b/drivers/clk/qcom/clk-krait.h
> index 9120bd2f5297..f930538c539e 100644
> --- a/drivers/clk/qcom/clk-krait.h
> +++ b/drivers/clk/qcom/clk-krait.h
> @@ -15,6 +15,7 @@ struct krait_mux_clk {
> u8 safe_sel;
> u8 old_index;
> bool reparent;
> + bool disable_sec_src_gating;
>
> struct clk_hw hw;
> struct notifier_block clk_nb;
> diff --git a/drivers/clk/qcom/krait-cc.c b/drivers/clk/qcom/krait-cc.c
> index 1bdc89c097e6..533a770332be 100644
> --- a/drivers/clk/qcom/krait-cc.c
> +++ b/drivers/clk/qcom/krait-cc.c
> @@ -154,6 +154,7 @@ krait_add_sec_mux(struct device *dev, struct clk *qsb, int id,
> mux->shift = 2;
> mux->parent_map = sec_mux_map;
> mux->hw.init = &init;
> + mux->disable_sec_src_gating = true;
>
> init.name = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s);
> if (!init.name)
--
With best wishes
Dmitry
On Mon, Mar 14, 2022 at 11:20:21AM +0300, Dmitry Baryshkov wrote:
> On 13/03/2022 22:04, Ansuel Smith wrote:
> > Add 8064 errata workaround where the sec_src clock gating needs to be
>
> Could you please be more specific whether the errata applies only to the
> ipq8064 or to the apq8064 too? 8064 is not specific enough.
>
That's a good question... Problem is that we really don't know the
answer. This errata comes from qsdk on an old sourcecode. I assume this
is specific to ipq8064 and apq8064 have different mux configuration.
> > disabled during switching. To enable this set disable_sec_src_gating in
> > the mux struct.
> >
> > Signed-off-by: Ansuel Smith <[email protected]>
> > ---
> > drivers/clk/qcom/clk-krait.c | 16 ++++++++++++++++
> > drivers/clk/qcom/clk-krait.h | 1 +
> > drivers/clk/qcom/krait-cc.c | 1 +
> > 3 files changed, 18 insertions(+)
> >
> > diff --git a/drivers/clk/qcom/clk-krait.c b/drivers/clk/qcom/clk-krait.c
> > index d8af281eba0e..82fe7031e1f4 100644
> > --- a/drivers/clk/qcom/clk-krait.c
> > +++ b/drivers/clk/qcom/clk-krait.c
> > @@ -18,13 +18,23 @@
> > static DEFINE_SPINLOCK(krait_clock_reg_lock);
> > #define LPL_SHIFT 8
> > +#define SECCLKAGD BIT(4)
> > +
> > static void __krait_mux_set_sel(struct krait_mux_clk *mux, int sel)
> > {
> > unsigned long flags;
> > u32 regval;
> > spin_lock_irqsave(&krait_clock_reg_lock, flags);
> > +
> > regval = krait_get_l2_indirect_reg(mux->offset);
> > +
> > + /* 8064 Errata: disable sec_src clock gating during switch. */
> > + if (mux->disable_sec_src_gating) {
> > + regval |= SECCLKAGD;
> > + krait_set_l2_indirect_reg(mux->offset, regval);
> > + }
> > +
> > regval &= ~(mux->mask << mux->shift);
> > regval |= (sel & mux->mask) << mux->shift;
> > if (mux->lpl) {
> > @@ -33,6 +43,12 @@ static void __krait_mux_set_sel(struct krait_mux_clk *mux, int sel)
> > }
> > krait_set_l2_indirect_reg(mux->offset, regval);
> > + /* 8064 Errata: re-enabled sec_src clock gating. */
>
> And here too
>
> > + if (mux->disable_sec_src_gating) {
> > + regval &= ~SECCLKAGD;
> > + krait_set_l2_indirect_reg(mux->offset, regval);
> > + }
> > +
> > /* Wait for switch to complete. */
> > mb();
> > udelay(1);
> > diff --git a/drivers/clk/qcom/clk-krait.h b/drivers/clk/qcom/clk-krait.h
> > index 9120bd2f5297..f930538c539e 100644
> > --- a/drivers/clk/qcom/clk-krait.h
> > +++ b/drivers/clk/qcom/clk-krait.h
> > @@ -15,6 +15,7 @@ struct krait_mux_clk {
> > u8 safe_sel;
> > u8 old_index;
> > bool reparent;
> > + bool disable_sec_src_gating;
> > struct clk_hw hw;
> > struct notifier_block clk_nb;
> > diff --git a/drivers/clk/qcom/krait-cc.c b/drivers/clk/qcom/krait-cc.c
> > index 1bdc89c097e6..533a770332be 100644
> > --- a/drivers/clk/qcom/krait-cc.c
> > +++ b/drivers/clk/qcom/krait-cc.c
> > @@ -154,6 +154,7 @@ krait_add_sec_mux(struct device *dev, struct clk *qsb, int id,
> > mux->shift = 2;
> > mux->parent_map = sec_mux_map;
> > mux->hw.init = &init;
> > + mux->disable_sec_src_gating = true;
> > init.name = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s);
> > if (!init.name)
>
>
> --
> With best wishes
> Dmitry
--
Ansuel
Quoting Ansuel Smith (2022-03-14 05:43:20)
> On Mon, Mar 14, 2022 at 11:20:21AM +0300, Dmitry Baryshkov wrote:
> > On 13/03/2022 22:04, Ansuel Smith wrote:
> > > Add 8064 errata workaround where the sec_src clock gating needs to be
> >
> > Could you please be more specific whether the errata applies only to the
> > ipq8064 or to the apq8064 too? 8064 is not specific enough.
> >
>
> That's a good question... Problem is that we really don't know the
> answer. This errata comes from qsdk on an old sourcecode. I assume this
> is specific to ipq8064 and apq8064 have different mux configuration.
>
I think it was some glitch that happened when the automatic clk gating
was enabled during a switch. The automatic clk gating didn't know that
software was running and switching the input so it killed the CPU and
stopped the clk. That lead to hangs and super badness. I assume it was
applicable to apq8064 as well because ipq8064 is basically apq8064 with
the multimedia subsystem replaced by the networking subsystem. Also I
wouldn't remember all these details because I worked on apq8064 but not
so much on ipq8064 :)