Add reset control properties into MDIO nodes. The 4 MDIO controllers in
AST2600 SOC share one reset control bit SCU50[3].
Signed-off-by: Dylan Hung <[email protected]>
Cc: [email protected]
---
arch/arm/boot/dts/aspeed-g6.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index c32e87fad4dc..ab20ea8d829d 100644
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -181,6 +181,7 @@ mdio0: mdio@1e650000 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mdio1_default>;
+ resets = <&syscon ASPEED_RESET_MII>;
};
mdio1: mdio@1e650008 {
@@ -191,6 +192,7 @@ mdio1: mdio@1e650008 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mdio2_default>;
+ resets = <&syscon ASPEED_RESET_MII>;
};
mdio2: mdio@1e650010 {
@@ -201,6 +203,7 @@ mdio2: mdio@1e650010 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mdio3_default>;
+ resets = <&syscon ASPEED_RESET_MII>;
};
mdio3: mdio@1e650018 {
@@ -211,6 +214,7 @@ mdio3: mdio@1e650018 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mdio4_default>;
+ resets = <&syscon ASPEED_RESET_MII>;
};
mac0: ftgmac@1e660000 {
--
2.25.1