Hi Allen,
please see my comment below.
On Fri, Mar 18, 2022 at 10:45:20PM +0800, Allen-KH Cheng wrote:
> Add infracfg_rst node for mt8192 SoC.
> - Add simple-mfd to allow probing the ti,syscon-reset node.
>
> Signed-off-by: Allen-KH Cheng <[email protected]>
> Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
> ---
> arch/arm64/boot/dts/mediatek/mt8192.dtsi | 18 ++++++++++++++++--
> 1 file changed, 16 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> index 40cf6dacca3e..82de1af3f6aa 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> @@ -12,6 +12,7 @@
> #include <dt-bindings/pinctrl/mt8192-pinfunc.h>
> #include <dt-bindings/phy/phy.h>
> #include <dt-bindings/power/mt8192-power.h>
> +#include <dt-bindings/reset/ti-syscon.h>
>
> / {
> compatible = "mediatek,mt8192";
> @@ -267,10 +268,23 @@
> #clock-cells = <1>;
> };
>
> - infracfg: syscon@10001000 {
> - compatible = "mediatek,mt8192-infracfg", "syscon";
> + infracfg: infracfg@10001000 {
> + compatible = "mediatek,mt8192-infracfg", "syscon", "simple-mfd";
> reg = <0 0x10001000 0 0x1000>;
> #clock-cells = <1>;
> +
> + infracfg_rst: reset-controller {
> + compatible = "ti,syscon-reset";
> + #reset-cells = <1>;
> +
> + ti,reset-bits = <
> + 0x120 0 0x124 0 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE) /* 0: lvts_ap */
> + 0x730 12 0x734 12 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE) /* 1: lvts_mcu */
> + 0x140 15 0x144 15 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE) /* 2: pcie phy */
> + 0x730 1 0x734 1 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE) /* 3: pcie top */
> + 0x150 5 0x154 5 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE) /* 4: svs */
> + >;
If you see [1], Rob has previously said that there shouldn't be new users of the
ti,reset-bits property. I suggest doing like proposed on [2]: moving these bit
definitions to the reset-ti-syscon driver, and have them selected through the
compatible. You'd need to add a mt8192 specific compatible here too for that.
[1] https://lore.kernel.org/all/CAL_JsqJq6gqoXtvG1U7UDsOQpz7oMLMunZHq2njN6nvPr8PZMA@mail.gmail.com/
[2] https://lore.kernel.org/all/CAATdQgA5pKhjOf5gxo+h7cs7kCts3DeKGU5axeX2t+OaJFHyBg@mail.gmail.com/
Thanks,
N?colas
> + };
> };
>
> pericfg: syscon@10003000 {
> --
> 2.18.0
>
>