2022-04-15 23:34:42

by Georgi Vlaev

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Subject: [PATCH v2 0/2] clk: keystone: Add support for AM62 specific ewpm-tbclk

This patch series adds support for TI's AM62 specific time-based
submodule clock (tbclk). On AM62 SoCs we have to provide 3 tbclk
instances, as the SoC features 3 EPWM modules.

Changes:
v1 -> v2: Reorder the patches with dt-bindings patch first.

Georgi Vlaev (2):
dt-bindings: clock: ehrpwm: Add AM62 specific compatible
clk: keystone: syscon-clk: Add support for AM62 epwm-tbclk

.../bindings/clock/ti,am654-ehrpwm-tbclk.yaml | 1 +
drivers/clk/keystone/syscon-clk.c | 11 +++++++++++
2 files changed, 12 insertions(+)


base-commit: ce522ba9ef7e2d9fb22a39eb3371c0c64e2a433e
--
2.30.2


2022-04-16 01:04:20

by Georgi Vlaev

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Subject: [PATCH v2 2/2] clk: keystone: syscon-clk: Add support for AM62 epwm-tbclk

AM62 has 3 instances of EPWM modules. Each EPWM module has
an EPWM TBCLKEN module input used to individually enable or
disable its EPWM time-base clock. The EPWM time-base clock
enable input comes from the CTRLMMR_EPWM_TB_CLKEN register
bits 0 to 2 in CTRL_MMR0 module (6.1.1.4.1.48 [1]). This
is virtually the same setup as in AM64 but with 3 instead
of 9 clock providers on AM62.

Update the driver with the 3 instances of clocks associated
to a new compatible: "ti,am62-epwm-tbclk".

[1] https://www.ti.com/lit/pdf/spruiv7

Signed-off-by: Georgi Vlaev <[email protected]>
Tested-by: Vignesh Raghavendra <[email protected]>
---
drivers/clk/keystone/syscon-clk.c | 11 +++++++++++
1 file changed, 11 insertions(+)

diff --git a/drivers/clk/keystone/syscon-clk.c b/drivers/clk/keystone/syscon-clk.c
index aae1a4076281..19198325b909 100644
--- a/drivers/clk/keystone/syscon-clk.c
+++ b/drivers/clk/keystone/syscon-clk.c
@@ -162,6 +162,13 @@ static const struct ti_syscon_gate_clk_data am64_clk_data[] = {
{ /* Sentinel */ },
};

+static const struct ti_syscon_gate_clk_data am62_clk_data[] = {
+ TI_SYSCON_CLK_GATE("epwm_tbclk0", 0x0, 0),
+ TI_SYSCON_CLK_GATE("epwm_tbclk1", 0x0, 1),
+ TI_SYSCON_CLK_GATE("epwm_tbclk2", 0x0, 2),
+ { /* Sentinel */ },
+};
+
static const struct of_device_id ti_syscon_gate_clk_ids[] = {
{
.compatible = "ti,am654-ehrpwm-tbclk",
@@ -171,6 +178,10 @@ static const struct of_device_id ti_syscon_gate_clk_ids[] = {
.compatible = "ti,am64-epwm-tbclk",
.data = &am64_clk_data,
},
+ {
+ .compatible = "ti,am62-epwm-tbclk",
+ .data = &am62_clk_data,
+ },
{ }
};
MODULE_DEVICE_TABLE(of, ti_syscon_gate_clk_ids);
--
2.30.2

2022-04-16 02:39:00

by Georgi Vlaev

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Subject: [PATCH v2 1/2] dt-bindings: clock: ehrpwm: Add AM62 specific compatible

Introduce AM62 specific compatible for EPWM time-base
sub-module clock. The time-base clock setup is identical
to AM64. The only difference is AM62 provides 3 time-base
clocks instead of the 9 found in AM64.

Signed-off-by: Georgi Vlaev <[email protected]>
Tested-by: Vignesh Raghavendra <[email protected]>
Reviewed-by: Nishanth Menon <[email protected]>
---
.../devicetree/bindings/clock/ti,am654-ehrpwm-tbclk.yaml | 1 +
1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/clock/ti,am654-ehrpwm-tbclk.yaml b/Documentation/devicetree/bindings/clock/ti,am654-ehrpwm-tbclk.yaml
index 9b537bc876b5..66765116aff5 100644
--- a/Documentation/devicetree/bindings/clock/ti,am654-ehrpwm-tbclk.yaml
+++ b/Documentation/devicetree/bindings/clock/ti,am654-ehrpwm-tbclk.yaml
@@ -15,6 +15,7 @@ properties:
- enum:
- ti,am654-ehrpwm-tbclk
- ti,am64-epwm-tbclk
+ - ti,am62-epwm-tbclk
- const: syscon

"#clock-cells":
--
2.30.2

2022-04-23 02:15:57

by Stephen Boyd

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Subject: Re: [PATCH v2 1/2] dt-bindings: clock: ehrpwm: Add AM62 specific compatible

Quoting Georgi Vlaev (2022-04-15 12:03:42)
> Introduce AM62 specific compatible for EPWM time-base
> sub-module clock. The time-base clock setup is identical
> to AM64. The only difference is AM62 provides 3 time-base
> clocks instead of the 9 found in AM64.
>
> Signed-off-by: Georgi Vlaev <[email protected]>
> Tested-by: Vignesh Raghavendra <[email protected]>
> Reviewed-by: Nishanth Menon <[email protected]>
> ---

Applied to clk-next

2022-04-23 02:35:48

by Stephen Boyd

[permalink] [raw]
Subject: Re: [PATCH v2 2/2] clk: keystone: syscon-clk: Add support for AM62 epwm-tbclk

Quoting Georgi Vlaev (2022-04-15 12:03:43)
> AM62 has 3 instances of EPWM modules. Each EPWM module has
> an EPWM TBCLKEN module input used to individually enable or
> disable its EPWM time-base clock. The EPWM time-base clock
> enable input comes from the CTRLMMR_EPWM_TB_CLKEN register
> bits 0 to 2 in CTRL_MMR0 module (6.1.1.4.1.48 [1]). This
> is virtually the same setup as in AM64 but with 3 instead
> of 9 clock providers on AM62.
>
> Update the driver with the 3 instances of clocks associated
> to a new compatible: "ti,am62-epwm-tbclk".
>
> [1] https://www.ti.com/lit/pdf/spruiv7
>
> Signed-off-by: Georgi Vlaev <[email protected]>
> Tested-by: Vignesh Raghavendra <[email protected]>
> ---

Applied to clk-next