This patch series brings small fixes for SDCC clocks and adds reset for modem.
Adam Skladowski (3):
clk: qcom: gcc-msm8976: Set floor ops for SDCC
dt-bindings: clk: qcom: gcc-msm8976:Add modem reset
clk: qcom: gcc-msm8976:Add modem reset
drivers/clk/qcom/gcc-msm8976.c | 7 ++++---
include/dt-bindings/clock/qcom,gcc-msm8976.h | 1 +
2 files changed, 5 insertions(+), 3 deletions(-)
--
2.25.1
Add modem reset for MSM8976.
Signed-off-by: Adam Skladowski <[email protected]>
---
include/dt-bindings/clock/qcom,gcc-msm8976.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/dt-bindings/clock/qcom,gcc-msm8976.h b/include/dt-bindings/clock/qcom,gcc-msm8976.h
index 51955fd49426..5351f48b2068 100644
--- a/include/dt-bindings/clock/qcom,gcc-msm8976.h
+++ b/include/dt-bindings/clock/qcom,gcc-msm8976.h
@@ -224,6 +224,7 @@
#define RST_CAMSS_CSI_VFE1_BCR 7
#define RST_CAMSS_VFE1_BCR 8
#define RST_CAMSS_CPP_BCR 9
+#define RST_MSS_BCR 10
/* GDSCs */
#define VENUS_GDSC 0
--
2.25.1
Just like in case of other SoCs change SDCC1/SDCC2 ops to floor to avoid overclocking controller.
This commit only sets SDCC1/SDCC2 which are used for EMMC/SDCARD.
It leaves SDCC3 because on this platform it's mostly used for WIFI/BT chips like on Sony Loire family devices.
Signed-off-by: Adam Skladowski <[email protected]>
---
drivers/clk/qcom/gcc-msm8976.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/qcom/gcc-msm8976.c b/drivers/clk/qcom/gcc-msm8976.c
index a8b15814933e..5781a7bcecc6 100644
--- a/drivers/clk/qcom/gcc-msm8976.c
+++ b/drivers/clk/qcom/gcc-msm8976.c
@@ -1486,7 +1486,7 @@ static const struct clk_init_data sdcc1_apps_clk_src_8976v1_1_init = {
.name = "sdcc1_apps_clk_src",
.parent_data = gcc_parent_data_v1_1,
.num_parents = ARRAY_SIZE(gcc_parent_data_v1_1),
- .ops = &clk_rcg2_ops,
+ .ops = &clk_rcg2_floor_ops,
};
static struct clk_rcg2 sdcc1_apps_clk_src = {
@@ -1499,7 +1499,7 @@ static struct clk_rcg2 sdcc1_apps_clk_src = {
.name = "sdcc1_apps_clk_src",
.parent_data = gcc_parent_data_1,
.num_parents = ARRAY_SIZE(gcc_parent_data_1),
- .ops = &clk_rcg2_ops,
+ .ops = &clk_rcg2_floor_ops,
},
};
@@ -1547,7 +1547,7 @@ static struct clk_rcg2 sdcc2_apps_clk_src = {
.name = "sdcc2_apps_clk_src",
.parent_data = gcc_parent_data_4_8,
.num_parents = ARRAY_SIZE(gcc_parent_data_4_8),
- .ops = &clk_rcg2_ops,
+ .ops = &clk_rcg2_floor_ops,
},
};
--
2.25.1
Add modem reset, it will be needed during modem bringup.
Signed-off-by: Adam Skladowski <[email protected]>
---
drivers/clk/qcom/gcc-msm8976.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/qcom/gcc-msm8976.c b/drivers/clk/qcom/gcc-msm8976.c
index 5781a7bcecc6..6b112984694c 100644
--- a/drivers/clk/qcom/gcc-msm8976.c
+++ b/drivers/clk/qcom/gcc-msm8976.c
@@ -4056,6 +4056,7 @@ static const struct qcom_reset_map gcc_msm8976_resets[] = {
[RST_CAMSS_CSI_VFE1_BCR] = { 0x58070 },
[RST_CAMSS_VFE1_BCR] = { 0x5807c },
[RST_CAMSS_CPP_BCR] = { 0x58080 },
+ [RST_MSS_BCR] = { 0x71000 },
};
static struct gdsc *gcc_msm8976_gdscs[] = {
--
2.25.1
Thank you for your patch. There is something to discuss/improve.
On 25/04/2022 20:51, Adam Skladowski wrote:
> Just like in case of other SoCs change SDCC1/SDCC2 ops to floor to avoid overclocking controller.
> This commit only sets SDCC1/SDCC2 which are used for EMMC/SDCARD.
> It leaves SDCC3 because on this platform it's mostly used for WIFI/BT chips like on Sony Loire family devices.
You need to wrap your commit msg.
https://elixir.bootlin.com/linux/v5.18-rc4/source/Documentation/process/submitting-patches.rst#L586
Best regards,
Krzysztof