Add multiple chip select lines supported on Tegra 241
Changes in v2:
Split Wait polling changes to be handled later
Change chip name to convention followed (Grace to 241)
Add tegra qspi peripherals yaml file
Krishna Yarlagadda (3):
spi: tegra210-quad: Multi-cs support
spi: dt-bindings: split peripheral prods
spi: dt-bindings: Add compatible for Tegra241 QSPI
...nvidia,tegra210-quad-peripheral-props.yaml | 45 +++++++++++++++++++
.../bindings/spi/nvidia,tegra210-quad.yaml | 33 +-------------
.../bindings/spi/spi-peripheral-props.yaml | 1 +
drivers/spi/spi-tegra210-quad.c | 33 +++++++++++++-
4 files changed, 78 insertions(+), 34 deletions(-)
create mode 100644 Documentation/devicetree/bindings/spi/nvidia,tegra210-quad-peripheral-props.yaml
--
2.17.1
Move peripheral properties for Tegra QSPI controller to
nvidia,tegra210-quad-peripheral-props.yaml and add reference
to spi-peripheral-props.yaml file.
Signed-off-by: Krishna Yarlagadda <[email protected]>
---
...nvidia,tegra210-quad-peripheral-props.yaml | 45 +++++++++++++++++++
.../bindings/spi/nvidia,tegra210-quad.yaml | 32 -------------
.../bindings/spi/spi-peripheral-props.yaml | 1 +
3 files changed, 46 insertions(+), 32 deletions(-)
create mode 100644 Documentation/devicetree/bindings/spi/nvidia,tegra210-quad-peripheral-props.yaml
diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad-peripheral-props.yaml
new file mode 100644
index 000000000000..f91347759c65
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad-peripheral-props.yaml
@@ -0,0 +1,45 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/nvidia,tegra210-quad-peripheral-props.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Peripheral properties for Tegra Quad SPI Controller
+
+maintainers:
+ - Thierry Reding <[email protected]>
+ - Jonathan Hunter <[email protected]>
+
+properties:
+ reg:
+ maxItems: 1
+
+ spi-rx-bus-width:
+ enum: [1, 2, 4]
+
+ spi-tx-bus-width:
+ enum: [1, 2, 4]
+
+ nvidia,tx-clk-tap-delay:
+ description:
+ Delays the clock going out to device with this tap value.
+ Tap value varies based on platform design trace lengths from Tegra
+ QSPI to corresponding slave device.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 31
+
+ nvidia,rx-clk-tap-delay:
+ description:
+ Delays the clock coming in from the device with this tap value.
+ Tap value varies based on platform design trace lengths from Tegra
+ QSPI to corresponding slave device.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 255
+
+required:
+ - reg
+
+unevaluatedProperties: false
+
diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml b/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml
index 0296edd1de22..7d60bb1af047 100644
--- a/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml
+++ b/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml
@@ -21,9 +21,6 @@ properties:
- nvidia,tegra194-qspi
- nvidia,tegra234-qspi
- reg:
- maxItems: 1
-
interrupts:
maxItems: 1
@@ -50,37 +47,8 @@ patternProperties:
"@[0-9a-f]+":
type: object
- properties:
- spi-rx-bus-width:
- enum: [1, 2, 4]
-
- spi-tx-bus-width:
- enum: [1, 2, 4]
-
- nvidia,tx-clk-tap-delay:
- description:
- Delays the clock going out to device with this tap value.
- Tap value varies based on platform design trace lengths from Tegra
- QSPI to corresponding slave device.
- $ref: /schemas/types.yaml#/definitions/uint32
- minimum: 0
- maximum: 31
-
- nvidia,rx-clk-tap-delay:
- description:
- Delays the clock coming in from the device with this tap value.
- Tap value varies based on platform design trace lengths from Tegra
- QSPI to corresponding slave device.
- $ref: /schemas/types.yaml#/definitions/uint32
- minimum: 0
- maximum: 255
-
- required:
- - reg
-
required:
- compatible
- - reg
- interrupts
- clock-names
- clocks
diff --git a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml
index 5e32928c4fc3..cf589d17b0f5 100644
--- a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml
+++ b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml
@@ -112,5 +112,6 @@ properties:
allOf:
- $ref: cdns,qspi-nor-peripheral-props.yaml#
- $ref: samsung,spi-peripheral-props.yaml#
+ - $ref: nvidia,tegra210-quad-peripheral-props.yaml#
additionalProperties: true
--
2.17.1
On 13/05/2022 09:08, Krishna Yarlagadda wrote:
> Move peripheral properties for Tegra QSPI controller to
> nvidia,tegra210-quad-peripheral-props.yaml and add reference
> to spi-peripheral-props.yaml file.
An explanation of why we are doing this would help.
Cheers
Jon
--
nvpublic
Add new compatible for Tegra241 QSPI controller which has
multiple chip select lines.
Signed-off-by: Krishna Yarlagadda <[email protected]>
---
Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml b/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml
index 7d60bb1af047..3ba9df4f3a0b 100644
--- a/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml
+++ b/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml
@@ -20,6 +20,7 @@ properties:
- nvidia,tegra186-qspi
- nvidia,tegra194-qspi
- nvidia,tegra234-qspi
+ - nvidia,tegra241-qspi
interrupts:
maxItems: 1
--
2.17.1
On Fri, May 13, 2022 at 01:38:27PM +0530, Krishna Yarlagadda wrote:
> Move peripheral properties for Tegra QSPI controller to
> nvidia,tegra210-quad-peripheral-props.yaml and add reference
> to spi-peripheral-props.yaml file.
>
> Signed-off-by: Krishna Yarlagadda <[email protected]>
> ---
> ...nvidia,tegra210-quad-peripheral-props.yaml | 45 +++++++++++++++++++
> .../bindings/spi/nvidia,tegra210-quad.yaml | 32 -------------
> .../bindings/spi/spi-peripheral-props.yaml | 1 +
> 3 files changed, 46 insertions(+), 32 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/spi/nvidia,tegra210-quad-peripheral-props.yaml
>
> diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad-peripheral-props.yaml
> new file mode 100644
> index 000000000000..f91347759c65
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad-peripheral-props.yaml
> @@ -0,0 +1,45 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/spi/nvidia,tegra210-quad-peripheral-props.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Peripheral properties for Tegra Quad SPI Controller
> +
> +maintainers:
> + - Thierry Reding <[email protected]>
> + - Jonathan Hunter <[email protected]>
> +
> +properties:
> + reg:
> + maxItems: 1
> +
> + spi-rx-bus-width:
> + enum: [1, 2, 4]
> +
> + spi-tx-bus-width:
> + enum: [1, 2, 4]
You've just set the constraints for everyone. This needs to stay in your
controller schema as it's an additional constraint on your controller.
> +
> + nvidia,tx-clk-tap-delay:
> + description:
> + Delays the clock going out to device with this tap value.
> + Tap value varies based on platform design trace lengths from Tegra
> + QSPI to corresponding slave device.
> + $ref: /schemas/types.yaml#/definitions/uint32
> + minimum: 0
> + maximum: 31
> +
> + nvidia,rx-clk-tap-delay:
> + description:
> + Delays the clock coming in from the device with this tap value.
> + Tap value varies based on platform design trace lengths from Tegra
> + QSPI to corresponding slave device.
> + $ref: /schemas/types.yaml#/definitions/uint32
> + minimum: 0
> + maximum: 255
> +
> +required:
> + - reg
Pretty sure we captured that elsewhere.
> +
> +unevaluatedProperties: false
This is why this patch makes everything fail. This means the only
properties allowed for any SPI child are the above ones. You need
'additionalProperties: true' here.
> +
> diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml b/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml
> index 0296edd1de22..7d60bb1af047 100644
> --- a/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml
> +++ b/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml
> @@ -21,9 +21,6 @@ properties:
> - nvidia,tegra194-qspi
> - nvidia,tegra234-qspi
>
> - reg:
> - maxItems: 1
Umm, this is for your controller registers. I think you need them.
> -
> interrupts:
> maxItems: 1
>
> @@ -50,37 +47,8 @@ patternProperties:
> "@[0-9a-f]+":
> type: object
>
> - properties:
> - spi-rx-bus-width:
> - enum: [1, 2, 4]
> -
> - spi-tx-bus-width:
> - enum: [1, 2, 4]
> -
> - nvidia,tx-clk-tap-delay:
> - description:
> - Delays the clock going out to device with this tap value.
> - Tap value varies based on platform design trace lengths from Tegra
> - QSPI to corresponding slave device.
> - $ref: /schemas/types.yaml#/definitions/uint32
> - minimum: 0
> - maximum: 31
> -
> - nvidia,rx-clk-tap-delay:
> - description:
> - Delays the clock coming in from the device with this tap value.
> - Tap value varies based on platform design trace lengths from Tegra
> - QSPI to corresponding slave device.
> - $ref: /schemas/types.yaml#/definitions/uint32
> - minimum: 0
> - maximum: 255
> -
> - required:
> - - reg
> -
> required:
> - compatible
> - - reg
> - interrupts
> - clock-names
> - clocks
> diff --git a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml
> index 5e32928c4fc3..cf589d17b0f5 100644
> --- a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml
> +++ b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml
> @@ -112,5 +112,6 @@ properties:
> allOf:
> - $ref: cdns,qspi-nor-peripheral-props.yaml#
> - $ref: samsung,spi-peripheral-props.yaml#
> + - $ref: nvidia,tegra210-quad-peripheral-props.yaml#
>
> additionalProperties: true
> --
> 2.17.1
>
>
On Fri, 13 May 2022 13:38:25 +0530, Krishna Yarlagadda wrote:
> Add multiple chip select lines supported on Tegra 241
>
> Changes in v2:
> Split Wait polling changes to be handled later
> Change chip name to convention followed (Grace to 241)
> Add tegra qspi peripherals yaml file
>
> [...]
Applied to
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next
Thanks!
[1/3] spi: tegra210-quad: Multi-cs support
commit: b76134178168b5104851b3c72d9b1092b7414ff9
[2/3] spi: dt-bindings: split peripheral prods
commit: e23917822d3cb1f5270ab0d327da713cda72f8f2
[3/3] spi: dt-bindings: Add compatible for Tegra241 QSPI
commit: 4f37809f4cdf0cdb8d4431e779f56d1f0dec3fb5
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark