SDHCI controller claims DDR, HS200 and HS400 1.8V support, however it
cannot achieve those using the 2.95V I/O that is the default set by
firmware.
Since we know have access to the PMP8074 PMIC provided LDO that provides
the I/O voltage set it as VQMMC supply so that higher speeds can actually
be achieved.
Signed-off-by: Robert Marko <[email protected]>
---
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index 906468ee990e..2e8765aa8f37 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -476,6 +476,8 @@ sdhc_1: sdhci@7824900 {
mmc-hs400-1_8v;
bus-width = <8>;
+ vqmmc-supply = <&l11>;
+
status = "disabled";
};
--
2.36.1