From: qianfan Zhao <[email protected]>
OPP table value is get from allwinner lichee linux-3.10 kernel driver
Signed-off-by: qianfan Zhao <[email protected]>
---
arch/arm/boot/dts/sun8i-r40.dtsi | 42 ++++++++++++++++++++++++++++++++
1 file changed, 42 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
index 291f4784e86c..8949153eb0eb 100644
--- a/arch/arm/boot/dts/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
@@ -54,6 +54,36 @@ / {
#size-cells = <1>;
interrupt-parent = <&gic>;
+ cpu0_opp_table: opp_table0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp-720000000 {
+ opp-hz = /bits/ 64 <720000000>;
+ opp-microvolt = <1000000 1000000 1300000>;
+ clock-latency-ns = <2000000>;
+ };
+
+ opp-912000000 {
+ opp-hz = /bits/ 64 <912000000>;
+ opp-microvolt = <1100000 1100000 1300000>;
+ clock-latency-ns = <2000000>;
+ };
+
+ opp-1008000000 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <1160000 1160000 1300000>;
+ clock-latency-ns = <2000000>;
+ };
+
+ /* The opp table of the cpu frequency that exceeds 1G
+ * is not defined here. They require higher operating
+ * current, which may exceed the 500mA limited if the
+ * system is powered by USB. You can add them to the
+ * board's DTS is you make sure.
+ */
+ };
+
clocks {
#address-cells = <1>;
#size-cells = <1>;
@@ -84,24 +114,36 @@ cpu0: cpu@0 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <0>;
+ clocks = <&ccu CLK_CPU>;
+ clock-names = "cpu";
+ operating-points-v2 = <&cpu0_opp_table>;
};
cpu1: cpu@1 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <1>;
+ clocks = <&ccu CLK_CPU>;
+ clock-names = "cpu";
+ operating-points-v2 = <&cpu0_opp_table>;
};
cpu2: cpu@2 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <2>;
+ clocks = <&ccu CLK_CPU>;
+ clock-names = "cpu";
+ operating-points-v2 = <&cpu0_opp_table>;
};
cpu3: cpu@3 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <3>;
+ clocks = <&ccu CLK_CPU>;
+ clock-names = "cpu";
+ operating-points-v2 = <&cpu0_opp_table>;
};
};
--
2.25.1
On Mon, May 16, 2022 at 10:15:16AM +0800, [email protected] wrote:
> From: qianfan Zhao <[email protected]>
>
> OPP table value is get from allwinner lichee linux-3.10 kernel driver
>
> Signed-off-by: qianfan Zhao <[email protected]>
> ---
> arch/arm/boot/dts/sun8i-r40.dtsi | 42 ++++++++++++++++++++++++++++++++
> 1 file changed, 42 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
> index 291f4784e86c..8949153eb0eb 100644
> --- a/arch/arm/boot/dts/sun8i-r40.dtsi
> +++ b/arch/arm/boot/dts/sun8i-r40.dtsi
> @@ -54,6 +54,36 @@ / {
> #size-cells = <1>;
> interrupt-parent = <&gic>;
>
> + cpu0_opp_table: opp_table0 {
> + compatible = "operating-points-v2";
> + opp-shared;
> +
> + opp-720000000 {
> + opp-hz = /bits/ 64 <720000000>;
> + opp-microvolt = <1000000 1000000 1300000>;
> + clock-latency-ns = <2000000>;
> + };
> +
> + opp-912000000 {
> + opp-hz = /bits/ 64 <912000000>;
> + opp-microvolt = <1100000 1100000 1300000>;
> + clock-latency-ns = <2000000>;
> + };
> +
> + opp-1008000000 {
> + opp-hz = /bits/ 64 <1008000000>;
> + opp-microvolt = <1160000 1160000 1300000>;
> + clock-latency-ns = <2000000>;
> + };
> +
> + /* The opp table of the cpu frequency that exceeds 1G
> + * is not defined here. They require higher operating
> + * current, which may exceed the 500mA limited if the
> + * system is powered by USB. You can add them to the
> + * board's DTS is you make sure.
> + */
That's not the issue though. The issue is that the board is setup with a
CPU voltage at 1160mV, and if we raise the frequency to a higher OPP
without raising the voltage as well, the CPU will crash.
Maxime
在 2022/5/16 16:53, Maxime Ripard 写道:
> On Mon, May 16, 2022 at 10:15:16AM +0800, [email protected] wrote:
>> From: qianfan Zhao <[email protected]>
>>
>> OPP table value is get from allwinner lichee linux-3.10 kernel driver
>>
>> Signed-off-by: qianfan Zhao <[email protected]>
>> ---
>> arch/arm/boot/dts/sun8i-r40.dtsi | 42 ++++++++++++++++++++++++++++++++
>> 1 file changed, 42 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
>> index 291f4784e86c..8949153eb0eb 100644
>> --- a/arch/arm/boot/dts/sun8i-r40.dtsi
>> +++ b/arch/arm/boot/dts/sun8i-r40.dtsi
>> @@ -54,6 +54,36 @@ / {
>> #size-cells = <1>;
>> interrupt-parent = <&gic>;
>>
>> + cpu0_opp_table: opp_table0 {
>> + compatible = "operating-points-v2";
>> + opp-shared;
>> +
>> + opp-720000000 {
>> + opp-hz = /bits/ 64 <720000000>;
>> + opp-microvolt = <1000000 1000000 1300000>;
>> + clock-latency-ns = <2000000>;
>> + };
>> +
>> + opp-912000000 {
>> + opp-hz = /bits/ 64 <912000000>;
>> + opp-microvolt = <1100000 1100000 1300000>;
>> + clock-latency-ns = <2000000>;
>> + };
>> +
>> + opp-1008000000 {
>> + opp-hz = /bits/ 64 <1008000000>;
>> + opp-microvolt = <1160000 1160000 1300000>;
>> + clock-latency-ns = <2000000>;
>> + };
>> +
>> + /* The opp table of the cpu frequency that exceeds 1G
>> + * is not defined here. They require higher operating
>> + * current, which may exceed the 500mA limited if the
>> + * system is powered by USB. You can add them to the
>> + * board's DTS is you make sure.
>> + */
> That's not the issue though. The issue is that the board is setup with a
> CPU voltage at 1160mV, and if we raise the frequency to a higher OPP
> without raising the voltage as well, the CPU will crash.
Yes, this is a issue and if the dts doesn't has "cpu-supply" node.
The comment above is found while testing. 100% cpu load @ 4x1.2G
will consume about 800mA@5V current, the board will reboot if it
is powered by USB. So I leave those comments.
I am thinking your suggestion to write the opp part to a dtsi like
A64. Should I adding all supported freq?
I am preparing a new version which including cpu cooling.
>
> Maxime