On Thu, May 19, 2022 at 08:55:08PM +0800, Rex-BC Chen wrote:
> In this series, we cleanup MediaTek clock reset drivers in clk/mediatek
> folder. MediaTek clock reset driver is used to provide reset control
> of modules controlled in clk, like infra_ao.
>
> Changes for v7:
> 1. v7 is based on linux-next next-20220519 and Chen-Yu's series[1].
> 2. Add support for MT8186.
>
> [1]: https://patchwork.kernel.org/project/linux-mediatek/list/?series=643003
>
> Changes for v6:
> 1. Add a new patch to support inuput argument index mode.
> 2. Revise definition in reset.h to index.
>
> Rex-BC Chen (19):
> clk: mediatek: reset: Add reset.h
> clk: mediatek: reset: Fix written reset bit offset
> clk: mediatek: reset: Refine and reorder functions in reset.c
> clk: mediatek: reset: Extract common drivers to update function
> clk: mediatek: reset: Merge and revise reset register function
> clk: mediatek: reset: Revise structure to control reset register
> clk: mediatek: reset: Support nonsequence base offsets of reset
> registers
> clk: mediatek: reset: Support inuput argument index mode
> clk: mediatek: reset: Change return type for clock reset register
> function
> clk: mediatek: reset: Add new register reset function with device
> clk: mediatek: reset: Add reset support for simple probe
> dt-bindings: arm: mediatek: Add #reset-cells property for
> MT8192/MT8195
> dt-bindings: reset: mediatek: Add infra_ao reset index for
> MT8192/MT8195
> clk: mediatek: reset: Add infra_ao reset support for MT8192/MT8195
> arm64: dts: mediatek: Add infra #reset-cells property for MT8192
> arm64: dts: mediatek: Add infra #reset-cells property for MT8195
> dt-bindings: reset: mediatek: Add infra_ao reset index for MT8186
> dt-bindings: arm: mediatek: Add #reset-cells property for MT8186
> clk: mediatek: reset: Add infra_ao reset support for MT8186
For the whole series:
Reviewed-by: N?colas F. R. A. Prado <[email protected]>
And also
Tested-by: N?colas F. R. A. Prado <[email protected]>
on mt8192-asurada-spherion. PCIe resets work as intended by adding on the pcie
node
+ resets = <&infracfg MT8192_INFRA_RST2_PEXTP_PHY_SWRST>,
+ <&infracfg MT8192_INFRA_RST4_PCIE_TOP_SWRST>;
+ reset-names = "phy", "mac";
Thanks for the great work on this series, Rex!
N?colas