The hartid can be a 64bit value on RV64 platforms. This series updates
the code so that 64bit hartid can be supported on RV64 platforms.
The series has been tested on both RV32 and RV64 qemu platforms.
Changes since V2:
1) Modified commit messages to mention RV64 and add RB tags.
Changes since V1:
1) Updated RB tag for PATCH 1 and PATCH3
2) Type Casting NR_CPUS before comparing with hartid in PATCH 2
3) Changed commit message of PATCH 2 to provide details about
the bug it is fixing.
4) Updated PATCH 5 for unaligned 64bit read
Sunil V L (5):
riscv: cpu_ops_sbi: Add 64bit hartid support on RV64
riscv: spinwait: Fix hartid variable type
riscv: smp: Add 64bit hartid support on RV64
riscv: cpu: Add 64bit hartid support on RV64
riscv/efi_stub: Add 64bit boot-hartid support on RV64
arch/riscv/include/asm/processor.h | 4 ++--
arch/riscv/include/asm/smp.h | 4 ++--
arch/riscv/kernel/cpu.c | 26 +++++++++++++----------
arch/riscv/kernel/cpu_ops_sbi.c | 4 ++--
arch/riscv/kernel/cpu_ops_spinwait.c | 4 ++--
arch/riscv/kernel/cpufeature.c | 6 ++++--
arch/riscv/kernel/smp.c | 4 ++--
arch/riscv/kernel/smpboot.c | 9 ++++----
drivers/clocksource/timer-riscv.c | 15 +++++++------
drivers/firmware/efi/libstub/riscv-stub.c | 13 +++++++++---
drivers/irqchip/irq-riscv-intc.c | 7 +++---
drivers/irqchip/irq-sifive-plic.c | 7 +++---
12 files changed, 60 insertions(+), 43 deletions(-)
--
2.25.1
The hartid variable is of type int but compared with
ULONG_MAX(INVALID_HARTID). This issue is fixed by changing
the hartid variable type to unsigned long.
Fixes: c78f94f35cf6 ("RISC-V: Use __cpu_up_stack/task_pointer only for spinwait method")
Cc: [email protected]
Signed-off-by: Sunil V L <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
---
arch/riscv/kernel/cpu_ops_spinwait.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/kernel/cpu_ops_spinwait.c b/arch/riscv/kernel/cpu_ops_spinwait.c
index 346847f6c41c..3ade9152a3c7 100644
--- a/arch/riscv/kernel/cpu_ops_spinwait.c
+++ b/arch/riscv/kernel/cpu_ops_spinwait.c
@@ -18,7 +18,7 @@ void *__cpu_spinwait_task_pointer[NR_CPUS] __section(".data");
static void cpu_update_secondary_bootdata(unsigned int cpuid,
struct task_struct *tidle)
{
- int hartid = cpuid_to_hartid_map(cpuid);
+ unsigned long hartid = cpuid_to_hartid_map(cpuid);
/*
* The hartid must be less than NR_CPUS to avoid out-of-bound access
@@ -27,7 +27,7 @@ static void cpu_update_secondary_bootdata(unsigned int cpuid,
* spinwait booting is not the recommended approach for any platforms
* booting Linux in S-mode and can be disabled in the future.
*/
- if (hartid == INVALID_HARTID || hartid >= NR_CPUS)
+ if (hartid == INVALID_HARTID || hartid >= (unsigned long) NR_CPUS)
return;
/* Make sure tidle is updated */
--
2.25.1
The hartid can be a 64bit value on RV64 platforms.
Modify the hartid variable type to unsigned long so that it can
hold 64bit value on RV64 platforms.
Signed-off-by: Sunil V L <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
---
arch/riscv/kernel/cpu_ops_sbi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/kernel/cpu_ops_sbi.c b/arch/riscv/kernel/cpu_ops_sbi.c
index 4f5a6f84e2a4..efa0f0816634 100644
--- a/arch/riscv/kernel/cpu_ops_sbi.c
+++ b/arch/riscv/kernel/cpu_ops_sbi.c
@@ -65,7 +65,7 @@ static int sbi_hsm_hart_get_status(unsigned long hartid)
static int sbi_cpu_start(unsigned int cpuid, struct task_struct *tidle)
{
unsigned long boot_addr = __pa_symbol(secondary_start_sbi);
- int hartid = cpuid_to_hartid_map(cpuid);
+ unsigned long hartid = cpuid_to_hartid_map(cpuid);
unsigned long hsm_data;
struct sbi_hart_boot_data *bdata = &per_cpu(boot_data, cpuid);
@@ -107,7 +107,7 @@ static void sbi_cpu_stop(void)
static int sbi_cpu_is_stopped(unsigned int cpuid)
{
int rc;
- int hartid = cpuid_to_hartid_map(cpuid);
+ unsigned long hartid = cpuid_to_hartid_map(cpuid);
rc = sbi_hsm_hart_get_status(hartid);
--
2.25.1
The boot-hartid can be a 64bit value on RV64 platforms but
the "boot-hartid" in DT is assumed to be 32bit only.
Detect the size of the "boot-hartid" in DT and use 32bit or 64bit
read appropriately.
Signed-off-by: Sunil V L <[email protected]>
---
drivers/firmware/efi/libstub/riscv-stub.c | 13 ++++++++++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/firmware/efi/libstub/riscv-stub.c b/drivers/firmware/efi/libstub/riscv-stub.c
index 9e85e58d1f27..b450ebf95977 100644
--- a/drivers/firmware/efi/libstub/riscv-stub.c
+++ b/drivers/firmware/efi/libstub/riscv-stub.c
@@ -8,6 +8,7 @@
#include <asm/efi.h>
#include <asm/sections.h>
+#include <asm/unaligned.h>
#include "efistub.h"
@@ -29,7 +30,7 @@ static int get_boot_hartid_from_fdt(void)
{
const void *fdt;
int chosen_node, len;
- const fdt32_t *prop;
+ const void *prop;
fdt = get_efi_config_table(DEVICE_TREE_GUID);
if (!fdt)
@@ -40,10 +41,16 @@ static int get_boot_hartid_from_fdt(void)
return -EINVAL;
prop = fdt_getprop((void *)fdt, chosen_node, "boot-hartid", &len);
- if (!prop || len != sizeof(u32))
+ if (!prop)
+ return -EINVAL;
+
+ if (len == sizeof(u32))
+ hartid = (unsigned long) fdt32_to_cpu(*(fdt32_t *)prop);
+ else if (len == sizeof(u64))
+ hartid = (unsigned long) fdt64_to_cpu(__get_unaligned_t(fdt64_t, prop));
+ else
return -EINVAL;
- hartid = fdt32_to_cpu(*prop);
return 0;
}
--
2.25.1
On Thu, 26 May 2022 22:17:38 PDT (-0700), [email protected] wrote:
> The hartid can be a 64bit value on RV64 platforms. This series updates
> the code so that 64bit hartid can be supported on RV64 platforms.
>
> The series has been tested on both RV32 and RV64 qemu platforms.
>
> Changes since V2:
> 1) Modified commit messages to mention RV64 and add RB tags.
>
> Changes since V1:
> 1) Updated RB tag for PATCH 1 and PATCH3
> 2) Type Casting NR_CPUS before comparing with hartid in PATCH 2
> 3) Changed commit message of PATCH 2 to provide details about
> the bug it is fixing.
> 4) Updated PATCH 5 for unaligned 64bit read
>
>
> Sunil V L (5):
> riscv: cpu_ops_sbi: Add 64bit hartid support on RV64
> riscv: spinwait: Fix hartid variable type
> riscv: smp: Add 64bit hartid support on RV64
> riscv: cpu: Add 64bit hartid support on RV64
> riscv/efi_stub: Add 64bit boot-hartid support on RV64
>
> arch/riscv/include/asm/processor.h | 4 ++--
> arch/riscv/include/asm/smp.h | 4 ++--
> arch/riscv/kernel/cpu.c | 26 +++++++++++++----------
> arch/riscv/kernel/cpu_ops_sbi.c | 4 ++--
> arch/riscv/kernel/cpu_ops_spinwait.c | 4 ++--
> arch/riscv/kernel/cpufeature.c | 6 ++++--
> arch/riscv/kernel/smp.c | 4 ++--
> arch/riscv/kernel/smpboot.c | 9 ++++----
> drivers/clocksource/timer-riscv.c | 15 +++++++------
> drivers/firmware/efi/libstub/riscv-stub.c | 13 +++++++++---
> drivers/irqchip/irq-riscv-intc.c | 7 +++---
> drivers/irqchip/irq-sifive-plic.c | 7 +++---
> 12 files changed, 60 insertions(+), 43 deletions(-)
Thanks, this is on for-next.