2022-05-31 19:24:14

by Rabara, Niravkumar L

[permalink] [raw]
Subject: [PATCH v2] arm64: dts: intel: socfpga_agilex: use defined GIC interrupt type for ECC

From: Niravkumar L Rabara <[email protected]>

Use defined GIC interrupt type instead of hard-coded numbers for ECC
(Error Correction Code) memory, which creates edac sysfs interface.

Signed-off-by: Niravkumar L Rabara <[email protected]>
---
arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
index caccb0334ada..7bbec8aafa62 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi
@@ -581,7 +581,7 @@ eccmgr {
sdramedac {
compatible = "altr,sdram-edac-s10";
altr,sdr-syscon = <&sdr>;
- interrupts = <16 4>;
+ interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
};

ocram-ecc@ff8cc000 {
@@ -589,7 +589,7 @@ ocram-ecc@ff8cc000 {
"altr,socfpga-a10-ocram-ecc";
reg = <0xff8cc000 0x100>;
altr,ecc-parent = <&ocram>;
- interrupts = <1 4>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
};

usb0-ecc@ff8c4000 {
@@ -597,7 +597,7 @@ usb0-ecc@ff8c4000 {
"altr,socfpga-usb-ecc";
reg = <0xff8c4000 0x100>;
altr,ecc-parent = <&usb0>;
- interrupts = <2 4>;
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
};

emac0-rx-ecc@ff8c0000 {
@@ -605,7 +605,7 @@ emac0-rx-ecc@ff8c0000 {
"altr,socfpga-eth-mac-ecc";
reg = <0xff8c0000 0x100>;
altr,ecc-parent = <&gmac0>;
- interrupts = <4 4>;
+ interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
};

emac0-tx-ecc@ff8c0400 {
@@ -613,7 +613,7 @@ emac0-tx-ecc@ff8c0400 {
"altr,socfpga-eth-mac-ecc";
reg = <0xff8c0400 0x100>;
altr,ecc-parent = <&gmac0>;
- interrupts = <5 4>;
+ interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
};

sdmmca-ecc@ff8c8c00 {
@@ -621,8 +621,8 @@ sdmmca-ecc@ff8c8c00 {
"altr,socfpga-sdmmc-ecc";
reg = <0xff8c8c00 0x100>;
altr,ecc-parent = <&mmc>;
- interrupts = <14 4>,
- <15 4>;
+ interrupts = <14 IRQ_TYPE_LEVEL_HIGH>,
+ <15 IRQ_TYPE_LEVEL_HIGH>;
};
};

--
2.25.1