Add support for QSGMII mode to am65-cpsw driver.
For full functionality of QSGMII mode in am65-cpsw driver, phy-gmii-sel
driver has to be configured. This has been implemented in another series
at:
https://lore.kernel.org/r/[email protected]
There is no direct dependency on the above series being merged.
Siddharth Vadapalli (3):
dt-bindings: net: ti: k3-am654-cpsw-nuss: Update bindings for J7200
CPSW5G
net: ethernet: ti: am65-cpsw: Add support for QSGMII mode
net: ethernet: ti: am65-cpsw: Move phy_set_mode_ext() to correct
location
.../bindings/net/ti,k3-am654-cpsw-nuss.yaml | 4 ++--
drivers/net/ethernet/ti/am65-cpsw-nuss.c | 22 ++++++++++++++-----
drivers/net/ethernet/ti/am65-cpsw-nuss.h | 1 +
3 files changed, 19 insertions(+), 8 deletions(-)
--
2.36.1
Update bindings for TI K3 J7200 SoC which contains 5 ports (4 external
ports) in order to support CPSW5G.
Changes made:
- Change pattern properties to support 4 ports.
- Change maximum number of CPSW ports to 4.
Signed-off-by: Siddharth Vadapalli <[email protected]>
---
.../devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml b/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml
index b8281d8be940..f9e6eb600b41 100644
--- a/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml
+++ b/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml
@@ -110,7 +110,7 @@ properties:
const: 0
patternProperties:
- port@[1-2]:
+ port@[1-4]:
type: object
description: CPSWxG NUSS external ports
@@ -119,7 +119,7 @@ properties:
properties:
reg:
minimum: 1
- maximum: 2
+ maximum: 4
description: CPSW port number
phys:
--
2.36.1