The Google Chameleon v3 is a board made for testing both video and audio
interfaces of external devices. It acts as a base board for the
Mercury+ AA1 module.
socfpga_arria10_mercury_aa1.dtsi and socfpga_arria10_chameleonv3.dts
have also been sent to u-boot:
https://lists.denx.de/pipermail/u-boot/2022-May/485107.html
https://lists.denx.de/pipermail/u-boot/2022-May/485111.html
v3 changes:
- make seperate group for Chameleon v3 in dt-bindings
- add blank line after copyright header
v2 changes:
- split first patch into three
- move sdmmc-ecc node to socfpga_arria10.dtsi (instead of removing it entirely)
- use generic names for dts node names
- keep the enclustra,mercury-aa1 compatible
Paweł Anikiel (5):
ARM: dts: socfpga: Change Mercury+ AA1 dts to dtsi
ARM: dts: socfpga: Move sdmmc-ecc node to Arria 10 dts
ARM: dts: socfpga: Add atsha204a node to Mercury+ AA1 dts
ARM: dts: socfpga: Add Google Chameleon v3 devicetree
dt-bindings: altera: Add Chameleon v3 board
.../devicetree/bindings/arm/altera.yaml | 8 ++
arch/arm/boot/dts/Makefile | 2 +-
arch/arm/boot/dts/socfpga_arria10.dtsi | 10 +++
.../boot/dts/socfpga_arria10_chameleonv3.dts | 90 +++++++++++++++++++
...1.dts => socfpga_arria10_mercury_aa1.dtsi} | 48 ++--------
5 files changed, 117 insertions(+), 41 deletions(-)
create mode 100644 arch/arm/boot/dts/socfpga_arria10_chameleonv3.dts
rename arch/arm/boot/dts/{socfpga_arria10_mercury_aa1.dts => socfpga_arria10_mercury_aa1.dtsi} (70%)
--
2.36.1.255.ge46751e96f-goog
The ecc manager is a part of the Arria 10 SoC, move it to the correct
dts.
Signed-off-by: Paweł Anikiel <[email protected]>
---
arch/arm/boot/dts/socfpga_arria10.dtsi | 10 ++++++++++
arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dtsi | 12 ------------
2 files changed, 10 insertions(+), 12 deletions(-)
diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index 26bda2557fe8..4370e3cbbb4b 100644
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -736,6 +736,16 @@ emac0-tx-ecc@ff8c0c00 {
<37 IRQ_TYPE_LEVEL_HIGH>;
};
+ sdmmca-ecc@ff8c2c00 {
+ compatible = "altr,socfpga-sdmmc-ecc";
+ reg = <0xff8c2c00 0x400>;
+ altr,ecc-parent = <&mmc>;
+ interrupts = <15 IRQ_TYPE_LEVEL_HIGH>,
+ <47 IRQ_TYPE_LEVEL_HIGH>,
+ <16 IRQ_TYPE_LEVEL_HIGH>,
+ <48 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
dma-ecc@ff8c8000 {
compatible = "altr,socfpga-dma-ecc";
reg = <0xff8c8000 0x400>;
diff --git a/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dtsi b/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dtsi
index 4b21351f2694..b0d20101cd00 100644
--- a/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dtsi
@@ -23,18 +23,6 @@ chosen {
};
};
-&eccmgr {
- sdmmca-ecc@ff8c2c00 {
- compatible = "altr,socfpga-sdmmc-ecc";
- reg = <0xff8c2c00 0x400>;
- altr,ecc-parent = <&mmc>;
- interrupts = <15 IRQ_TYPE_LEVEL_HIGH>,
- <47 IRQ_TYPE_LEVEL_HIGH>,
- <16 IRQ_TYPE_LEVEL_HIGH>,
- <48 IRQ_TYPE_LEVEL_HIGH>;
- };
-};
-
&gmac0 {
phy-mode = "rgmii";
phy-addr = <0xffffffff>; /* probe for phy addr */
--
2.36.1.255.ge46751e96f-goog