This adds a device-tree for the Radxa Rock Pi S; The first patch was
originally submitted a few years back but seems to have stalled. I've
adjusted it to sort the device nodes and drop duplication of dtsi
properties. The second patch adds support for a bunch of additional
peripherals.
Akash Gajjar (1):
arm64: dts: rockchip: add ROCK Pi S DTS support
Sjoerd Simons (1):
arm64: dts: rockchip: rock-pi-s add more peripherals
.../devicetree/bindings/arm/rockchip.yaml | 5 +
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3308-rock-pi-s.dts | 256 ++++++++++++++++++
3 files changed, 262 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
--
2.36.1
From: Akash Gajjar <[email protected]>
ROCK Pi S is RK3308 based SBC from radxa.com. ROCK Pi S has a,
- 256MB/512MB DDR3 RAM
- SD, NAND flash (optional on board 1/2/4/8Gb)
- 100MB ethernet, PoE (optional)
- Onboard 802.11 b/g/n wifi + Bluetooth 4.0 Module
- USB2.0 Type-A HOST x1
- USB3.0 Type-C OTG x1
- 26-pin expansion header
- USB Type-C DC 5V Power Supply
This patch enables
- Console
- NAND Flash
- SD Card
Signed-off-by: Akash Gajjar <[email protected]>
[sjoerd: Sort dt nodes, drop properties duplicated from dtsi]
Signed-off-by: Sjoerd Simons <[email protected]>
---
.../devicetree/bindings/arm/rockchip.yaml | 5 +
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3308-rock-pi-s.dts | 204 ++++++++++++++++++
3 files changed, 210 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml
index cf9eb1e8326a..7811ba64149c 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.yaml
+++ b/Documentation/devicetree/bindings/arm/rockchip.yaml
@@ -554,6 +554,11 @@ properties:
- const: vamrs,rk3399pro-vmarc-som
- const: rockchip,rk3399pro
+ - description: Radxa ROCK Pi S
+ items:
+ - const: radxa,rockpis
+ - const: rockchip,rk3308
+
- description: Radxa Rock2 Square
items:
- const: radxa,rock2-square
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 18d00eae3072..ef79a672804a 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -5,6 +5,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-ctouch2-of10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-edimm2.2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-evb.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-roc-cc.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-rock-pi-s.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3318-a95x-z2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
new file mode 100644
index 000000000000..9095efe25ccd
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
@@ -0,0 +1,204 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Akash Gajjar <[email protected]>
+ * Copyright (c) 2019 Jagan Teki <[email protected]>
+ */
+
+/dts-v1/;
+#include "rk3308.dtsi"
+
+/ {
+ model = "Radxa ROCK Pi S";
+ compatible = "radxa,rockpis", "rockchip,rk3308";
+
+ chosen {
+ stdout-path = "serial0:1500000n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&green_led_gio>, <&heartbeat_led_gpio>;
+
+ green-led {
+ default-state = "on";
+ gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
+ label = "rockpis:green:power";
+ linux,default-trigger = "default-on";
+ };
+
+ blue-led {
+ default-state = "on";
+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
+ label = "rockpis:blue:user";
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-0 = <&wifi_enable_h>;
+ pinctrl-names = "default";
+ reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
+ };
+
+ vcc_1v8: vcc-1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_1v8";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&vcc_io>;
+ };
+
+ vcc_io: vcc-io {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_io";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc_ddr: vcc-ddr {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_ddr";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc5v0_otg: vcc5v0-otg {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&otg_vbus_drv>;
+ regulator-name = "vcc5v0_otg";
+ regulator-always-on;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc5v0_sys: vcc5v0-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+
+ vdd_core: vdd-core {
+ compatible = "pwm-regulator";
+ pwms = <&pwm0 0 5000 1>;
+ pwm-supply = <&vcc5v0_sys>;
+ regulator-name = "vdd_core";
+ regulator-min-microvolt = <827000>;
+ regulator-max-microvolt = <1340000>;
+ regulator-init-microvolt = <1015000>;
+ regulator-settling-time-up-us = <250>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+
+ vdd_log: vdd-log {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_log";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1050000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_core>;
+};
+
+&emmc {
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ mmc-hs200-1_8v;
+ non-removable;
+ vmmc-supply = <&vcc_io>;
+ status = "okay";
+};
+
+&i2c1 {
+ status = "okay";
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rtc_32k>;
+
+ leds {
+ green_led_gio: green-led-gpio {
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ heartbeat_led_gpio: heartbeat-led-gpio {
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ usb {
+ otg_vbus_drv: otg-vbus-drv {
+ rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ sdio-pwrseq {
+ wifi_enable_h: wifi-enable-h {
+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ wifi_host_wake: wifi-host-wake {
+ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+ };
+};
+
+&pwm0 {
+ status = "okay";
+ pinctrl-0 = <&pwm0_pin_pull_down>;
+};
+
+&saradc {
+ vref-supply = <&vcc_1v8>;
+ status = "okay";
+};
+
+&sdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ keep-power-in-suspend;
+ max-frequency = <1000000>;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ non-removable;
+ sd-uhs-sdr104;
+ status = "okay";
+};
+
+&sdmmc {
+ cap-sd-highspeed;
+ status = "okay";
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart4 {
+ status = "okay";
+};
--
2.36.1
This enables the following peripherals:
* Onboard ethernet support
* Bluetooth
* USB 2 port
* OTG port via type-c connector
* Hardware watchog
Also add aliases for the mmc devices and the ethernet interface
Signed-off-by: Sjoerd Simons <[email protected]>
---
.../boot/dts/rockchip/rk3308-rock-pi-s.dts | 52 +++++++++++++++++++
1 file changed, 52 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
index 9095efe25ccd..46ba48b843c5 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
@@ -11,6 +11,12 @@ / {
model = "Radxa ROCK Pi S";
compatible = "radxa,rockpis", "rockchip,rk3308";
+ aliases {
+ ethernet0 = &gmac;
+ mmc0 = &emmc;
+ mmc1 = &sdmmc;
+ };
+
chosen {
stdout-path = "serial0:1500000n8";
};
@@ -132,6 +138,15 @@ &emmc {
status = "okay";
};
+&gmac {
+ clock_in_out = "output";
+ phy-supply = <&vcc_io>;
+ snps,reset-gpio = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
+ snps,reset-active-low;
+ snps,reset-delays-us = <0 50000 50000>;
+ status = "okay";
+};
+
&i2c1 {
status = "okay";
};
@@ -195,10 +210,47 @@ &sdmmc {
status = "okay";
};
+&u2phy {
+ status = "okay";
+
+ u2phy_host: host-port {
+ phy-supply = <&vcc5v0_otg>;
+ status = "okay";
+ };
+
+ u2phy_otg: otg-port {
+ phy-supply = <&vcc5v0_otg>;
+ status = "okay";
+ };
+};
+
&uart0 {
status = "okay";
};
&uart4 {
status = "okay";
+
+ bluetooth {
+ compatible = "realtek,rtl8723bs-bt";
+ device-wake-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>;
+ host-wake-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&usb_host_ehci {
+ status = "okay";
+};
+
+&usb_host_ohci {
+ status = "okay";
+};
+
+&usb20_otg {
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
+&wdt {
+ status = "okay";
};
--
2.36.1
Hi,
On 6/6/22 10:26, Sjoerd Simons wrote:
> This enables the following peripherals:
> * Onboard ethernet support
> * Bluetooth
> * USB 2 port
> * OTG port via type-c connector
> * Hardware watchog
>
> Also add aliases for the mmc devices and the ethernet interface
>
> Signed-off-by: Sjoerd Simons <[email protected]>
>
> ---
>
> .../boot/dts/rockchip/rk3308-rock-pi-s.dts | 52 +++++++++++++++++++
> 1 file changed, 52 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
> index 9095efe25ccd..46ba48b843c5 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
> @@ -11,6 +11,12 @@ / {
> model = "Radxa ROCK Pi S";
> compatible = "radxa,rockpis", "rockchip,rk3308";
>
> + aliases {
> + ethernet0 = &gmac;
> + mmc0 = &emmc;
> + mmc1 = &sdmmc;
Sure? emmc is at address ff49000 which is larger than sdmmc's address
ff480000. I believe the aliases should be sorted w.r.t. addresses.
Best regards,
Michael
> + };
> +
> chosen {
> stdout-path = "serial0:1500000n8";
> };
> @@ -132,6 +138,15 @@ &emmc {
> status = "okay";
> };
>
> +&gmac {
> + clock_in_out = "output";
> + phy-supply = <&vcc_io>;
> + snps,reset-gpio = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
> + snps,reset-active-low;
> + snps,reset-delays-us = <0 50000 50000>;
> + status = "okay";
> +};
> +
> &i2c1 {
> status = "okay";
> };
> @@ -195,10 +210,47 @@ &sdmmc {
> status = "okay";
> };
>
> +&u2phy {
> + status = "okay";
> +
> + u2phy_host: host-port {
> + phy-supply = <&vcc5v0_otg>;
> + status = "okay";
> + };
> +
> + u2phy_otg: otg-port {
> + phy-supply = <&vcc5v0_otg>;
> + status = "okay";
> + };
> +};
> +
> &uart0 {
> status = "okay";
> };
>
> &uart4 {
> status = "okay";
> +
> + bluetooth {
> + compatible = "realtek,rtl8723bs-bt";
> + device-wake-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>;
> + host-wake-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
> + };
> +};
> +
> +&usb_host_ehci {
> + status = "okay";
> +};
> +
> +&usb_host_ohci {
> + status = "okay";
> +};
> +
> +&usb20_otg {
> + dr_mode = "peripheral";
> + status = "okay";
> +};
> +
> +&wdt {
> + status = "okay";
> };
Hey Michael,
On Mon, 2022-06-06 at 14:00 +0200, Michael Riesch wrote:
>
> > + aliases {
> > + ethernet0 = &gmac;
> > + mmc0 = &emmc;
> > + mmc1 = &sdmmc;
>
> Sure? emmc is at address ff49000 which is larger than sdmmc's address
> ff480000. I believe the aliases should be sorted w.r.t. addresses.
Do you have a reference about this sorting requirement?
Also do you mean that mmc0 should be &sdmmc *or* that the aliases
should have mmc1 listed first.
For reference the reason is that mmc0 is emmc is because it seems more
logical to have the builtin devices come first (e.g. as mmcblk0)
> Best regards,
> Michael
>
> > + };
> > +
> > chosen {
> > stdout-path = "serial0:1500000n8";
> > };
> > @@ -132,6 +138,15 @@ &emmc {
> > status = "okay";
> > };
> >
> > +&gmac {
> > + clock_in_out = "output";
> > + phy-supply = <&vcc_io>;
> > + snps,reset-gpio = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
> > + snps,reset-active-low;
> > + snps,reset-delays-us = <0 50000 50000>;
> > + status = "okay";
> > +};
> > +
> > &i2c1 {
> > status = "okay";
> > };
> > @@ -195,10 +210,47 @@ &sdmmc {
> > status = "okay";
> > };
> >
> > +&u2phy {
> > + status = "okay";
> > +
> > + u2phy_host: host-port {
> > + phy-supply = <&vcc5v0_otg>;
> > + status = "okay";
> > + };
> > +
> > + u2phy_otg: otg-port {
> > + phy-supply = <&vcc5v0_otg>;
> > + status = "okay";
> > + };
> > +};
> > +
> > &uart0 {
> > status = "okay";
> > };
> >
> > &uart4 {
> > status = "okay";
> > +
> > + bluetooth {
> > + compatible = "realtek,rtl8723bs-bt";
> > + device-wake-gpios = <&gpio4 RK_PB3
> > GPIO_ACTIVE_HIGH>;
> > + host-wake-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
> > + };
> > +};
> > +
> > +&usb_host_ehci {
> > + status = "okay";
> > +};
> > +
> > +&usb_host_ohci {
> > + status = "okay";
> > +};
> > +
> > +&usb20_otg {
> > + dr_mode = "peripheral";
> > + status = "okay";
> > +};
> > +
> > +&wdt {
> > + status = "okay";
> > };
--
Sjoerd Simons
Collabora Ltd.
Am Mittwoch, 8. Juni 2022, 14:07:33 CEST schrieb Sjoerd Simons:
> Hey Michael,
>
> On Mon, 2022-06-06 at 14:00 +0200, Michael Riesch wrote:
> >
> > > + aliases {
> > > + ethernet0 = &gmac;
> > > + mmc0 = &emmc;
> > > + mmc1 = &sdmmc;
> >
> > Sure? emmc is at address ff49000 which is larger than sdmmc's address
> > ff480000. I believe the aliases should be sorted w.r.t. addresses.
>
> Do you have a reference about this sorting requirement?
I do believe we used that mmcx -> *mmc-device sorted by address
when the aliases still were in the main soc dtsi. Simply because one
couldn't really know what was available on a specific board
(no emmc for example).
I guess now on a per-board level we could actually do that more relaxed
and let that be the decision of the board submitter ;-) .
Heiko
> Also do you mean that mmc0 should be &sdmmc *or* that the aliases
> should have mmc1 listed first.
>
> For reference the reason is that mmc0 is emmc is because it seems more
> logical to have the builtin devices come first (e.g. as mmcblk0)
>
>
> > Best regards,
> > Michael
> >
> > > + };
> > > +
> > > chosen {
> > > stdout-path = "serial0:1500000n8";
> > > };
> > > @@ -132,6 +138,15 @@ &emmc {
> > > status = "okay";
> > > };
> > >
> > > +&gmac {
> > > + clock_in_out = "output";
> > > + phy-supply = <&vcc_io>;
> > > + snps,reset-gpio = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
> > > + snps,reset-active-low;
> > > + snps,reset-delays-us = <0 50000 50000>;
> > > + status = "okay";
> > > +};
> > > +
> > > &i2c1 {
> > > status = "okay";
> > > };
> > > @@ -195,10 +210,47 @@ &sdmmc {
> > > status = "okay";
> > > };
> > >
> > > +&u2phy {
> > > + status = "okay";
> > > +
> > > + u2phy_host: host-port {
> > > + phy-supply = <&vcc5v0_otg>;
> > > + status = "okay";
> > > + };
> > > +
> > > + u2phy_otg: otg-port {
> > > + phy-supply = <&vcc5v0_otg>;
> > > + status = "okay";
> > > + };
> > > +};
> > > +
> > > &uart0 {
> > > status = "okay";
> > > };
> > >
> > > &uart4 {
> > > status = "okay";
> > > +
> > > + bluetooth {
> > > + compatible = "realtek,rtl8723bs-bt";
> > > + device-wake-gpios = <&gpio4 RK_PB3
> > > GPIO_ACTIVE_HIGH>;
> > > + host-wake-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
> > > + };
> > > +};
> > > +
> > > +&usb_host_ehci {
> > > + status = "okay";
> > > +};
> > > +
> > > +&usb_host_ohci {
> > > + status = "okay";
> > > +};
> > > +
> > > +&usb20_otg {
> > > + dr_mode = "peripheral";
> > > + status = "okay";
> > > +};
> > > +
> > > +&wdt {
> > > + status = "okay";
> > > };
>
>
Hi all,
On 6/8/22 14:19, Heiko Stübner wrote:
> Am Mittwoch, 8. Juni 2022, 14:07:33 CEST schrieb Sjoerd Simons:
>> Hey Michael,
>>
>> On Mon, 2022-06-06 at 14:00 +0200, Michael Riesch wrote:
>>>
>>>> + aliases {
>>>> + ethernet0 = &gmac;
>>>> + mmc0 = &emmc;
>>>> + mmc1 = &sdmmc;
>>>
>>> Sure? emmc is at address ff49000 which is larger than sdmmc's address
>>> ff480000. I believe the aliases should be sorted w.r.t. addresses.
>>
>> Do you have a reference about this sorting requirement?
No, not really. I did have the impression that such a convention existed...
> I do believe we used that mmcx -> *mmc-device sorted by address
> when the aliases still were in the main soc dtsi. Simply because one
> couldn't really know what was available on a specific board
> (no emmc for example).
... and this seems to be the case indeed...
> I guess now on a per-board level we could actually do that more relaxed
> and let that be the decision of the board submitter ;-) .
... but apparently the convention is not that crucial anymore :-) Just
wanted to point it out.
>> Also do you mean that mmc0 should be &sdmmc *or* that the aliases
>> should have mmc1 listed first.
FTR, I would have suggested
mmc0 = &sdmmc;
mmc1 = &emmc;
according to said convention, but then I would also take a look on
whatever any other rk3308 boards do and aim to be in sync...
>> For reference the reason is that mmc0 is emmc is because it seems more
>> logical to have the builtin devices come first (e.g. as mmcblk0)
... unless there is a good reason not to. You be the judge of that ;-)
Best regards,
Michael
>> [...]
On Mon, Jun 06, 2022 at 10:26:27AM +0200, Sjoerd Simons wrote:
> From: Akash Gajjar <[email protected]>
>
> ROCK Pi S is RK3308 based SBC from radxa.com. ROCK Pi S has a,
> - 256MB/512MB DDR3 RAM
> - SD, NAND flash (optional on board 1/2/4/8Gb)
> - 100MB ethernet, PoE (optional)
> - Onboard 802.11 b/g/n wifi + Bluetooth 4.0 Module
> - USB2.0 Type-A HOST x1
> - USB3.0 Type-C OTG x1
> - 26-pin expansion header
> - USB Type-C DC 5V Power Supply
>
> This patch enables
> - Console
> - NAND Flash
> - SD Card
>
> Signed-off-by: Akash Gajjar <[email protected]>
> [sjoerd: Sort dt nodes, drop properties duplicated from dtsi]
> Signed-off-by: Sjoerd Simons <[email protected]>
> ---
>
> .../devicetree/bindings/arm/rockchip.yaml | 5 +
Bindings should be a separate patch.
> arch/arm64/boot/dts/rockchip/Makefile | 1 +
> .../boot/dts/rockchip/rk3308-rock-pi-s.dts | 204 ++++++++++++++++++
> 3 files changed, 210 insertions(+)
> create mode 100644 arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts