2022-06-06 16:17:18

by Russ Weight

[permalink] [raw]
Subject: [PATCH v23 0/5] FPGA MAX10 BMC Secure Update Driver

The MAX10 BMC Secure Update driver instantiates the new Firmware
Upload functionality of the Firmware Loader and provides the callback
functions required to support secure updates on Intel n3000 PAC
devices. This driver is implemented as a sub-driver of the Intel MAX10
BMC mfd driver.

This driver interacts with the HW secure update engine of the FPGA
card BMC in order to transfer new FPGA and BMC images to FLASH on
the FPGA card. Security is enforced by hardware and firmware. The
FPGA Card BMC Secure Update driver interacts with the firmware to
initiate an update, pass in the necessary data, and collect status
on the update.

This driver provides sysfs files for displaying the flash count, the
root entry hashes (REH), and the code-signing-key (CSK) cancellation
vectors.

Changelog v22 -> v23:
- Rebased for 5.19-rc1
- Added Acked-by tag from Yilun for patch #5

Changelog v21 -> v22:
- Added Tested-by tags from Tianfei and Acked-by tags from Yilun.
- Updated KernelVersion and Date in ABI documentation to 5.20 and
Sep 2022 respectively.
- Removed unnecessary alignment check for source address from
m10bmc_sec_prepare().
- Changed the handling of a misaligned blk_size in m10bmc_sec_write().
Instead of allocating an aligned buffer and copying the block, copy
the misaligned bytes into an unsigned int and write with
regmap_write().

Changelog v20 -> v21:
- Replace WARN_ON() calls in flash_count_show() and show_canceled_csk()
with a more elaborate test. Return -EINVAL and write a message to the
kernel log. Call WARN_ON_ONCE().
- Update m10bmc_sec_prepare() to ensure that the base address for an
update image is aligned with stride.
- Update m10bmc_sec_write() to handle a block size that is not aligned
with stride by allocating a zero-filled block that is aligned, and
copying the data before calling regmap_bulk_write().

Changelog v19 -> v20:
- Added text to commit messages to describe Root Entry Hashes (REH) and
Code Signing Key (CSK) cancellation.
- Use reverse christmas tree format for local variable declarations in
show_root_entry_hash().
- Remove WARN_ON() from show_root_entry_hash() and return -EINVAL if
sha_num_bytes is not a multiple of stride.
- Move MODULE_DEVICE_TABLE() macro to just beneath the definition of
intel_m10bmc_sec_ids[].

Changelog v18 -> v19:
- Change "card bmc" naming back to "m10 bmc" naming to be consistent
with the parent driver.

Changelog v17 -> v18:
- Changed the ABI documentation for the Root Entry Hashes to specify
string as the format for the output.
- Updated comments, strings and config options to more consistently
refer to the driver as the Intel FPGA Card BMC Secure Update driver.
- Removed an instance of dev_dbg().
- Deferred the call to firmware_upload_register() to a later patch
where the required ops are provided.
- Switched from MODULE_ALIAS() to MODULE_DEVICE_TABLE() in anticipation
of additional cards to be supported by the same driver.

Changelog v16 -> v17:
- Change m10bmc to cardbmc to reflect the fact that the future devices
will not necessarily use the MAX10. This affects filenames, configs,
symbol names, and the driver name.
- Update the Date and KernelVersion for the ABI documentation to Jul 2022
and 5.19 respectively.
- Updated the copyright end-date to 2022 for the secure update driver.
- Removed references to the FPGA Image Load class driver and replaced
them with the new firmware-upload service from the firmware loader.
- Use xarray_alloc to generate a unique number/name firmware-upload.
- Chang the license from GPL to GPLv2 per commit bf7fbeeae6db ("module:
Cure the MODULE_LICENSE "GPL" vs. "GPL v2" bogosity")
- fw_upload_ops functions will return "enum fw_upload_err" data types
instead of integer values.

Changelog v15 -> v16:
- Use 0 instead of FPGA_IMAGE_ERR_NONE to indicate success.
- The size alignment check was moved from the FPGA Image Load framework
to the prepare() op.
- Added cancel_request boolean flag to struct m10bmc_sec.
- Moved the RSU cancellation logic from m10bmc_sec_cancel() to a new
rsu_cancel() function.
- The m10bmc_sec_cancel() function ONLY sets the cancel_request flag.
The cancel_request flag is checked at the beginning of the
m10bmc_sec_write() and m10bmc_sec_poll_complete() functions.
- Adapt to changed prototypes for the prepare() and write() ops. The
m10bmc_sec_write_blk() function has been renamed to
m10bmc_sec_write().
- Created a cleanup op, m10bmc_sec_cleanup(), to attempt to cancel an
ongoing op during when exiting the update process.

Changelog v14 -> v15:
- Updated the Dates and KernelVersions in the ABI documentation
- Change driver name from "n3000bmc-secure" to "n3000bmc-sec-update".
- Change CONFIG_FPGA_M10_BMC_SECURE to CONFIG_FPGA_M10_BMC_SEC_UPDATE.
- Change instances of *bmc-secure to *bmc-sec-update in file name
and symbol names.
- Change instances of *m10bmc_secure* to *m10bmc-sec_update* in symbol
names.
- Adapted to changes in the FPGA Image Load framework:
(1) All enum types (progress and errors) are now type u32
(2) m10bmc_sec_write_blk() adds *blk_size and max_size parameters
and uses *blk_size as provided by the caller.
(3) m10bmc_sec_poll_complete() no long checks the driver_unload
flag.

Changelog v13 -> v14:
- Changed symbol and text references to reflect the renaming of the
Security Manager Class driver to FPGA Image Load.

Changelog v12 -> v13:
- Updated copyright to 2021
- Updated Date and KernelVersion fields in ABI documentation
- Call updated fpga_sec_mgr_register() and fpga_sec_mgr_unregister()
functions instead of devm_fpga_sec_mgr_create() and
devm_fpga_sec_mgr_register().

Changelog v11 -> v12:
- Updated Date and KernelVersion fields in ABI documentation
- Removed size parameter from the write_blk() op. m10bmc_sec_write_blk()
no longer has a size parameter, and the block size is determined
in this (the lower-level) driver.

Changelog v10 -> v11:
- Added Reviewed-by tag to patch #1

Changelog v9 -> v10:
- Changed the path expressions in the sysfs documentation to
replace the n3000 reference with something more generic to
accommodate other devices that use the same driver.

Changelog v8 -> v9:
- Rebased to 5.12-rc2 next
- Updated Date and KernelVersion in ABI documentation

Changelog v7 -> v8:
- Split out patch "mfd: intel-m10-bmc: support for MAX10 BMC Secure
Updates" and submitted it separately:
https://marc.info/?l=linux-kernel&m=161126987101096&w=2

Changelog v6 -> v7:
- Rebased patches for 5.11-rc2
- Updated Date and KernelVersion in ABI documentation

Changelog v5 -> v6:
- Added WARN_ON() prior to several calls to regmap_bulk_read()
to assert that the (SIZE / stride) calculations did not result
in remainders.
- Changed the (size / stride) calculation in regmap_bulk_write()
call to ensure that we don't write one less than intended.
- Changed flash_count_show() parameter list to achieve
reverse-christmas tree format.
- Removed unnecessary call to rsu_check_complete() in
m10bmc_sec_poll_complete() and changed while loop to
do/while loop.
- Initialized auth_result and doorbell to HW_ERRINFO_POISON
in m10bmc_sec_hw_errinfo() and removed unnecessary if statements.

Changelog v4 -> v5:
- Renamed sysfs node user_flash_count to flash_count and updated
the sysfs documentation accordingly to more accurately descirbe
the purpose of the count.

Changelog v3 -> v4:
- Moved sysfs files for displaying the flash count, the root
entry hashes (REH), and the code-signing-key (CSK) cancellation
vectors from the FPGA Security Manager class driver to this
driver (as they are not generic enough for the class driver).
- Added a new ABI documentation file with informtaion about the
new sysfs entries: sysfs-driver-intel-m10-bmc-secure
- Updated the MAINTAINERS file to add the new ABI documentation
file: sysfs-driver-intel-m10-bmc-secure
- Removed unnecessary ret variable from m10bmc_secure_probe()
- Incorporated new devm_fpga_sec_mgr_register() function into
m10bmc_secure_probe() and removed the m10bmc_secure_remove()
function.

Changelog v2 -> v3:
- Changed "MAX10 BMC Security Engine driver" to "MAX10 BMC Secure
Update driver"
- Changed from "Intel FPGA Security Manager" to FPGA Security Manager"
- Changed: iops -> sops, imgr -> smgr, IFPGA_ -> FPGA_, ifpga_ to fpga_
- Removed wrapper functions (m10bmc_raw_*, m10bmc_sys_*). The
underlying functions are now called directly.
- Changed "_root_entry_hash" to "_reh", with a comment explaining
what reh is.
- Renamed get_csk_vector() to m10bmc_csk_vector()
- Changed calling functions of functions that return "enum fpga_sec_err"
to check for (ret != FPGA_SEC_ERR_NONE) instead of (ret)

Changelog v1 -> v2:
- These patches were previously submitted as part of a larger V1
patch set under the title "Intel FPGA Security Manager Class Driver".
- Grouped all changes to include/linux/mfd/intel-m10-bmc.h into a
single patch: "mfd: intel-m10-bmc: support for MAX10 BMC Security
Engine".
- Removed ifpga_sec_mgr_init() and ifpga_sec_mgr_uinit() functions.
- Adapted to changes in the Intel FPGA Security Manager by splitting
the single call to ifpga_sec_mgr_register() into two function
calls: devm_ifpga_sec_mgr_create() and ifpga_sec_mgr_register().
- Replaced small function-creation macros for explicit function
declarations.
- Bug fix for the get_csk_vector() function to properly apply the
stride variable in calls to m10bmc_raw_bulk_read().
- Added m10bmc_ prefix to functions in m10bmc_iops structure
- Implemented HW_ERRINFO_POISON for m10bmc_sec_hw_errinfo() to
ensure that corresponding bits are set to 1 if we are unable
to read the doorbell or auth_result registers.
- Added comments and additional code cleanup per V1 review.

Russ Weight (5):
mfd: intel-m10-bmc: Rename n3000bmc-secure driver
fpga: m10bmc-sec: create max10 bmc secure update
fpga: m10bmc-sec: expose max10 flash update count
fpga: m10bmc-sec: expose max10 canceled keys in sysfs
fpga: m10bmc-sec: add max10 secure update functions

.../sysfs-driver-intel-m10-bmc-sec-update | 61 ++
MAINTAINERS | 7 +
drivers/fpga/Kconfig | 12 +
drivers/fpga/Makefile | 3 +
drivers/fpga/intel-m10-bmc-sec-update.c | 625 ++++++++++++++++++
drivers/mfd/intel-m10-bmc.c | 2 +-
6 files changed, 709 insertions(+), 1 deletion(-)
create mode 100644 Documentation/ABI/testing/sysfs-driver-intel-m10-bmc-sec-update
create mode 100644 drivers/fpga/intel-m10-bmc-sec-update.c


base-commit: f2906aa863381afb0015a9eb7fefad885d4e5a56
--
2.25.1


2022-06-06 16:17:24

by Russ Weight

[permalink] [raw]
Subject: [PATCH v23 1/5] mfd: intel-m10-bmc: Rename n3000bmc-secure driver

The n3000bmc-secure driver has changed to n3000bmc-sec-update. Update
the name in the list of the intel-m10-bmc sub-drivers.

Tested-by: Tianfei Zhang <[email protected]>
Acked-by: Xu Yilun <[email protected]>
Signed-off-by: Russ Weight <[email protected]>
---
v23:
- Rebased for 5.19-rc1
v22:
- Added Tested-by tag from Tianfei and Acked-by tag from Yilun.
v21:
- No change
v20:
- No change
v19:
- No change
v18:
- No change
v17:
- This is a new patch to change in the name of the secure update
driver.
---
drivers/mfd/intel-m10-bmc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mfd/intel-m10-bmc.c b/drivers/mfd/intel-m10-bmc.c
index 8db3bcf5fccc..f4d0d72573c8 100644
--- a/drivers/mfd/intel-m10-bmc.c
+++ b/drivers/mfd/intel-m10-bmc.c
@@ -26,7 +26,7 @@ static struct mfd_cell m10bmc_d5005_subdevs[] = {
static struct mfd_cell m10bmc_pacn3000_subdevs[] = {
{ .name = "n3000bmc-hwmon" },
{ .name = "n3000bmc-retimer" },
- { .name = "n3000bmc-secure" },
+ { .name = "n3000bmc-sec-update" },
};

static struct mfd_cell m10bmc_n5010_subdevs[] = {
--
2.25.1

2022-06-06 16:17:33

by Russ Weight

[permalink] [raw]
Subject: [PATCH v23 5/5] fpga: m10bmc-sec: add max10 secure update functions

Create firmware upload ops and call the Firmware Upload support of the
Firmware Loader subsystem to enable FPGA image uploads for secure
updates of BMC images, FPGA images, etc.

Tested-by: Tianfei Zhang <[email protected]>
Acked-by: Xu Yilun <[email protected]>
Signed-off-by: Russ Weight <[email protected]>
---
v23:
- Rebased for 5.19-rc1
- Added Acked-by tag from Yilun
v22:
- Added Tested-by tag from Tianfei.
- Removed unnecessary alignment check for source address from
m10bmc_sec_prepare().
- Changed the handling of a misaligned blk_size in m10bmc_sec_write().
Instead of allocating an aligned buffer and copying the block, copy
the misaligned bytes into an unsigned int and write with
regmap_write().
v21:
- Update m10bmc_sec_prepare() to ensure that the base address for an
update image is aligned with stride.
- Update m10bmc_sec_write() to handle a block size that is not aligned
with stride by allocating a zero-filled block that is aligned, and
copying the data before calling regmap_bulk_write().
v20:
- No change.
v19:
- Change "card bmc" naming back to "m10 bmc" naming to be consistent
with the parent driver.
v18:
- Moved the firmware_upload_register() function here from an earlier
patch since this is where the required ops are provided.
- Moved the bmc_sec_remove() function here from an earlier patch to
unregister the firmware driver and do cleanup.
v17:
- Change "m10bmc" in symbol names to "cardbmc" to reflect the fact that the
future devices will not necessarily use the MAX10.
- Change from image_load class driver to the new firmware_upload
functionality of the firmware_loader.
- fw_upload_ops functions will return "enum fw_upload_err" data types
instead of integer values.
v16:
- Use 0 instead of FPGA_IMAGE_ERR_NONE to indicate success.
- The size alignment check was moved from the FPGA Image Load framework
to the prepare() op.
- Added cancel_request boolean flag to struct m10bmc_sec.
- Moved the RSU cancellation logic from m10bmc_sec_cancel() to a new
rsu_cancel() function.
- The m10bmc_sec_cancel() function ONLY sets the cancel_request flag.
The cancel_request flag is checked at the beginning of the
m10bmc_sec_write() and m10bmc_sec_poll_complete() functions.
- Adapt to changed prototypes for the prepare() and write() ops. The
m10bmc_sec_write_blk() function has been renamed to
m10bmc_sec_write().
- Created a cleanup() op, m10bmc_sec_cleanup(), to attempt to cancel an
ongoing op during when exiting the update process.
v15:
- Adapted to changes in the FPGA Image Load framework:
(1) All enum types (progress and errors) are now type u32
(2) m10bmc_sec_write_blk() adds *blk_size and max_size parameters
and uses *blk_size as provided by the caller.
(3) m10bmc_sec_poll_complete() no long checks the driver_unload
flag.
v14:
- Changed symbol names to reflect the renaming of the Security Manager
Class driver to FPGA Image Load.
v13:
- No change
v12:
- Updated Date and KernelVersion fields in ABI documentation
- Removed size parameter from the write_blk() op. m10bmc_sec_write_blk()
no longer has a size parameter, and the block size is determined
in this (the lower-level) driver.
v11:
- No change
v10:
- No change
v9:
- No change
v8:
- Previously patch 5/6, otherwise no change
v7:
- No change
v6:
- Changed (size / stride) calculation to ((size + stride - 1) / stride)
to ensure that the proper count is passed to regmap_bulk_write().
- Removed unnecessary call to rsu_check_complete() in
m10bmc_sec_poll_complete() and changed while loop to
do/while loop.
v5:
- No change
v4:
- No change
v3:
- Changed: iops -> sops, imgr -> smgr, IFPGA_ -> FPGA_, ifpga_ to fpga_
- Changed "MAX10 BMC Secure Engine driver" to "MAX10 BMC Secure Update
driver"
- Removed wrapper functions (m10bmc_raw_*, m10bmc_sys_*). The
underlying functions are now called directly.
- Changed calling functions of functions that return "enum fpga_sec_err"
to check for (ret != FPGA_SEC_ERR_NONE) instead of (ret)
v2:
- Reworked the rsu_start_done() function to make it more readable
- Reworked while-loop condition/content in rsu_prog_ready()
- Minor code cleanup per review comments
- Added a comment to the m10bmc_sec_poll_complete() function to
explain the context (could take 30+ minutes to complete).
- Added m10bmc_ prefix to functions in m10bmc_iops structure
- Moved MAX10 BMC address and function definitions to a separate
patch.
---
drivers/fpga/intel-m10-bmc-sec-update.c | 394 ++++++++++++++++++++++++
1 file changed, 394 insertions(+)

diff --git a/drivers/fpga/intel-m10-bmc-sec-update.c b/drivers/fpga/intel-m10-bmc-sec-update.c
index 65fec2a70901..72c677c910de 100644
--- a/drivers/fpga/intel-m10-bmc-sec-update.c
+++ b/drivers/fpga/intel-m10-bmc-sec-update.c
@@ -17,8 +17,14 @@
struct m10bmc_sec {
struct device *dev;
struct intel_m10bmc *m10bmc;
+ struct fw_upload *fwl;
+ char *fw_name;
+ u32 fw_name_id;
+ bool cancel_request;
};

+static DEFINE_XARRAY_ALLOC(fw_upload_xa);
+
/* Root Entry Hash (REH) support */
#define REH_SHA256_SIZE 32
#define REH_SHA384_SIZE 48
@@ -192,10 +198,365 @@ static const struct attribute_group *m10bmc_sec_attr_groups[] = {
NULL,
};

+static void log_error_regs(struct m10bmc_sec *sec, u32 doorbell)
+{
+ u32 auth_result;
+
+ dev_err(sec->dev, "RSU error status: 0x%08x\n", doorbell);
+
+ if (!m10bmc_sys_read(sec->m10bmc, M10BMC_AUTH_RESULT, &auth_result))
+ dev_err(sec->dev, "RSU auth result: 0x%08x\n", auth_result);
+}
+
+static enum fw_upload_err rsu_check_idle(struct m10bmc_sec *sec)
+{
+ u32 doorbell;
+ int ret;
+
+ ret = m10bmc_sys_read(sec->m10bmc, M10BMC_DOORBELL, &doorbell);
+ if (ret)
+ return FW_UPLOAD_ERR_RW_ERROR;
+
+ if (rsu_prog(doorbell) != RSU_PROG_IDLE &&
+ rsu_prog(doorbell) != RSU_PROG_RSU_DONE) {
+ log_error_regs(sec, doorbell);
+ return FW_UPLOAD_ERR_BUSY;
+ }
+
+ return FW_UPLOAD_ERR_NONE;
+}
+
+static inline bool rsu_start_done(u32 doorbell)
+{
+ u32 status, progress;
+
+ if (doorbell & DRBL_RSU_REQUEST)
+ return false;
+
+ status = rsu_stat(doorbell);
+ if (status == RSU_STAT_ERASE_FAIL || status == RSU_STAT_WEAROUT)
+ return true;
+
+ progress = rsu_prog(doorbell);
+ if (progress != RSU_PROG_IDLE && progress != RSU_PROG_RSU_DONE)
+ return true;
+
+ return false;
+}
+
+static enum fw_upload_err rsu_update_init(struct m10bmc_sec *sec)
+{
+ u32 doorbell, status;
+ int ret;
+
+ ret = regmap_update_bits(sec->m10bmc->regmap,
+ M10BMC_SYS_BASE + M10BMC_DOORBELL,
+ DRBL_RSU_REQUEST | DRBL_HOST_STATUS,
+ DRBL_RSU_REQUEST |
+ FIELD_PREP(DRBL_HOST_STATUS,
+ HOST_STATUS_IDLE));
+ if (ret)
+ return FW_UPLOAD_ERR_RW_ERROR;
+
+ ret = regmap_read_poll_timeout(sec->m10bmc->regmap,
+ M10BMC_SYS_BASE + M10BMC_DOORBELL,
+ doorbell,
+ rsu_start_done(doorbell),
+ NIOS_HANDSHAKE_INTERVAL_US,
+ NIOS_HANDSHAKE_TIMEOUT_US);
+
+ if (ret == -ETIMEDOUT) {
+ log_error_regs(sec, doorbell);
+ return FW_UPLOAD_ERR_TIMEOUT;
+ } else if (ret) {
+ return FW_UPLOAD_ERR_RW_ERROR;
+ }
+
+ status = rsu_stat(doorbell);
+ if (status == RSU_STAT_WEAROUT) {
+ dev_warn(sec->dev, "Excessive flash update count detected\n");
+ return FW_UPLOAD_ERR_WEAROUT;
+ } else if (status == RSU_STAT_ERASE_FAIL) {
+ log_error_regs(sec, doorbell);
+ return FW_UPLOAD_ERR_HW_ERROR;
+ }
+
+ return FW_UPLOAD_ERR_NONE;
+}
+
+static enum fw_upload_err rsu_prog_ready(struct m10bmc_sec *sec)
+{
+ unsigned long poll_timeout;
+ u32 doorbell, progress;
+ int ret;
+
+ ret = m10bmc_sys_read(sec->m10bmc, M10BMC_DOORBELL, &doorbell);
+ if (ret)
+ return FW_UPLOAD_ERR_RW_ERROR;
+
+ poll_timeout = jiffies + msecs_to_jiffies(RSU_PREP_TIMEOUT_MS);
+ while (rsu_prog(doorbell) == RSU_PROG_PREPARE) {
+ msleep(RSU_PREP_INTERVAL_MS);
+ if (time_after(jiffies, poll_timeout))
+ break;
+
+ ret = m10bmc_sys_read(sec->m10bmc, M10BMC_DOORBELL, &doorbell);
+ if (ret)
+ return FW_UPLOAD_ERR_RW_ERROR;
+ }
+
+ progress = rsu_prog(doorbell);
+ if (progress == RSU_PROG_PREPARE) {
+ log_error_regs(sec, doorbell);
+ return FW_UPLOAD_ERR_TIMEOUT;
+ } else if (progress != RSU_PROG_READY) {
+ log_error_regs(sec, doorbell);
+ return FW_UPLOAD_ERR_HW_ERROR;
+ }
+
+ return FW_UPLOAD_ERR_NONE;
+}
+
+static enum fw_upload_err rsu_send_data(struct m10bmc_sec *sec)
+{
+ u32 doorbell;
+ int ret;
+
+ ret = regmap_update_bits(sec->m10bmc->regmap,
+ M10BMC_SYS_BASE + M10BMC_DOORBELL,
+ DRBL_HOST_STATUS,
+ FIELD_PREP(DRBL_HOST_STATUS,
+ HOST_STATUS_WRITE_DONE));
+ if (ret)
+ return FW_UPLOAD_ERR_RW_ERROR;
+
+ ret = regmap_read_poll_timeout(sec->m10bmc->regmap,
+ M10BMC_SYS_BASE + M10BMC_DOORBELL,
+ doorbell,
+ rsu_prog(doorbell) != RSU_PROG_READY,
+ NIOS_HANDSHAKE_INTERVAL_US,
+ NIOS_HANDSHAKE_TIMEOUT_US);
+
+ if (ret == -ETIMEDOUT) {
+ log_error_regs(sec, doorbell);
+ return FW_UPLOAD_ERR_TIMEOUT;
+ } else if (ret) {
+ return FW_UPLOAD_ERR_RW_ERROR;
+ }
+
+ switch (rsu_stat(doorbell)) {
+ case RSU_STAT_NORMAL:
+ case RSU_STAT_NIOS_OK:
+ case RSU_STAT_USER_OK:
+ case RSU_STAT_FACTORY_OK:
+ break;
+ default:
+ log_error_regs(sec, doorbell);
+ return FW_UPLOAD_ERR_HW_ERROR;
+ }
+
+ return FW_UPLOAD_ERR_NONE;
+}
+
+static int rsu_check_complete(struct m10bmc_sec *sec, u32 *doorbell)
+{
+ if (m10bmc_sys_read(sec->m10bmc, M10BMC_DOORBELL, doorbell))
+ return -EIO;
+
+ switch (rsu_stat(*doorbell)) {
+ case RSU_STAT_NORMAL:
+ case RSU_STAT_NIOS_OK:
+ case RSU_STAT_USER_OK:
+ case RSU_STAT_FACTORY_OK:
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ switch (rsu_prog(*doorbell)) {
+ case RSU_PROG_IDLE:
+ case RSU_PROG_RSU_DONE:
+ return 0;
+ case RSU_PROG_AUTHENTICATING:
+ case RSU_PROG_COPYING:
+ case RSU_PROG_UPDATE_CANCEL:
+ case RSU_PROG_PROGRAM_KEY_HASH:
+ return -EAGAIN;
+ default:
+ return -EINVAL;
+ }
+}
+
+static enum fw_upload_err rsu_cancel(struct m10bmc_sec *sec)
+{
+ u32 doorbell;
+ int ret;
+
+ ret = m10bmc_sys_read(sec->m10bmc, M10BMC_DOORBELL, &doorbell);
+ if (ret)
+ return FW_UPLOAD_ERR_RW_ERROR;
+
+ if (rsu_prog(doorbell) != RSU_PROG_READY)
+ return FW_UPLOAD_ERR_BUSY;
+
+ ret = regmap_update_bits(sec->m10bmc->regmap,
+ M10BMC_SYS_BASE + M10BMC_DOORBELL,
+ DRBL_HOST_STATUS,
+ FIELD_PREP(DRBL_HOST_STATUS,
+ HOST_STATUS_ABORT_RSU));
+ if (ret)
+ return FW_UPLOAD_ERR_RW_ERROR;
+
+ return FW_UPLOAD_ERR_CANCELED;
+}
+
+static enum fw_upload_err m10bmc_sec_prepare(struct fw_upload *fwl,
+ const u8 *data, u32 size)
+{
+ struct m10bmc_sec *sec = fwl->dd_handle;
+ u32 ret;
+
+ sec->cancel_request = false;
+
+ if (!size || size > M10BMC_STAGING_SIZE)
+ return FW_UPLOAD_ERR_INVALID_SIZE;
+
+ ret = rsu_check_idle(sec);
+ if (ret != FW_UPLOAD_ERR_NONE)
+ return ret;
+
+ ret = rsu_update_init(sec);
+ if (ret != FW_UPLOAD_ERR_NONE)
+ return ret;
+
+ ret = rsu_prog_ready(sec);
+ if (ret != FW_UPLOAD_ERR_NONE)
+ return ret;
+
+ if (sec->cancel_request)
+ return rsu_cancel(sec);
+
+ return FW_UPLOAD_ERR_NONE;
+}
+
+#define WRITE_BLOCK_SIZE 0x4000 /* Default write-block size is 0x4000 bytes */
+
+static enum fw_upload_err m10bmc_sec_write(struct fw_upload *fwl, const u8 *data,
+ u32 offset, u32 size, u32 *written)
+{
+ struct m10bmc_sec *sec = fwl->dd_handle;
+ u32 blk_size, doorbell, extra_offset;
+ unsigned int stride, extra = 0;
+ int ret;
+
+ stride = regmap_get_reg_stride(sec->m10bmc->regmap);
+ if (sec->cancel_request)
+ return rsu_cancel(sec);
+
+ ret = m10bmc_sys_read(sec->m10bmc, M10BMC_DOORBELL, &doorbell);
+ if (ret) {
+ return FW_UPLOAD_ERR_RW_ERROR;
+ } else if (rsu_prog(doorbell) != RSU_PROG_READY) {
+ log_error_regs(sec, doorbell);
+ return FW_UPLOAD_ERR_HW_ERROR;
+ }
+
+ WARN_ON_ONCE(WRITE_BLOCK_SIZE % stride);
+ blk_size = min_t(u32, WRITE_BLOCK_SIZE, size);
+ ret = regmap_bulk_write(sec->m10bmc->regmap,
+ M10BMC_STAGING_BASE + offset,
+ (void *)data + offset,
+ blk_size / stride);
+ if (ret)
+ return FW_UPLOAD_ERR_RW_ERROR;
+
+ /*
+ * If blk_size is not aligned to stride, then handle the extra
+ * bytes with regmap_write.
+ */
+ if (blk_size % stride) {
+ extra_offset = offset + ALIGN_DOWN(blk_size, stride);
+ memcpy(&extra, (u8 *)(data + extra_offset), blk_size % stride);
+ ret = regmap_write(sec->m10bmc->regmap,
+ M10BMC_STAGING_BASE + extra_offset, extra);
+ if (ret)
+ return FW_UPLOAD_ERR_RW_ERROR;
+ }
+
+ *written = blk_size;
+ return FW_UPLOAD_ERR_NONE;
+}
+
+static enum fw_upload_err m10bmc_sec_poll_complete(struct fw_upload *fwl)
+{
+ struct m10bmc_sec *sec = fwl->dd_handle;
+ unsigned long poll_timeout;
+ u32 doorbell, result;
+ int ret;
+
+ if (sec->cancel_request)
+ return rsu_cancel(sec);
+
+ result = rsu_send_data(sec);
+ if (result != FW_UPLOAD_ERR_NONE)
+ return result;
+
+ poll_timeout = jiffies + msecs_to_jiffies(RSU_COMPLETE_TIMEOUT_MS);
+ do {
+ msleep(RSU_COMPLETE_INTERVAL_MS);
+ ret = rsu_check_complete(sec, &doorbell);
+ } while (ret == -EAGAIN && !time_after(jiffies, poll_timeout));
+
+ if (ret == -EAGAIN) {
+ log_error_regs(sec, doorbell);
+ return FW_UPLOAD_ERR_TIMEOUT;
+ } else if (ret == -EIO) {
+ return FW_UPLOAD_ERR_RW_ERROR;
+ } else if (ret) {
+ log_error_regs(sec, doorbell);
+ return FW_UPLOAD_ERR_HW_ERROR;
+ }
+
+ return FW_UPLOAD_ERR_NONE;
+}
+
+/*
+ * m10bmc_sec_cancel() may be called asynchronously with an on-going update.
+ * All other functions are called sequentially in a single thread. To avoid
+ * contention on register accesses, m10bmc_sec_cancel() must only update
+ * the cancel_request flag. Other functions will check this flag and handle
+ * the cancel request synchronously.
+ */
+static void m10bmc_sec_cancel(struct fw_upload *fwl)
+{
+ struct m10bmc_sec *sec = fwl->dd_handle;
+
+ sec->cancel_request = true;
+}
+
+static void m10bmc_sec_cleanup(struct fw_upload *fwl)
+{
+ struct m10bmc_sec *sec = fwl->dd_handle;
+
+ (void)rsu_cancel(sec);
+}
+
+static const struct fw_upload_ops m10bmc_ops = {
+ .prepare = m10bmc_sec_prepare,
+ .write = m10bmc_sec_write,
+ .poll_complete = m10bmc_sec_poll_complete,
+ .cancel = m10bmc_sec_cancel,
+ .cleanup = m10bmc_sec_cleanup,
+};
+
#define SEC_UPDATE_LEN_MAX 32
static int m10bmc_sec_probe(struct platform_device *pdev)
{
+ char buf[SEC_UPDATE_LEN_MAX];
struct m10bmc_sec *sec;
+ struct fw_upload *fwl;
+ unsigned int len;
+ int ret;

sec = devm_kzalloc(&pdev->dev, sizeof(*sec), GFP_KERNEL);
if (!sec)
@@ -205,6 +566,38 @@ static int m10bmc_sec_probe(struct platform_device *pdev)
sec->m10bmc = dev_get_drvdata(pdev->dev.parent);
dev_set_drvdata(&pdev->dev, sec);

+ ret = xa_alloc(&fw_upload_xa, &sec->fw_name_id, sec,
+ xa_limit_32b, GFP_KERNEL);
+ if (ret)
+ return ret;
+
+ len = scnprintf(buf, SEC_UPDATE_LEN_MAX, "secure-update%d",
+ sec->fw_name_id);
+ sec->fw_name = kmemdup_nul(buf, len, GFP_KERNEL);
+ if (!sec->fw_name)
+ return -ENOMEM;
+
+ fwl = firmware_upload_register(THIS_MODULE, sec->dev, sec->fw_name,
+ &m10bmc_ops, sec);
+ if (IS_ERR(fwl)) {
+ dev_err(sec->dev, "Firmware Upload driver failed to start\n");
+ kfree(sec->fw_name);
+ xa_erase(&fw_upload_xa, sec->fw_name_id);
+ return PTR_ERR(fwl);
+ }
+
+ sec->fwl = fwl;
+ return 0;
+}
+
+static int m10bmc_sec_remove(struct platform_device *pdev)
+{
+ struct m10bmc_sec *sec = dev_get_drvdata(&pdev->dev);
+
+ firmware_upload_unregister(sec->fwl);
+ kfree(sec->fw_name);
+ xa_erase(&fw_upload_xa, sec->fw_name_id);
+
return 0;
}

@@ -218,6 +611,7 @@ MODULE_DEVICE_TABLE(platform, intel_m10bmc_sec_ids);

static struct platform_driver intel_m10bmc_sec_driver = {
.probe = m10bmc_sec_probe,
+ .remove = m10bmc_sec_remove,
.driver = {
.name = "intel-m10bmc-sec-update",
.dev_groups = m10bmc_sec_attr_groups,
--
2.25.1

2022-06-06 16:22:38

by Russ Weight

[permalink] [raw]
Subject: [PATCH v23 2/5] fpga: m10bmc-sec: create max10 bmc secure update

Create a sub-driver for the FPGA Card BMC in order to support secure
updates. This patch creates the Max10 BMC Secure Update driver and
provides sysfs files for displaying the root entry hashes (REH) for the
FPGA static region (SR), the FPGA Partial Reconfiguration (PR) region,
and the card BMC.

The Intel MAX10 BMC Root of Trust (RoT) requires that all BMC Nios firmware
and FPGA images are authenticated using ECDSA before loading and executing
on the card. Code Signing Keys (CSK) are used to sign images. CSKs are
signed by a root key. The root entry hash is created from the root public
key.

The RoT provides authentication by storing an REH bitstream to a write-once
location. Image signatures are verified against the hash.

Reviewed-by: Tom Rix <[email protected]>
Tested-by: Tianfei Zhang <[email protected]>
Acked-by: Xu Yilun <[email protected]>
Signed-off-by: Russ Weight <[email protected]>
---
v23:
- Rebased for 5.19-rc1
v22:
- Added Tested-by tag from Tianfei and Acked-by tag from Yilun.
- Updated KernelVersion and Date in ABI documentation to 5.20 and
Sep 2022 respectively.
v21:
- No change
v20:
- Added text to the commit message to describe Root Entry Hashes.
- Use reverse christmas tree format for local variable declarations in
show_root_entry_hash().
- Remove WARN_ON() from show_root_entry_hash() and return -EINVAL if
sha_num_bytes is not a multiple of stride.
- Move MODULE_DEVICE_TABLE() macro to just beneath the definition of
intel_m10bmc_sec_ids[].
v19:
- Change "card bmc" naming back to "m10 bmc" naming to be consistent
with the parent driver.
v18:
- Changed the ABI documentation for the Root Entry Hashes to specify
string as the format for the output.
- Updated comments, strings and config options to more consistently
refer to the driver as the Intel FPGA Card BMC Secure Update driver.
- Removed an instance of dev_dbg().
- Deferred the call to firmware_upload_register() to a later patch
where the required ops are provided. The bmc_sec_remove() function is
also removed from this patch and added in a later patch.
- Switched from MODULE_ALIAS() to MODULE_DEVICE_TABLE() in anticipation
of additional cards to be supported by the same driver.
v17:
- Update the Date and KernelVersion for the ABI documentation to Jul 2022
and 5.19 respectively.
- Updated the copyright end-date to 2022 for the secure update driver.
- Change m10bmc to cardbmc to reflect the fact that the future devices
will not necessarily use the MAX10. This affects filenames, configs, and
symbol names.
- Removed references to the FPGA Image Load class driver and replaced
them with the new firmware-upload service from the firmware loader.
- Firmware upload requires a unique name for the firmware device. Use
xarray_alloc to generate a unique number to append to the name.
- Changed the license from GPL to GPLv2 per commit bf7fbeeae6db: 'module:
Cure the MODULE_LICENSE "GPL" vs. "GPL v2" bogosity'
v16:
- No Change
v15:
- Updated the Dates and KernelVersions in the ABI documentation
- Change driver name from "n3000bmc-secure" to "n3000bmc-sec-update".
- Change CONFIG_FPGA_M10_BMC_SECURE to CONFIG_FPGA_M10_BMC_SEC_UPDATE.
- Change instances of *bmc-secure to *bmc-sec-update in file name
and symbol names.
- Change instances of *m10bmc_secure* to *m10bmc-sec_update* in symbol
names.
- Change instances of *lops* to *ops* in symbol names.
v14:
- Changed symbol and text references to reflect the renaming of the
Security Manager Class driver to FPGA Image Load.
v13:
- Updated copyright to 2021
- Updated ABI documentation date and kernel version
- Call updated fpga_sec_mgr_register() and fpga_sec_mgr_unregister()
functions instead of devm_fpga_sec_mgr_create() and
devm_fpga_sec_mgr_register().
v12:
- Updated Date and KernelVersion fields in ABI documentation
v11:
- Added Reviewed-by tag
v10:
- Changed the path expressions in the sysfs documentation to
replace the n3000 reference with something more generic to
accomodate other devices that use the same driver.
v9:
- Rebased to 5.12-rc2 next
- Updated Date and KernelVersion in ABI documentation
v8:
- Previously patch 2/6, otherwise no change
v7:
- Updated Date and KernelVersion in ABI documentation
v6:
- Added WARN_ON() call for (sha_num_bytes / stride) to assert
that the proper count is passed to regmap_bulk_read().
v5:
- No change
v4:
- Moved sysfs files for displaying the root entry hashes (REH)
from the FPGA Security Manager class driver to here. The
m10bmc_reh() and m10bmc_reh_size() functions are removed and
the functionality from these functions is moved into a
show_root_entry_hash() function for displaying the REHs.
- Added ABI documentation for the new sysfs entries:
sysfs-driver-intel-m10-bmc-secure
- Updated the MAINTAINERS file to add the new ABI documentation
file: sysfs-driver-intel-m10-bmc-secure
- Removed unnecessary ret variable from m10bmc_secure_probe()
- Incorporated new devm_fpga_sec_mgr_register() function into
m10bmc_secure_probe() and removed the m10bmc_secure_remove()
function.
v3:
- Changed from "Intel FPGA Security Manager" to FPGA Security Manager"
- Changed: iops -> sops, imgr -> smgr, IFPGA_ -> FPGA_, ifpga_ to fpga_
- Changed "MAX10 BMC Secure Engine driver" to "MAX10 BMC Secure
Update driver"
- Removed wrapper functions (m10bmc_raw_*, m10bmc_sys_*). The
underlying functions are now called directly.
- Changed "_root_entry_hash" to "_reh", with a comment explaining
what reh is.
v2:
- Added drivers/fpga/intel-m10-bmc-secure.c file to MAINTAINERS.
- Switched to GENMASK(31, 16) for a couple of mask definitions.
- Moved MAX10 BMC address and function definitions to a separate
patch.
- Replaced small function-creation macros with explicit function
declarations.
- Removed ifpga_sec_mgr_init() and ifpga_sec_mgr_uinit() functions.
- Adapted to changes in the Intel FPGA Security Manager by splitting
the single call to ifpga_sec_mgr_register() into two function
calls: devm_ifpga_sec_mgr_create() and ifpga_sec_mgr_register().
---
.../sysfs-driver-intel-m10-bmc-sec-update | 29 ++++
MAINTAINERS | 7 +
drivers/fpga/Kconfig | 12 ++
drivers/fpga/Makefile | 3 +
drivers/fpga/intel-m10-bmc-sec-update.c | 134 ++++++++++++++++++
5 files changed, 185 insertions(+)
create mode 100644 Documentation/ABI/testing/sysfs-driver-intel-m10-bmc-sec-update
create mode 100644 drivers/fpga/intel-m10-bmc-sec-update.c

diff --git a/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc-sec-update b/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc-sec-update
new file mode 100644
index 000000000000..a208367e6956
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc-sec-update
@@ -0,0 +1,29 @@
+What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/sr_root_entry_hash
+Date: Sep 2022
+KernelVersion: 5.20
+Contact: Russ Weight <[email protected]>
+Description: Read only. Returns the root entry hash for the static
+ region if one is programmed, else it returns the
+ string: "hash not programmed". This file is only
+ visible if the underlying device supports it.
+ Format: string.
+
+What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/pr_root_entry_hash
+Date: Sep 2022
+KernelVersion: 5.20
+Contact: Russ Weight <[email protected]>
+Description: Read only. Returns the root entry hash for the partial
+ reconfiguration region if one is programmed, else it
+ returns the string: "hash not programmed". This file
+ is only visible if the underlying device supports it.
+ Format: string.
+
+What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/bmc_root_entry_hash
+Date: Sep 2022
+KernelVersion: 5.20
+Contact: Russ Weight <[email protected]>
+Description: Read only. Returns the root entry hash for the BMC image
+ if one is programmed, else it returns the string:
+ "hash not programmed". This file is only visible if the
+ underlying device supports it.
+ Format: string.
diff --git a/MAINTAINERS b/MAINTAINERS
index a6d3bd9d2a8d..8f270acf0844 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -7807,6 +7807,13 @@ F: Documentation/fpga/
F: drivers/fpga/
F: include/linux/fpga/

+INTEL MAX10 BMC SECURE UPDATES
+M: Russ Weight <[email protected]>
+L: [email protected]
+S: Maintained
+F: Documentation/ABI/testing/sysfs-driver-intel-m10-bmc-sec-update
+F: drivers/fpga/intel-m10-bmc-sec-update.c
+
FPU EMULATOR
M: Bill Metzenthen <[email protected]>
S: Maintained
diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index 991b3f361ec9..0831eecc9a09 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -243,4 +243,16 @@ config FPGA_MGR_VERSAL_FPGA
configure the programmable logic(PL).

To compile this as a module, choose M here.
+
+config FPGA_M10_BMC_SEC_UPDATE
+ tristate "Intel MAX10 BMC Secure Update driver"
+ depends on MFD_INTEL_M10_BMC && FW_UPLOAD
+ help
+ Secure update support for the Intel MAX10 board management
+ controller.
+
+ This is a subdriver of the Intel MAX10 board management controller
+ (BMC) and provides support for secure updates for the BMC image,
+ the FPGA image, the Root Entry Hashes, etc.
+
endif # FPGA
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index 5935b3d0abd5..139ac1b573d3 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -22,6 +22,9 @@ obj-$(CONFIG_FPGA_MGR_VERSAL_FPGA) += versal-fpga.o
obj-$(CONFIG_ALTERA_PR_IP_CORE) += altera-pr-ip-core.o
obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += altera-pr-ip-core-plat.o

+# FPGA Secure Update Drivers
+obj-$(CONFIG_FPGA_M10_BMC_SEC_UPDATE) += intel-m10-bmc-sec-update.o
+
# FPGA Bridge Drivers
obj-$(CONFIG_FPGA_BRIDGE) += fpga-bridge.o
obj-$(CONFIG_SOCFPGA_FPGA_BRIDGE) += altera-hps2fpga.o altera-fpga2sdram.o
diff --git a/drivers/fpga/intel-m10-bmc-sec-update.c b/drivers/fpga/intel-m10-bmc-sec-update.c
new file mode 100644
index 000000000000..f9f39d2cfe5b
--- /dev/null
+++ b/drivers/fpga/intel-m10-bmc-sec-update.c
@@ -0,0 +1,134 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Intel MAX10 Board Management Controller Secure Update Driver
+ *
+ * Copyright (C) 2019-2022 Intel Corporation. All rights reserved.
+ *
+ */
+#include <linux/bitfield.h>
+#include <linux/device.h>
+#include <linux/firmware.h>
+#include <linux/mfd/intel-m10-bmc.h>
+#include <linux/mod_devicetable.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+
+struct m10bmc_sec {
+ struct device *dev;
+ struct intel_m10bmc *m10bmc;
+};
+
+/* Root Entry Hash (REH) support */
+#define REH_SHA256_SIZE 32
+#define REH_SHA384_SIZE 48
+#define REH_MAGIC GENMASK(15, 0)
+#define REH_SHA_NUM_BYTES GENMASK(31, 16)
+
+static ssize_t
+show_root_entry_hash(struct device *dev, u32 exp_magic,
+ u32 prog_addr, u32 reh_addr, char *buf)
+{
+ struct m10bmc_sec *sec = dev_get_drvdata(dev);
+ int sha_num_bytes, i, ret, cnt = 0;
+ u8 hash[REH_SHA384_SIZE];
+ unsigned int stride;
+ u32 magic;
+
+ stride = regmap_get_reg_stride(sec->m10bmc->regmap);
+ ret = m10bmc_raw_read(sec->m10bmc, prog_addr, &magic);
+ if (ret)
+ return ret;
+
+ if (FIELD_GET(REH_MAGIC, magic) != exp_magic)
+ return sysfs_emit(buf, "hash not programmed\n");
+
+ sha_num_bytes = FIELD_GET(REH_SHA_NUM_BYTES, magic) / 8;
+ if ((sha_num_bytes % stride) ||
+ (sha_num_bytes != REH_SHA256_SIZE &&
+ sha_num_bytes != REH_SHA384_SIZE)) {
+ dev_err(sec->dev, "%s bad sha num bytes %d\n", __func__,
+ sha_num_bytes);
+ return -EINVAL;
+ }
+
+ ret = regmap_bulk_read(sec->m10bmc->regmap, reh_addr,
+ hash, sha_num_bytes / stride);
+ if (ret) {
+ dev_err(dev, "failed to read root entry hash: %x cnt %x: %d\n",
+ reh_addr, sha_num_bytes / stride, ret);
+ return ret;
+ }
+
+ for (i = 0; i < sha_num_bytes; i++)
+ cnt += sprintf(buf + cnt, "%02x", hash[i]);
+ cnt += sprintf(buf + cnt, "\n");
+
+ return cnt;
+}
+
+#define DEVICE_ATTR_SEC_REH_RO(_name, _magic, _prog_addr, _reh_addr) \
+static ssize_t _name##_root_entry_hash_show(struct device *dev, \
+ struct device_attribute *attr, \
+ char *buf) \
+{ return show_root_entry_hash(dev, _magic, _prog_addr, _reh_addr, buf); } \
+static DEVICE_ATTR_RO(_name##_root_entry_hash)
+
+DEVICE_ATTR_SEC_REH_RO(bmc, BMC_PROG_MAGIC, BMC_PROG_ADDR, BMC_REH_ADDR);
+DEVICE_ATTR_SEC_REH_RO(sr, SR_PROG_MAGIC, SR_PROG_ADDR, SR_REH_ADDR);
+DEVICE_ATTR_SEC_REH_RO(pr, PR_PROG_MAGIC, PR_PROG_ADDR, PR_REH_ADDR);
+
+static struct attribute *m10bmc_security_attrs[] = {
+ &dev_attr_bmc_root_entry_hash.attr,
+ &dev_attr_sr_root_entry_hash.attr,
+ &dev_attr_pr_root_entry_hash.attr,
+ NULL,
+};
+
+static struct attribute_group m10bmc_security_attr_group = {
+ .name = "security",
+ .attrs = m10bmc_security_attrs,
+};
+
+static const struct attribute_group *m10bmc_sec_attr_groups[] = {
+ &m10bmc_security_attr_group,
+ NULL,
+};
+
+#define SEC_UPDATE_LEN_MAX 32
+static int m10bmc_sec_probe(struct platform_device *pdev)
+{
+ struct m10bmc_sec *sec;
+
+ sec = devm_kzalloc(&pdev->dev, sizeof(*sec), GFP_KERNEL);
+ if (!sec)
+ return -ENOMEM;
+
+ sec->dev = &pdev->dev;
+ sec->m10bmc = dev_get_drvdata(pdev->dev.parent);
+ dev_set_drvdata(&pdev->dev, sec);
+
+ return 0;
+}
+
+static const struct platform_device_id intel_m10bmc_sec_ids[] = {
+ {
+ .name = "n3000bmc-sec-update",
+ },
+ { }
+};
+MODULE_DEVICE_TABLE(platform, intel_m10bmc_sec_ids);
+
+static struct platform_driver intel_m10bmc_sec_driver = {
+ .probe = m10bmc_sec_probe,
+ .driver = {
+ .name = "intel-m10bmc-sec-update",
+ .dev_groups = m10bmc_sec_attr_groups,
+ },
+ .id_table = intel_m10bmc_sec_ids,
+};
+module_platform_driver(intel_m10bmc_sec_driver);
+
+MODULE_AUTHOR("Intel Corporation");
+MODULE_DESCRIPTION("Intel MAX10 BMC Secure Update");
+MODULE_LICENSE("GPL");
--
2.25.1

2022-06-08 03:39:05

by Xu Yilun

[permalink] [raw]
Subject: Re: [PATCH v23 0/5] FPGA MAX10 BMC Secure Update Driver

On Mon, Jun 06, 2022 at 09:00:33AM -0700, Russ Weight wrote:
> The MAX10 BMC Secure Update driver instantiates the new Firmware
> Upload functionality of the Firmware Loader and provides the callback
> functions required to support secure updates on Intel n3000 PAC
> devices. This driver is implemented as a sub-driver of the Intel MAX10
> BMC mfd driver.
>
> This driver interacts with the HW secure update engine of the FPGA
> card BMC in order to transfer new FPGA and BMC images to FLASH on
> the FPGA card. Security is enforced by hardware and firmware. The
> FPGA Card BMC Secure Update driver interacts with the firmware to
> initiate an update, pass in the necessary data, and collect status
> on the update.
>
> This driver provides sysfs files for displaying the flash count, the
> root entry hashes (REH), and the code-signing-key (CSK) cancellation
> vectors.
>
> Changelog v22 -> v23:
> - Rebased for 5.19-rc1
> - Added Acked-by tag from Yilun for patch #5
>
> Changelog v21 -> v22:
> - Added Tested-by tags from Tianfei and Acked-by tags from Yilun.
> - Updated KernelVersion and Date in ABI documentation to 5.20 and
> Sep 2022 respectively.
> - Removed unnecessary alignment check for source address from
> m10bmc_sec_prepare().
> - Changed the handling of a misaligned blk_size in m10bmc_sec_write().
> Instead of allocating an aligned buffer and copying the block, copy
> the misaligned bytes into an unsigned int and write with
> regmap_write().
>
> Changelog v20 -> v21:
> - Replace WARN_ON() calls in flash_count_show() and show_canceled_csk()
> with a more elaborate test. Return -EINVAL and write a message to the
> kernel log. Call WARN_ON_ONCE().
> - Update m10bmc_sec_prepare() to ensure that the base address for an
> update image is aligned with stride.
> - Update m10bmc_sec_write() to handle a block size that is not aligned
> with stride by allocating a zero-filled block that is aligned, and
> copying the data before calling regmap_bulk_write().
>
> Changelog v19 -> v20:
> - Added text to commit messages to describe Root Entry Hashes (REH) and
> Code Signing Key (CSK) cancellation.
> - Use reverse christmas tree format for local variable declarations in
> show_root_entry_hash().
> - Remove WARN_ON() from show_root_entry_hash() and return -EINVAL if
> sha_num_bytes is not a multiple of stride.
> - Move MODULE_DEVICE_TABLE() macro to just beneath the definition of
> intel_m10bmc_sec_ids[].
>
> Changelog v18 -> v19:
> - Change "card bmc" naming back to "m10 bmc" naming to be consistent
> with the parent driver.
>
> Changelog v17 -> v18:
> - Changed the ABI documentation for the Root Entry Hashes to specify
> string as the format for the output.
> - Updated comments, strings and config options to more consistently
> refer to the driver as the Intel FPGA Card BMC Secure Update driver.
> - Removed an instance of dev_dbg().
> - Deferred the call to firmware_upload_register() to a later patch
> where the required ops are provided.
> - Switched from MODULE_ALIAS() to MODULE_DEVICE_TABLE() in anticipation
> of additional cards to be supported by the same driver.
>
> Changelog v16 -> v17:
> - Change m10bmc to cardbmc to reflect the fact that the future devices
> will not necessarily use the MAX10. This affects filenames, configs,
> symbol names, and the driver name.
> - Update the Date and KernelVersion for the ABI documentation to Jul 2022
> and 5.19 respectively.
> - Updated the copyright end-date to 2022 for the secure update driver.
> - Removed references to the FPGA Image Load class driver and replaced
> them with the new firmware-upload service from the firmware loader.
> - Use xarray_alloc to generate a unique number/name firmware-upload.
> - Chang the license from GPL to GPLv2 per commit bf7fbeeae6db ("module:
> Cure the MODULE_LICENSE "GPL" vs. "GPL v2" bogosity")
> - fw_upload_ops functions will return "enum fw_upload_err" data types
> instead of integer values.
>
> Changelog v15 -> v16:
> - Use 0 instead of FPGA_IMAGE_ERR_NONE to indicate success.
> - The size alignment check was moved from the FPGA Image Load framework
> to the prepare() op.
> - Added cancel_request boolean flag to struct m10bmc_sec.
> - Moved the RSU cancellation logic from m10bmc_sec_cancel() to a new
> rsu_cancel() function.
> - The m10bmc_sec_cancel() function ONLY sets the cancel_request flag.
> The cancel_request flag is checked at the beginning of the
> m10bmc_sec_write() and m10bmc_sec_poll_complete() functions.
> - Adapt to changed prototypes for the prepare() and write() ops. The
> m10bmc_sec_write_blk() function has been renamed to
> m10bmc_sec_write().
> - Created a cleanup op, m10bmc_sec_cleanup(), to attempt to cancel an
> ongoing op during when exiting the update process.
>
> Changelog v14 -> v15:
> - Updated the Dates and KernelVersions in the ABI documentation
> - Change driver name from "n3000bmc-secure" to "n3000bmc-sec-update".
> - Change CONFIG_FPGA_M10_BMC_SECURE to CONFIG_FPGA_M10_BMC_SEC_UPDATE.
> - Change instances of *bmc-secure to *bmc-sec-update in file name
> and symbol names.
> - Change instances of *m10bmc_secure* to *m10bmc-sec_update* in symbol
> names.
> - Adapted to changes in the FPGA Image Load framework:
> (1) All enum types (progress and errors) are now type u32
> (2) m10bmc_sec_write_blk() adds *blk_size and max_size parameters
> and uses *blk_size as provided by the caller.
> (3) m10bmc_sec_poll_complete() no long checks the driver_unload
> flag.
>
> Changelog v13 -> v14:
> - Changed symbol and text references to reflect the renaming of the
> Security Manager Class driver to FPGA Image Load.
>
> Changelog v12 -> v13:
> - Updated copyright to 2021
> - Updated Date and KernelVersion fields in ABI documentation
> - Call updated fpga_sec_mgr_register() and fpga_sec_mgr_unregister()
> functions instead of devm_fpga_sec_mgr_create() and
> devm_fpga_sec_mgr_register().
>
> Changelog v11 -> v12:
> - Updated Date and KernelVersion fields in ABI documentation
> - Removed size parameter from the write_blk() op. m10bmc_sec_write_blk()
> no longer has a size parameter, and the block size is determined
> in this (the lower-level) driver.
>
> Changelog v10 -> v11:
> - Added Reviewed-by tag to patch #1
>
> Changelog v9 -> v10:
> - Changed the path expressions in the sysfs documentation to
> replace the n3000 reference with something more generic to
> accommodate other devices that use the same driver.
>
> Changelog v8 -> v9:
> - Rebased to 5.12-rc2 next
> - Updated Date and KernelVersion in ABI documentation
>
> Changelog v7 -> v8:
> - Split out patch "mfd: intel-m10-bmc: support for MAX10 BMC Secure
> Updates" and submitted it separately:
> https://marc.info/?l=linux-kernel&m=161126987101096&w=2
>
> Changelog v6 -> v7:
> - Rebased patches for 5.11-rc2
> - Updated Date and KernelVersion in ABI documentation
>
> Changelog v5 -> v6:
> - Added WARN_ON() prior to several calls to regmap_bulk_read()
> to assert that the (SIZE / stride) calculations did not result
> in remainders.
> - Changed the (size / stride) calculation in regmap_bulk_write()
> call to ensure that we don't write one less than intended.
> - Changed flash_count_show() parameter list to achieve
> reverse-christmas tree format.
> - Removed unnecessary call to rsu_check_complete() in
> m10bmc_sec_poll_complete() and changed while loop to
> do/while loop.
> - Initialized auth_result and doorbell to HW_ERRINFO_POISON
> in m10bmc_sec_hw_errinfo() and removed unnecessary if statements.
>
> Changelog v4 -> v5:
> - Renamed sysfs node user_flash_count to flash_count and updated
> the sysfs documentation accordingly to more accurately descirbe
> the purpose of the count.
>
> Changelog v3 -> v4:
> - Moved sysfs files for displaying the flash count, the root
> entry hashes (REH), and the code-signing-key (CSK) cancellation
> vectors from the FPGA Security Manager class driver to this
> driver (as they are not generic enough for the class driver).
> - Added a new ABI documentation file with informtaion about the
> new sysfs entries: sysfs-driver-intel-m10-bmc-secure
> - Updated the MAINTAINERS file to add the new ABI documentation
> file: sysfs-driver-intel-m10-bmc-secure
> - Removed unnecessary ret variable from m10bmc_secure_probe()
> - Incorporated new devm_fpga_sec_mgr_register() function into
> m10bmc_secure_probe() and removed the m10bmc_secure_remove()
> function.
>
> Changelog v2 -> v3:
> - Changed "MAX10 BMC Security Engine driver" to "MAX10 BMC Secure
> Update driver"
> - Changed from "Intel FPGA Security Manager" to FPGA Security Manager"
> - Changed: iops -> sops, imgr -> smgr, IFPGA_ -> FPGA_, ifpga_ to fpga_
> - Removed wrapper functions (m10bmc_raw_*, m10bmc_sys_*). The
> underlying functions are now called directly.
> - Changed "_root_entry_hash" to "_reh", with a comment explaining
> what reh is.
> - Renamed get_csk_vector() to m10bmc_csk_vector()
> - Changed calling functions of functions that return "enum fpga_sec_err"
> to check for (ret != FPGA_SEC_ERR_NONE) instead of (ret)
>
> Changelog v1 -> v2:
> - These patches were previously submitted as part of a larger V1
> patch set under the title "Intel FPGA Security Manager Class Driver".
> - Grouped all changes to include/linux/mfd/intel-m10-bmc.h into a
> single patch: "mfd: intel-m10-bmc: support for MAX10 BMC Security
> Engine".
> - Removed ifpga_sec_mgr_init() and ifpga_sec_mgr_uinit() functions.
> - Adapted to changes in the Intel FPGA Security Manager by splitting
> the single call to ifpga_sec_mgr_register() into two function
> calls: devm_ifpga_sec_mgr_create() and ifpga_sec_mgr_register().
> - Replaced small function-creation macros for explicit function
> declarations.
> - Bug fix for the get_csk_vector() function to properly apply the
> stride variable in calls to m10bmc_raw_bulk_read().
> - Added m10bmc_ prefix to functions in m10bmc_iops structure
> - Implemented HW_ERRINFO_POISON for m10bmc_sec_hw_errinfo() to
> ensure that corresponding bits are set to 1 if we are unable
> to read the doorbell or auth_result registers.
> - Added comments and additional code cleanup per V1 review.
>
> Russ Weight (5):
> mfd: intel-m10-bmc: Rename n3000bmc-secure driver
> fpga: m10bmc-sec: create max10 bmc secure update
> fpga: m10bmc-sec: expose max10 flash update count
> fpga: m10bmc-sec: expose max10 canceled keys in sysfs
> fpga: m10bmc-sec: add max10 secure update functions
>
> .../sysfs-driver-intel-m10-bmc-sec-update | 61 ++
> MAINTAINERS | 7 +
> drivers/fpga/Kconfig | 12 +
> drivers/fpga/Makefile | 3 +
> drivers/fpga/intel-m10-bmc-sec-update.c | 625 ++++++++++++++++++
> drivers/mfd/intel-m10-bmc.c | 2 +-
> 6 files changed, 709 insertions(+), 1 deletion(-)
> create mode 100644 Documentation/ABI/testing/sysfs-driver-intel-m10-bmc-sec-update
> create mode 100644 drivers/fpga/intel-m10-bmc-sec-update.c
>
>
> base-commit: f2906aa863381afb0015a9eb7fefad885d4e5a56

Applied to for-next

> --
> 2.25.1

2022-06-08 08:58:32

by Lee Jones

[permalink] [raw]
Subject: Re: [PATCH v23 1/5] mfd: intel-m10-bmc: Rename n3000bmc-secure driver

On Mon, 06 Jun 2022, Russ Weight wrote:

> The n3000bmc-secure driver has changed to n3000bmc-sec-update. Update
> the name in the list of the intel-m10-bmc sub-drivers.
>
> Tested-by: Tianfei Zhang <[email protected]>
> Acked-by: Xu Yilun <[email protected]>
> Signed-off-by: Russ Weight <[email protected]>
> ---
> v23:
> - Rebased for 5.19-rc1
> v22:
> - Added Tested-by tag from Tianfei and Acked-by tag from Yilun.
> v21:
> - No change
> v20:
> - No change
> v19:
> - No change
> v18:
> - No change
> v17:
> - This is a new patch to change in the name of the secure update
> driver.
> ---
> drivers/mfd/intel-m10-bmc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)

Acked-by: Lee Jones <[email protected]>

--
Lee Jones [李琼斯]
Principal Technical Lead - Developer Services
Linaro.org │ Open source software for Arm SoCs
Follow Linaro: Facebook | Twitter | Blog

2022-06-08 10:33:36

by Xu Yilun

[permalink] [raw]
Subject: Re: [PATCH v23 1/5] mfd: intel-m10-bmc: Rename n3000bmc-secure driver

On Wed, Jun 08, 2022 at 08:46:28AM +0100, Lee Jones wrote:
> On Mon, 06 Jun 2022, Russ Weight wrote:
>
> > The n3000bmc-secure driver has changed to n3000bmc-sec-update. Update
> > the name in the list of the intel-m10-bmc sub-drivers.
> >
> > Tested-by: Tianfei Zhang <[email protected]>
> > Acked-by: Xu Yilun <[email protected]>
> > Signed-off-by: Russ Weight <[email protected]>
> > ---
> > v23:
> > - Rebased for 5.19-rc1
> > v22:
> > - Added Tested-by tag from Tianfei and Acked-by tag from Yilun.
> > v21:
> > - No change
> > v20:
> > - No change
> > v19:
> > - No change
> > v18:
> > - No change
> > v17:
> > - This is a new patch to change in the name of the secure update
> > driver.
> > ---
> > drivers/mfd/intel-m10-bmc.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
>
> Acked-by: Lee Jones <[email protected]>

I updated the tag in fpga/for-next

Thanks,
Yilun

>
> --
> Lee Jones [李琼斯]
> Principal Technical Lead - Developer Services
> Linaro.org │ Open source software for Arm SoCs
> Follow Linaro: Facebook | Twitter | Blog