LinuxLists.cc - drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c:1133 amdgpu_discovery_reg_base_init() error: testing array offset 'adev->vcn.num_vcn

2022-06-13 18:48:34

Subject: drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c:1133 amdgpu_discovery_reg_base_init() error: testing array offset 'adev->vcn.num_vcn_inst' after use.

tree: it.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git">https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
554d5615e69a66504a28d
023fdceffb4b6df496a0d drm/amdgpu/discovery: validate VCN and SDMA instances
(https://download.01.org/0day-ci/archive/20220612/[email protected]/config)
(GCC) 11.3.0
kindly add following tag where applicable
test robot <[email protected]>
<[email protected]>
amdgpu_discovery.c:1133 amdgpu_discovery_reg_base_init() error: testing array offset 'adev->vcn.num_vcn_inst' after use.
amdgpu_discovery.c:1454 amdgpu_discovery_get_vcn_info() error: buffer overflow 'adev->vcn.vcn_codec_disable_mask' 2 <= 3
md/amdgpu/amdgpu_discovery.c
2022-03-30 1065 static int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev)
2019-06-20 1066 {
2019-06-20 1067 struct binary_header *bhdr;
2019-06-20 1068 struct ip_discovery_header *ihdr;
2019-06-20 1069 struct die_header *dhdr;
2019-06-20 1070 struct ip *ip;
2019-06-20 1071 uint16_t die_offset;
2019-06-20 1072 uint16_t ip_offset;
2019-06-20 1073 uint16_t num_dies;
2019-06-20 1074 uint16_t num_ips;
2019-06-20 1075 uint8_t num_base_address;
2019-06-20 1076 int hw_ip;
2019-06-20 1077 int i, j, k;
2020-03-04 1078 int r;
2019-06-20 1079
2020-03-04 1080 r = amdgpu_discovery_init(adev);
2020-03-04 1081 if (r) {
2020-03-04 1082 DRM_ERROR("amdgpu_discovery_init failed\n");
2020-03-04 1083 return r;
2019-06-20 1084 }
2019-06-20 1085
2020-07-29 1086 bhdr = (struct binary_header *)adev->mman.discovery_bin;
2020-07-29 1087 ihdr = (struct ip_discovery_header *)(adev->mman.discovery_bin +
2019-06-20 1088 le16_to_cpu(bhdr->table_list[IP_DISCOVERY].offset));
2019-06-20 1089 num_dies = le16_to_cpu(ihdr->num_dies);
2019-06-20 1090
2019-03-27 1091 DRM_DEBUG("number of dies: %d\n", num_dies);
2019-06-20 1092
2019-06-20 1093 for (i = 0; i < num_dies; i++) {
2019-06-20 1094 die_offset = le16_to_cpu(ihdr->die_info[i].die_offset);
2020-07-29 1095 dhdr = (struct die_header *)(adev->mman.discovery_bin + die_offset);
2019-06-20 1096 num_ips = le16_to_cpu(dhdr->num_ips);
2019-06-20 1097 ip_offset = die_offset + sizeof(*dhdr);
2019-06-20 1098
2019-03-27 1099 if (le16_to_cpu(dhdr->die_id) != i) {
2019-03-27 1100 DRM_ERROR("invalid die id %d, expected %d\n",
2019-03-27 1101 le16_to_cpu(dhdr->die_id), i);
2019-03-27 1102 return -EINVAL;
2019-03-27 1103 }
2019-03-27 1104
2019-03-27 1105 DRM_DEBUG("number of hardware IPs on die%d: %d\n",
2019-03-27 1106 le16_to_cpu(dhdr->die_id), num_ips);
2019-03-27 1107
2019-06-20 1108 for (j = 0; j < num_ips; j++) {
2020-07-29 1109 ip = (struct ip *)(adev->mman.discovery_bin + ip_offset);
Sj?strand 2021-09-26 1110
Sj?strand 2021-09-26 1111 if (amdgpu_discovery_validate_ip(ip))
Sj?strand 2021-09-26 1112 goto next_ip;
Sj?strand 2021-09-26 1113
2019-06-20 1114 num_base_address = ip->num_base_address;
2019-06-20 1115
2019-03-27 1116 DRM_DEBUG("%s(%d) #%d v%d.%d.%d:\n",
2019-03-27 1117 hw_id_names[le16_to_cpu(ip->hw_id)],
2019-03-27 1118 le16_to_cpu(ip->hw_id),
2019-03-27 1119 ip->number_instance,
2019-06-20 1120 ip->major, ip->minor,
2019-06-20 1121 ip->revision);
2019-06-20 1122
2021-11-30 1123 if (le16_to_cpu(ip->hw_id) == VCN_HWID) {
2021-12-08 1124 /* Bit [5:0]: original revision value
2021-11-30 1125 * Bit [7:6]: en/decode capability:
2021-11-30 1126 * 0b00 : VCN function normally
2021-11-30 1127 * 0b10 : encode is disabled
2021-11-30 1128 * 0b01 : decode is disabled
2021-11-30 1129 */
2021-12-08 1130 adev->vcn.vcn_config[adev->vcn.num_vcn_inst] =
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
2021-12-08 1131 ip->revision & 0xc0;
2021-11-30 1132 ip->revision &= ~0xc0;
2022-05-16 @1133 if (adev->vcn.num_vcn_inst < AMDGPU_MAX_VCN_INSTANCES)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
>= AMDGPU_MAX_VCN_INSTANCES" then the memory
2021-08-09 1134 adev->vcn.num_vcn_inst++;
2022-05-16 1135 else
2022-05-16 1136 dev_err(adev->dev, "Too many VCN instances: %d vs %d\n",
2022-05-16 1137 adev->vcn.num_vcn_inst + 1,
2022-05-16 1138 AMDGPU_MAX_VCN_INSTANCES);
2021-11-30 1139 }
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