SNP-enabled system requires IOMMU v1 page table to be configured with
non-zero DTE[Mode] for DMA-capable devices. This effects a number of
usecases such as IOMMU pass-through mode and AMD IOMMUv2 APIs for
binding/unbinding pasid.
The series introduce a global variable to check SNP-enabled state
during driver initialization, and use it to enforce the SNP restrictions
during runtime.
Also, for non-DMA-capable devices such as IOAPIC, the recommendation
is to set DTE[TV] and DTE[Mode] to zero on SNP-enabled system.
Therefore, additinal checks is added before setting DTE[TV].
Testing:
- Tested booting and verify dmesg.
- Tested booting with iommu=pt
- Tested loading amd_iommu_v2 driver
- Tested changing the iommu domain at runtime
- Tested booting SEV/SNP-enabled guest
- Tested when CONFIG_AMD_MEM_ENCRYPT is not set
Pre-requisite:
- [PATCH v3 00/35] iommu/amd: Add multiple PCI segments support
https://lore.kernel.org/linux-iommu/[email protected]/T/
Chanages from V2:
(https://lists.linuxfoundation.org/pipermail/iommu/2022-June/066392.html)
- Patch 4:
* Update pr_err message to report SNP not supported.
* Remove export GPL.
* Remove function stub when CONFIG_AMD_MEM_ENCRYPT is not set.
- Patch 6: Change to WARN_ONCE.
Best Regards,
Suravee
Brijesh Singh (1):
iommu/amd: Introduce function to check and enable SNP
Suravee Suthikulpanit (6):
iommu/amd: Warn when found inconsistency EFR mask
iommu/amd: Process all IVHDs before enabling IOMMU features
iommu/amd: Introduce an iommu variable for tracking SNP support status
iommu/amd: Set translation valid bit only when IO page tables are in
use
iommu/amd: Do not support IOMMU_DOMAIN_IDENTITY after SNP is enabled
iommu/amd: Do not support IOMMUv2 APIs when SNP is enabled
drivers/iommu/amd/amd_iommu_types.h | 5 ++
drivers/iommu/amd/init.c | 109 +++++++++++++++++++++++-----
drivers/iommu/amd/iommu.c | 27 ++++++-
include/linux/amd-iommu.h | 4 +
4 files changed, 123 insertions(+), 22 deletions(-)
--
2.32.0
EFR[SNPSup] needs to be checked early in the boot process, since it is
used to determine how IOMMU driver configures other IOMMU features
and data structures. This check can be done as soon as the IOMMU driver
finishes parsing IVHDs.
Introduce a variable for tracking the SNP support status, which is
initialized before enabling the rest of IOMMU features.
Also report IOMMU SNP support information for each IOMMU.
Signed-off-by: Suravee Suthikulpanit <[email protected]>
---
drivers/iommu/amd/init.c | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c
index 5f86e357dbaa..013c55e3c2f2 100644
--- a/drivers/iommu/amd/init.c
+++ b/drivers/iommu/amd/init.c
@@ -166,6 +166,8 @@ static bool amd_iommu_disabled __initdata;
static bool amd_iommu_force_enable __initdata;
static int amd_iommu_target_ivhd_type;
+static bool amd_iommu_snp_sup;
+
LIST_HEAD(amd_iommu_pci_seg_list); /* list of all PCI segments */
LIST_HEAD(amd_iommu_list); /* list of all AMD IOMMUs in the
system */
@@ -260,7 +262,6 @@ int amd_iommu_get_num_iommus(void)
return amd_iommus_present;
}
-#ifdef CONFIG_IRQ_REMAP
/*
* Iterate through all the IOMMUs to verify if the specified
* EFR bitmask of IOMMU feature are set.
@@ -285,7 +286,6 @@ static bool check_feature_on_all_iommus(u64 mask)
}
return ret;
}
-#endif
/*
* For IVHD type 0x11/0x40, EFR is also available via IVHD.
@@ -368,7 +368,7 @@ static void iommu_set_cwwb_range(struct amd_iommu *iommu)
u64 start = iommu_virt_to_phys((void *)iommu->cmd_sem);
u64 entry = start & PM_ADDR_MASK;
- if (!iommu_feature(iommu, FEATURE_SNP))
+ if (!amd_iommu_snp_sup)
return;
/* Note:
@@ -783,7 +783,7 @@ static void *__init iommu_alloc_4k_pages(struct amd_iommu *iommu,
void *buf = (void *)__get_free_pages(gfp, order);
if (buf &&
- iommu_feature(iommu, FEATURE_SNP) &&
+ amd_iommu_snp_sup &&
set_memory_4k((unsigned long)buf, (1 << order))) {
free_pages((unsigned long)buf, order);
buf = NULL;
@@ -1882,6 +1882,7 @@ static int __init init_iommu_all(struct acpi_table_header *table)
WARN_ON(p != end);
/* Phase 2 : Early feature support check */
+ amd_iommu_snp_sup = check_feature_on_all_iommus(FEATURE_SNP);
/* Phase 3 : Enabling IOMMU features */
for_each_iommu(iommu) {
@@ -2118,6 +2119,9 @@ static void print_iommu_info(void)
if (iommu->features & FEATURE_GAM_VAPIC)
pr_cont(" GA_vAPIC");
+ if (iommu->features & FEATURE_SNP)
+ pr_cont(" SNP");
+
pr_cont("\n");
}
}
--
2.32.0