EMMC and NAND have the same clock control register named 'SD_EMMC_CLOCK'
which is defined in EMMC port internally. bit0~5 of 'SD_EMMC_CLOCK' is
the divider and bit6~7 is the mux for fix pll and xtal. At the beginning,
a common MMC and NAND sub-clock was discussed and planed to be implemented
as NFC clock provider, but now this series of patches of a common MMC and
NAND sub-clock are never being accepted and the current binding was never
valid. the reasons are:
1. EMMC and NAND, which are mutually exclusive anyway
2. coupling the EMMC and NAND.
3. it seems that a common MMC and NAND sub-clock is over engineered.
and let us see the link for more information:
https://lore.kernel.org/all/[email protected]
so The meson nfc can't work now, let us rework the clock.
Changes since v6 [7]
- use COMMON_CLK instead of !HAVE_LEGACY_CLK
Changes since v5 [6]
- add change log for patch 3/5
- add patch 5/5 to fix the reporting error of test robot
Changes since v4 [5]
- split the dt binding patch into two patches, one for fixing,
clock, the other for coverting to yaml
- split the nfc driver patch into two patches, one for fixing
clock, the other for refining the get nfc resource.
Changes since v3 [4]
- use devm_platform_ioremap_resource_byname
- dt_binding_check for mtd/amlogic,meson-nand.yaml
Changes since v2 [3]
- use fw_name from dts, instead the wrong way using __clk_get_name
- reg resource size change to 0x800
- use reg-names
Changes since v1 [2]
- use clk_parent_data instead of parent_names
- define a reg resource instead of sd_emmc_c_clkc
[1] https://lore.kernel.org/r/[email protected]
https://lore.kernel.org/r/[email protected]
[2] https://lore.kernel.org/all/[email protected]
[3] https://lore.kernel.org/all/[email protected]
[4] https://lore.kernel.org/all/[email protected]/
[5] https://lore.kernel.org/all/[email protected]/
[6] https://lore.kernel.org/all/[email protected]/
Liang Yang (5):
dt-bindings: nand: meson: fix meson nfc clock
mtd: rawnand: meson: fix the clock
mtd: rawnand: meson: refine resource getting in probe
dt-bindings: nand: meson: convert txt to yaml
mtd: rawnand: meson: not support legacy clock
.../bindings/mtd/amlogic,meson-nand.txt | 60 -------------
.../bindings/mtd/amlogic,meson-nand.yaml | 88 +++++++++++++++++++
drivers/mtd/nand/raw/Kconfig | 2 +-
drivers/mtd/nand/raw/meson_nand.c | 86 +++++++++---------
4 files changed, 131 insertions(+), 105 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
create mode 100644 Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
--
2.34.1
meson NFC driver use common clock interfaces. so the test robot report
some errors once using the legacy clock with HAVE_LEGACY_CLK on.
Reported-by: kernel test robot <[email protected]>
Signed-off-by: Liang Yang <[email protected]>
---
drivers/mtd/nand/raw/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index 67b7cb67c030..0ff86ca5932d 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -395,7 +395,7 @@ config MTD_NAND_STM32_FMC2
config MTD_NAND_MESON
tristate "Support for NAND controller on Amlogic's Meson SoCs"
- depends on ARCH_MESON || COMPILE_TEST
+ depends on ARCH_MESON || COMPILE_TEST || COMMON_CLK
select MFD_SYSCON
help
Enables support for NAND controller on Amlogic's Meson SoCs.
--
2.34.1
convert the amlogic,meson-name.txt to amlogic,meson-nand.yaml
Signed-off-by: Liang Yang <[email protected]>
---
.../bindings/mtd/amlogic,meson-nand.txt | 55 ------------
.../bindings/mtd/amlogic,meson-nand.yaml | 88 +++++++++++++++++++
2 files changed, 88 insertions(+), 55 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
create mode 100644 Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
deleted file mode 100644
index 5d5cdfef417f..000000000000
--- a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
+++ /dev/null
@@ -1,55 +0,0 @@
-Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs
-
-This file documents the properties in addition to those available in
-the MTD NAND bindings.
-
-Required properties:
-- compatible : contains one of:
- - "amlogic,meson-gxl-nfc"
- - "amlogic,meson-axg-nfc"
-
-- reg : Offset and length of the register set
-
-- reg-names : "nfc" is the register set for NFC controller and "emmc"
- is the register set for MCI controller.
-
-- clocks :
- A list of phandle + clock-specifier pairs for the clocks listed
- in clock-names.
-
-- clock-names: Should contain the following:
- "core" - NFC module gate clock
- "device" - parent clock for internal NFC
-
-Optional children nodes:
-Children nodes represent the available nand chips.
-
-Other properties:
-see Documentation/devicetree/bindings/mtd/nand-controller.yaml for generic bindings.
-
-Example demonstrate on AXG SoC:
-
- nand-controller@7800 {
- compatible = "amlogic,meson-axg-nfc";
- reg = <0x0 0x7800 0x0 0x100>,
- <0x0 0x7000 0x0 0x800>;
- reg-names = "nfc", "emmc";
- #address-cells = <1>;
- #size-cells = <0>;
- interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
-
- clocks = <&clkc CLKID_SD_EMMC_C>,
- <&clkc CLKID_FCLK_DIV2>;
- clock-names = "core", "device";
-
- pinctrl-names = "default";
- pinctrl-0 = <&nand_pins>;
-
- nand@0 {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- nand-on-flash-bbt;
- };
- };
diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
new file mode 100644
index 000000000000..42634e9c0d3c
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
@@ -0,0 +1,88 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/amlogic,meson-nand.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs
+
+allOf:
+ - $ref: "nand-controller.yaml"
+
+maintainers:
+ - [email protected]
+
+properties:
+ compatible:
+ enum:
+ - "amlogic,meson-gxl-nfc"
+ - "amlogic,meson-axg-nfc"
+
+ reg:
+ maxItems: 2
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ minItems: 2
+
+ clock-names:
+ items:
+ - const: core
+ - const: device
+
+patternProperties:
+ "^nand@[0-7]$":
+ type: object
+ properties:
+ reg:
+ minimum: 0
+ maximum: 1
+
+ nand-ecc-mode:
+ const: hw
+
+ nand-ecc-step-size:
+ const: 1024
+
+ nand-ecc-strength:
+ enum: [8, 16, 24, 30, 40, 50, 60]
+ description: |
+ The ECC configurations that can be supported are as follows.
+ meson-gxl-nfc 8, 16, 24, 30, 40, 50, 60
+ meson-axg-nfc 8
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/axg-clkc.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ nand-controller@ffe07800 {
+ compatible = "amlogic,meson-axg-nfc";
+ reg = <0xffe07800 0x100>, <0xffe07000 0x800>;
+ reg-names = "nfc", "emmc";
+ interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&clkc CLKID_SD_EMMC_C>, <&clkc CLKID_FCLK_DIV2>;
+ clock-names = "core", "device";
+
+ pinctrl-0 = <&nand_pins>;
+ pinctrl-names = "default";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ nand@0 {
+ reg = <0>;
+ };
+ };
+
+...
--
2.34.1
Hi,
On 24/06/2022 15:12, Liang Yang wrote:
> meson NFC driver use common clock interfaces. so the test robot report
> some errors once using the legacy clock with HAVE_LEGACY_CLK on.
>
> Reported-by: kernel test robot <[email protected]>
> Signed-off-by: Liang Yang <[email protected]>
> ---
> drivers/mtd/nand/raw/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
> index 67b7cb67c030..0ff86ca5932d 100644
> --- a/drivers/mtd/nand/raw/Kconfig
> +++ b/drivers/mtd/nand/raw/Kconfig
> @@ -395,7 +395,7 @@ config MTD_NAND_STM32_FMC2
>
> config MTD_NAND_MESON
> tristate "Support for NAND controller on Amlogic's Meson SoCs"
> - depends on ARCH_MESON || COMPILE_TEST
> + depends on ARCH_MESON || COMPILE_TEST || COMMON_CLK
This should be :
depends on COMMON_CLK && (ARCH_MESON || COMPILE_TEST)
> select MFD_SYSCON
> help
> Enables support for NAND controller on Amlogic's Meson SoCs.
Neil
EMMC and NAND have the same clock control register named 'SD_EMMC_CLOCK'
which is defined in EMMC port internally. bit0~5 of 'SD_EMMC_CLOCK' is
the divider and bit6~7 is the mux for fix pll and xtal. At the beginning,
a common MMC and NAND sub-clock was discussed and planed to be implemented
as NFC clock provider, but now this series of patches of a common MMC and
NAND sub-clock are never being accepted and the current binding was never
valid. the reasons for giving up are:
1. EMMC and NAND, which are mutually exclusive anyway
2. coupling the EMMC and NAND.
3. it seems that a common MMC and NAND sub-clock is over engineered.
and let us see the link fot more information:
https://lore.kernel.org/all/[email protected]
so The meson nfc can't work now, let us rework the clock.
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Liang Yang <[email protected]>
---
.../bindings/mtd/amlogic,meson-nand.txt | 29 ++++++++-----------
1 file changed, 12 insertions(+), 17 deletions(-)
diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
index 5794ab1147c1..5d5cdfef417f 100644
--- a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
@@ -7,18 +7,19 @@ Required properties:
- compatible : contains one of:
- "amlogic,meson-gxl-nfc"
- "amlogic,meson-axg-nfc"
+
+- reg : Offset and length of the register set
+
+- reg-names : "nfc" is the register set for NFC controller and "emmc"
+ is the register set for MCI controller.
+
- clocks :
A list of phandle + clock-specifier pairs for the clocks listed
in clock-names.
- clock-names: Should contain the following:
"core" - NFC module gate clock
- "device" - device clock from eMMC sub clock controller
- "rx" - rx clock phase
- "tx" - tx clock phase
-
-- amlogic,mmc-syscon : Required for NAND clocks, it's shared with SD/eMMC
- controller port C
+ "device" - parent clock for internal NFC
Optional children nodes:
Children nodes represent the available nand chips.
@@ -28,24 +29,18 @@ see Documentation/devicetree/bindings/mtd/nand-controller.yaml for generic bindi
Example demonstrate on AXG SoC:
- sd_emmc_c_clkc: mmc@7000 {
- compatible = "amlogic,meson-axg-mmc-clkc", "syscon";
- reg = <0x0 0x7000 0x0 0x800>;
- };
-
nand-controller@7800 {
compatible = "amlogic,meson-axg-nfc";
- reg = <0x0 0x7800 0x0 0x100>;
+ reg = <0x0 0x7800 0x0 0x100>,
+ <0x0 0x7000 0x0 0x800>;
+ reg-names = "nfc", "emmc";
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc CLKID_SD_EMMC_C>,
- <&sd_emmc_c_clkc CLKID_MMC_DIV>,
- <&sd_emmc_c_clkc CLKID_MMC_PHASE_RX>,
- <&sd_emmc_c_clkc CLKID_MMC_PHASE_TX>;
- clock-names = "core", "device", "rx", "tx";
- amlogic,mmc-syscon = <&sd_emmc_c_clkc>;
+ <&clkc CLKID_FCLK_DIV2>;
+ clock-names = "core", "device";
pinctrl-names = "default";
pinctrl-0 = <&nand_pins>;
--
2.34.1
simply use devm_platform_ioremap_resource_byname() instead of two steps:
res = platform_get_resource(pdev, IORESOURCE_MEM, 0) and
reg_base = devm_ioremap_resource(dev, res)
Reviewed-by: Kevin Hilman <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Signed-off-by: Liang Yang <[email protected]>
---
drivers/mtd/nand/raw/meson_nand.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/mtd/nand/raw/meson_nand.c b/drivers/mtd/nand/raw/meson_nand.c
index cc93667a1e7f..6e50387475bb 100644
--- a/drivers/mtd/nand/raw/meson_nand.c
+++ b/drivers/mtd/nand/raw/meson_nand.c
@@ -1378,7 +1378,6 @@ static int meson_nfc_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct meson_nfc *nfc;
- struct resource *res;
int ret, irq;
nfc = devm_kzalloc(dev, sizeof(*nfc), GFP_KERNEL);
@@ -1395,8 +1394,7 @@ static int meson_nfc_probe(struct platform_device *pdev)
nfc->dev = dev;
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- nfc->reg_base = devm_ioremap_resource(dev, res);
+ nfc->reg_base = devm_platform_ioremap_resource_byname(pdev, "nfc");
if (IS_ERR(nfc->reg_base))
return PTR_ERR(nfc->reg_base);
--
2.34.1
Hi Neil,
On 2022/6/24 21:27, Neil Armstrong wrote:
> [ EXTERNAL EMAIL ]
>
> Hi,
>
> On 24/06/2022 15:12, Liang Yang wrote:
>> meson NFC driver use common clock interfaces. so the test robot report
>> some errors once using the legacy clock with HAVE_LEGACY_CLK on.
>>
>> Reported-by: kernel test robot <[email protected]>
>> Signed-off-by: Liang Yang <[email protected]>
>> ---
>> drivers/mtd/nand/raw/Kconfig | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
>> index 67b7cb67c030..0ff86ca5932d 100644
>> --- a/drivers/mtd/nand/raw/Kconfig
>> +++ b/drivers/mtd/nand/raw/Kconfig
>> @@ -395,7 +395,7 @@ config MTD_NAND_STM32_FMC2
>> config MTD_NAND_MESON
>> tristate "Support for NAND controller on Amlogic's Meson SoCs"
>> - depends on ARCH_MESON || COMPILE_TEST
>> + depends on ARCH_MESON || COMPILE_TEST || COMMON_CLK
>
> This should be :
> depends on COMMON_CLK && (ARCH_MESON || COMPILE_TEST)
ok, i will fix it. thanks.
>
>> select MFD_SYSCON
>> help
>> Enables support for NAND controller on Amlogic's Meson SoCs.
>
> Neil
>
> .