First device specific compatible, then general one.
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: David Heidelberg <[email protected]>
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 2 +-
arch/arm/boot/dts/qcom-apq8084.dtsi | 2 +-
arch/arm/boot/dts/qcom-ipq4019.dtsi | 2 +-
arch/arm/boot/dts/qcom-msm8974.dtsi | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 9120d10dcd9e..67e625e56e04 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -309,7 +309,7 @@ dsps_smsm: dsps@4 {
firmware {
scm {
- compatible = "qcom,scm-apq8064";
+ compatible = "qcom,scm-apq8064", "qcom,scm";
clocks = <&rpmcc RPM_DAYTONA_FABRIC_CLK>;
clock-names = "core";
diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi
index cb01faa23eb7..123c0c32d1df 100644
--- a/arch/arm/boot/dts/qcom-apq8084.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8084.dtsi
@@ -95,7 +95,7 @@ memory {
firmware {
scm {
- compatible = "qcom,scm";
+ compatible = "qcom,scm-apq8084", "qcom,scm";
clocks = <&gcc GCC_CE1_CLK> , <&gcc GCC_CE1_AXI_CLK>, <&gcc GCC_CE1_AHB_CLK>;
clock-names = "core", "bus", "iface";
};
diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
index c5da723f7674..4faf854aab9c 100644
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -156,7 +156,7 @@ xo: xo {
firmware {
scm {
- compatible = "qcom,scm-ipq4019";
+ compatible = "qcom,scm-ipq4019", "qcom,scm";
};
};
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 804d094c4d79..4cbd8d91f7d0 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -96,7 +96,7 @@ CPU_SPC: spc {
firmware {
scm {
- compatible = "qcom,scm";
+ compatible = "qcom,scm-msm8974", "qcom,scm";
clocks = <&gcc GCC_CE1_CLK>, <&gcc GCC_CE1_AXI_CLK>, <&gcc GCC_CE1_AHB_CLK>;
clock-names = "core", "bus", "iface";
};
--
2.35.1
First device specific compatible, then general one.
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: David Heidelberg <[email protected]>
---
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 2 +-
arch/arm64/boot/dts/qcom/msm8953.dtsi | 2 +-
arch/arm64/boot/dts/qcom/msm8996.dtsi | 2 +-
arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index 748575ed1490..19228e4f5313 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -125,7 +125,7 @@ opp-1800000000 {
firmware {
scm {
- compatible = "qcom,scm";
+ compatible = "qcom,scm-ipq6018", "qcom,scm";
};
};
diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi
index ffc3ec2cd3bc..6fd361be0fe2 100644
--- a/arch/arm64/boot/dts/qcom/msm8953.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi
@@ -215,7 +215,7 @@ L2_1: l2-cache_1 {
firmware {
scm: scm {
- compatible = "qcom,scm-msm8953";
+ compatible = "qcom,scm-msm8953", "qcom,scm";
clocks = <&gcc GCC_CRYPTO_CLK>,
<&gcc GCC_CRYPTO_AXI_CLK>,
<&gcc GCC_CRYPTO_AHB_CLK>;
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index ab95ec4a7491..7c854c9c2517 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -357,7 +357,7 @@ opp-2150400000 {
firmware {
scm {
- compatible = "qcom,scm-msm8996";
+ compatible = "qcom,scm-msm8996", "qcom,scm";
qcom,dload-mode = <&tcsr 0x13000>;
};
};
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index d0760e6ec942..fc4a490add48 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -628,7 +628,7 @@ cpu7_opp20: opp-2841600000 {
firmware {
scm: scm {
- compatible = "qcom,scm";
+ compatible = "qcom,scm-sm8250", "qcom,scm";
#reset-cells = <1>;
};
};
--
2.35.1
Convert Qualcomm SCM firmware binding to the yaml format.
This commit also:
- adds qcom,scm-mdm9607 into list which has only core clock
- adds qcom,scm-sm6125, qcom,scm-ipq6018
- #reset-cells, because the property is already used
Signed-off-by: David Heidelberg <[email protected]>
--
v4:
- added clocks minItems and maxItems
- removed quotes from $id and $schema
- adjusted description of TCSR HW block
v3:
- add preceding patches for ARM and arm64 adding missing compatible strings
- extended with missing compatible strings
- added two additional maintainers, see https://lkml.org/lkml/2022/6/23/1969
v2:
- changed maintainer to Bjorn
- document #reset-cells
---
.../devicetree/bindings/firmware/qcom,scm.txt | 57 -------
.../bindings/firmware/qcom,scm.yaml | 140 ++++++++++++++++++
2 files changed, 140 insertions(+), 57 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/firmware/qcom,scm.txt
create mode 100644 Documentation/devicetree/bindings/firmware/qcom,scm.yaml
diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.txt b/Documentation/devicetree/bindings/firmware/qcom,scm.txt
deleted file mode 100644
index 0f4e5ab26477..000000000000
--- a/Documentation/devicetree/bindings/firmware/qcom,scm.txt
+++ /dev/null
@@ -1,57 +0,0 @@
-QCOM Secure Channel Manager (SCM)
-
-Qualcomm processors include an interface to communicate to the secure firmware.
-This interface allows for clients to request different types of actions. These
-can include CPU power up/down, HDCP requests, loading of firmware, and other
-assorted actions.
-
-Required properties:
-- compatible: must contain one of the following:
- * "qcom,scm-apq8064"
- * "qcom,scm-apq8084"
- * "qcom,scm-ipq4019"
- * "qcom,scm-ipq806x"
- * "qcom,scm-ipq8074"
- * "qcom,scm-mdm9607"
- * "qcom,scm-msm8226"
- * "qcom,scm-msm8660"
- * "qcom,scm-msm8916"
- * "qcom,scm-msm8953"
- * "qcom,scm-msm8960"
- * "qcom,scm-msm8974"
- * "qcom,scm-msm8976"
- * "qcom,scm-msm8994"
- * "qcom,scm-msm8996"
- * "qcom,scm-msm8998"
- * "qcom,scm-sc7180"
- * "qcom,scm-sc7280"
- * "qcom,scm-sdm845"
- * "qcom,scm-sdx55"
- * "qcom,scm-sm6350"
- * "qcom,scm-sm8150"
- * "qcom,scm-sm8250"
- * "qcom,scm-sm8350"
- * "qcom,scm-sm8450"
- and:
- * "qcom,scm"
-- clocks: Specifies clocks needed by the SCM interface, if any:
- * core clock required for "qcom,scm-apq8064", "qcom,scm-msm8660" and
- "qcom,scm-msm8960"
- * core, iface and bus clocks required for "qcom,scm-apq8084",
- "qcom,scm-msm8916", "qcom,scm-msm8953", "qcom,scm-msm8974" and "qcom,scm-msm8976"
-- clock-names: Must contain "core" for the core clock, "iface" for the interface
- clock and "bus" for the bus clock per the requirements of the compatible.
-- qcom,dload-mode: phandle to the TCSR hardware block and offset of the
- download mode control register (optional)
-
-Example for MSM8916:
-
- firmware {
- scm {
- compatible = "qcom,msm8916", "qcom,scm";
- clocks = <&gcc GCC_CRYPTO_CLK> ,
- <&gcc GCC_CRYPTO_AXI_CLK>,
- <&gcc GCC_CRYPTO_AHB_CLK>;
- clock-names = "core", "bus", "iface";
- };
- };
diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
new file mode 100644
index 000000000000..b01acbd1e408
--- /dev/null
+++ b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
@@ -0,0 +1,140 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/firmware/qcom,scm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: QCOM Secure Channel Manager (SCM)
+
+description: |
+ Qualcomm processors include an interface to communicate to the secure firmware.
+ This interface allows for clients to request different types of actions.
+ These can include CPU power up/down, HDCP requests, loading of firmware,
+ and other assorted actions.
+
+maintainers:
+ - Bjorn Andersson <[email protected]>
+ - Robert Marko <[email protected]>
+ - Guru Das Srinagesh <[email protected]>
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - qcom,scm-apq8064
+ - qcom,scm-apq8084
+ - qcom,scm-ipq4019
+ - qcom,scm-ipq6018
+ - qcom,scm-ipq806x
+ - qcom,scm-ipq8074
+ - qcom,scm-mdm9607
+ - qcom,scm-msm8226
+ - qcom,scm-msm8660
+ - qcom,scm-msm8916
+ - qcom,scm-msm8953
+ - qcom,scm-msm8960
+ - qcom,scm-msm8974
+ - qcom,scm-msm8976
+ - qcom,scm-msm8994
+ - qcom,scm-msm8996
+ - qcom,scm-msm8998
+ - qcom,scm-sc7180
+ - qcom,scm-sc7280
+ - qcom,scm-sdm845
+ - qcom,scm-sdx55
+ - qcom,scm-sm6125
+ - qcom,scm-sm6350
+ - qcom,scm-sm8150
+ - qcom,scm-sm8250
+ - qcom,scm-sm8350
+ - qcom,scm-sm8450
+ - qcom,scm-qcs404
+ - const: qcom,scm
+
+ clocks:
+ minItems: 1
+ maxItems: 3
+
+ clock-names:
+ minItems: 1
+ maxItems: 3
+
+ '#reset-cells':
+ const: 1
+
+ qcom,dload-mode:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ items:
+ - items:
+ - description: phandle to TCSR hardware block
+ - description: offset of the download mode control register
+ description: TCSR hardware block
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,scm-apq8064
+ - qcom,scm-mdm9607
+ - qcom,scm-msm8660
+ - qcom,scm-msm8960
+ then:
+ properties:
+ clock-names:
+ items:
+ - const: core
+
+ clocks:
+ maxItems: 1
+
+ required:
+ - clocks
+ - clock-names
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,scm-apq8084
+ - qcom,scm-msm8916
+ - qcom,scm-msm8953
+ - qcom,scm-msm8974
+ - qcom,scm-msm8976
+ then:
+ properties:
+ clock-names:
+ items:
+ - const: core
+ - const: bus
+ - const: iface
+
+ clocks:
+ minItems: 3
+ maxItems: 3
+
+
+ required:
+ - clocks
+ - clock-names
+
+required:
+ - compatible
+
+additionalProperties: false
+
+examples:
+ - |
+ include <dt-bindings/clock/qcom,gcc-msm8916.h>
+
+ firmware {
+ scm {
+ compatible = "qcom,msm8916", "qcom,scm";
+ clocks = <&gcc GCC_CRYPTO_CLK>,
+ <&gcc GCC_CRYPTO_AXI_CLK>,
+ <&gcc GCC_CRYPTO_AHB_CLK>;
+ clock-names = "core", "bus", "iface";
+ };
+ };
--
2.35.1
On 26/06/2022 20:32, David Heidelberg wrote:
> Convert Qualcomm SCM firmware binding to the yaml format.
>
> This commit also:
> - adds qcom,scm-mdm9607 into list which has only core clock
> - adds qcom,scm-sm6125, qcom,scm-ipq6018
> - #reset-cells, because the property is already used
>
> Signed-off-by: David Heidelberg <[email protected]>
> --
> v4:
> - added clocks minItems and maxItems
> - removed quotes from $id and $schema
> - adjusted description of TCSR HW block
Thank you for your patch. There is something to discuss/improve.
> +properties:
> + compatible:
> + items:
> + - enum:
> + - qcom,scm-apq8064
> + - qcom,scm-apq8084
> + - qcom,scm-ipq4019
> + - qcom,scm-ipq6018
> + - qcom,scm-ipq806x
> + - qcom,scm-ipq8074
> + - qcom,scm-mdm9607
> + - qcom,scm-msm8226
> + - qcom,scm-msm8660
> + - qcom,scm-msm8916
> + - qcom,scm-msm8953
> + - qcom,scm-msm8960
> + - qcom,scm-msm8974
> + - qcom,scm-msm8976
> + - qcom,scm-msm8994
> + - qcom,scm-msm8996
> + - qcom,scm-msm8998
> + - qcom,scm-sc7180
> + - qcom,scm-sc7280
> + - qcom,scm-sdm845
> + - qcom,scm-sdx55
> + - qcom,scm-sm6125
> + - qcom,scm-sm6350
> + - qcom,scm-sm8150
> + - qcom,scm-sm8250
> + - qcom,scm-sm8350
> + - qcom,scm-sm8450
> + - qcom,scm-qcs404
> + - const: qcom,scm
> +
> + clocks:
> + minItems: 1
> + maxItems: 3
> +
> + clock-names:
> + minItems: 1
> + maxItems: 3
> +
> + '#reset-cells':
> + const: 1
> +
> + qcom,dload-mode:
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + items:
> + - items:
> + - description: phandle to TCSR hardware block
> + - description: offset of the download mode control register
> + description: TCSR hardware block
> +
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - qcom,scm-apq8064
> + - qcom,scm-mdm9607
> + - qcom,scm-msm8660
> + - qcom,scm-msm8960
> + then:
> + properties:
> + clock-names:
> + items:
> + - const: core
> +
> + clocks:
> + maxItems: 1
> +
> + required:
> + - clocks
> + - clock-names
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - qcom,scm-apq8084
> + - qcom,scm-msm8916
> + - qcom,scm-msm8953
> + - qcom,scm-msm8974
> + - qcom,scm-msm8976
> + then:
> + properties:
> + clock-names:
> + items:
> + - const: core
> + - const: bus
> + - const: iface
> +
> + clocks:
> + minItems: 3
> + maxItems: 3
> +
> +
Just one blank line.
> + required:
> + - clocks
> + - clock-names
> +
> +required:
> + - compatible
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + include <dt-bindings/clock/qcom,gcc-msm8916.h>
> +
> + firmware {
> + scm {
> + compatible = "qcom,msm8916", "qcom,scm";
> + clocks = <&gcc GCC_CRYPTO_CLK>,
> + <&gcc GCC_CRYPTO_AXI_CLK>,
> + <&gcc GCC_CRYPTO_AHB_CLK>;
> + clock-names = "core", "bus", "iface";
> + };
> + };
Best regards,
Krzysztof
On Sun, 26 Jun 2022 20:32:47 +0200, David Heidelberg wrote:
> Convert Qualcomm SCM firmware binding to the yaml format.
>
> This commit also:
> - adds qcom,scm-mdm9607 into list which has only core clock
> - adds qcom,scm-sm6125, qcom,scm-ipq6018
> - #reset-cells, because the property is already used
>
> Signed-off-by: David Heidelberg <[email protected]>
> --
> v4:
> - added clocks minItems and maxItems
> - removed quotes from $id and $schema
> - adjusted description of TCSR HW block
> v3:
> - add preceding patches for ARM and arm64 adding missing compatible strings
> - extended with missing compatible strings
> - added two additional maintainers, see https://lkml.org/lkml/2022/6/23/1969
> v2:
> - changed maintainer to Bjorn
> - document #reset-cells
> ---
> .../devicetree/bindings/firmware/qcom,scm.txt | 57 -------
> .../bindings/firmware/qcom,scm.yaml | 140 ++++++++++++++++++
> 2 files changed, 140 insertions(+), 57 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/firmware/qcom,scm.txt
> create mode 100644 Documentation/devicetree/bindings/firmware/qcom,scm.yaml
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
Error: Documentation/devicetree/bindings/firmware/qcom,scm.example.dts:18.17-18 syntax error
FATAL ERROR: Unable to parse input tree
make[1]: *** [scripts/Makefile.lib:383: Documentation/devicetree/bindings/firmware/qcom,scm.example.dtb] Error 1
make[1]: *** Waiting for unfinished jobs....
make: *** [Makefile:1404: dt_binding_check] Error 2
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/patch/
This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit.
On Jun 26 2022 20:32, David Heidelberg wrote:
> Convert Qualcomm SCM firmware binding to the yaml format.
>
> This commit also:
> - adds qcom,scm-mdm9607 into list which has only core clock
> - adds qcom,scm-sm6125, qcom,scm-ipq6018
> - #reset-cells, because the property is already used
>
> Signed-off-by: David Heidelberg <[email protected]>
> --
> v4:
> - added clocks minItems and maxItems
> - removed quotes from $id and $schema
> - adjusted description of TCSR HW block
> v3:
> - add preceding patches for ARM and arm64 adding missing compatible strings
> - extended with missing compatible strings
> - added two additional maintainers, see https://lkml.org/lkml/2022/6/23/1969
> v2:
> - changed maintainer to Bjorn
> - document #reset-cells
> ---
> .../devicetree/bindings/firmware/qcom,scm.txt | 57 -------
> .../bindings/firmware/qcom,scm.yaml | 140 ++++++++++++++++++
> 2 files changed, 140 insertions(+), 57 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/firmware/qcom,scm.txt
> create mode 100644 Documentation/devicetree/bindings/firmware/qcom,scm.yaml
>
> diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.txt b/Documentation/devicetree/bindings/firmware/qcom,scm.txt
> deleted file mode 100644
> index 0f4e5ab26477..000000000000
> --- a/Documentation/devicetree/bindings/firmware/qcom,scm.txt
> +++ /dev/null
> @@ -1,57 +0,0 @@
> -QCOM Secure Channel Manager (SCM)
> -
> -Qualcomm processors include an interface to communicate to the secure firmware.
> -This interface allows for clients to request different types of actions. These
> -can include CPU power up/down, HDCP requests, loading of firmware, and other
> -assorted actions.
> -
> -Required properties:
> -- compatible: must contain one of the following:
> - * "qcom,scm-apq8064"
> - * "qcom,scm-apq8084"
> - * "qcom,scm-ipq4019"
> - * "qcom,scm-ipq806x"
> - * "qcom,scm-ipq8074"
> - * "qcom,scm-mdm9607"
> - * "qcom,scm-msm8226"
> - * "qcom,scm-msm8660"
> - * "qcom,scm-msm8916"
> - * "qcom,scm-msm8953"
> - * "qcom,scm-msm8960"
> - * "qcom,scm-msm8974"
> - * "qcom,scm-msm8976"
> - * "qcom,scm-msm8994"
> - * "qcom,scm-msm8996"
> - * "qcom,scm-msm8998"
> - * "qcom,scm-sc7180"
> - * "qcom,scm-sc7280"
> - * "qcom,scm-sdm845"
> - * "qcom,scm-sdx55"
> - * "qcom,scm-sm6350"
> - * "qcom,scm-sm8150"
> - * "qcom,scm-sm8250"
> - * "qcom,scm-sm8350"
> - * "qcom,scm-sm8450"
> - and:
> - * "qcom,scm"
> -- clocks: Specifies clocks needed by the SCM interface, if any:
> - * core clock required for "qcom,scm-apq8064", "qcom,scm-msm8660" and
> - "qcom,scm-msm8960"
> - * core, iface and bus clocks required for "qcom,scm-apq8084",
> - "qcom,scm-msm8916", "qcom,scm-msm8953", "qcom,scm-msm8974" and "qcom,scm-msm8976"
> -- clock-names: Must contain "core" for the core clock, "iface" for the interface
> - clock and "bus" for the bus clock per the requirements of the compatible.
> -- qcom,dload-mode: phandle to the TCSR hardware block and offset of the
> - download mode control register (optional)
> -
> -Example for MSM8916:
> -
> - firmware {
> - scm {
> - compatible = "qcom,msm8916", "qcom,scm";
> - clocks = <&gcc GCC_CRYPTO_CLK> ,
> - <&gcc GCC_CRYPTO_AXI_CLK>,
> - <&gcc GCC_CRYPTO_AHB_CLK>;
> - clock-names = "core", "bus", "iface";
> - };
> - };
> diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
> new file mode 100644
> index 000000000000..b01acbd1e408
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
> @@ -0,0 +1,140 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/firmware/qcom,scm.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: QCOM Secure Channel Manager (SCM)
> +
> +description: |
> + Qualcomm processors include an interface to communicate to the secure firmware.
> + This interface allows for clients to request different types of actions.
> + These can include CPU power up/down, HDCP requests, loading of firmware,
> + and other assorted actions.
> +
> +maintainers:
> + - Bjorn Andersson <[email protected]>
> + - Robert Marko <[email protected]>
> + - Guru Das Srinagesh <[email protected]>
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - qcom,scm-apq8064
> + - qcom,scm-apq8084
> + - qcom,scm-ipq4019
> + - qcom,scm-ipq6018
> + - qcom,scm-ipq806x
> + - qcom,scm-ipq8074
> + - qcom,scm-mdm9607
> + - qcom,scm-msm8226
> + - qcom,scm-msm8660
> + - qcom,scm-msm8916
> + - qcom,scm-msm8953
> + - qcom,scm-msm8960
> + - qcom,scm-msm8974
> + - qcom,scm-msm8976
> + - qcom,scm-msm8994
> + - qcom,scm-msm8996
> + - qcom,scm-msm8998
> + - qcom,scm-sc7180
> + - qcom,scm-sc7280
> + - qcom,scm-sdm845
> + - qcom,scm-sdx55
> + - qcom,scm-sm6125
> + - qcom,scm-sm6350
> + - qcom,scm-sm8150
> + - qcom,scm-sm8250
> + - qcom,scm-sm8350
> + - qcom,scm-sm8450
> + - qcom,scm-qcs404
> + - const: qcom,scm
> +
> + clocks:
> + minItems: 1
> + maxItems: 3
> +
> + clock-names:
> + minItems: 1
> + maxItems: 3
> +
> + '#reset-cells':
> + const: 1
> +
> + qcom,dload-mode:
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + items:
> + - items:
> + - description: phandle to TCSR hardware block
> + - description: offset of the download mode control register
> + description: TCSR hardware block
> +
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - qcom,scm-apq8064
scm-apq8064 doesn't have the clock specified in the driver (there's a FIXME
comment to specify it), so even though the DT node specifies the clock, it
currently has no effect. We would need to check if the conditions for
re-enabling the clock are satisfied, and update the driver for this to take
effect.
> + - qcom,scm-mdm9607
scm-mdm9607 has three clocks listed in the driver, not one. Please move this to
the "three-clocks" list below.
> + - qcom,scm-msm8660
> + - qcom,scm-msm8960
These two are good - they are listed as having a single clock each in the
driver.
> + then:
> + properties:
> + clock-names:
> + items:
> + - const: core
> +
> + clocks:
> + maxItems: 1
> +
> + required:
> + - clocks
> + - clock-names
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - qcom,scm-apq8084
> + - qcom,scm-msm8916
> + - qcom,scm-msm8953
> + - qcom,scm-msm8974
> + - qcom,scm-msm8976
Verified that the above five nodes are all listed as supporting three clocks
each in the driver.
> + then:
> + properties:
> + clock-names:
> + items:
> + - const: core
> + - const: bus
> + - const: iface
> +
> + clocks:
> + minItems: 3
> + maxItems: 3
> +
> +
> + required:
> + - clocks
> + - clock-names
> +
> +required:
> + - compatible
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + include <dt-bindings/clock/qcom,gcc-msm8916.h>
> +
> + firmware {
> + scm {
> + compatible = "qcom,msm8916", "qcom,scm";
> + clocks = <&gcc GCC_CRYPTO_CLK>,
> + <&gcc GCC_CRYPTO_AXI_CLK>,
> + <&gcc GCC_CRYPTO_AHB_CLK>;
> + clock-names = "core", "bus", "iface";
> + };
> + };
> --
> 2.35.1
>
On Sun, 26 Jun 2022 20:32:45 +0200, David Heidelberg wrote:
> First device specific compatible, then general one.
>
>
Applied, thanks!
[1/3] ARM: dts: qcom: extend scm compatible to match dt-schema
commit: 363c1b04cfce5615f2dc1b7f19e4456937ed2068
Best regards,
--
Bjorn Andersson <[email protected]>
On Sun, 26 Jun 2022 20:32:46 +0200, David Heidelberg wrote:
> First device specific compatible, then general one.
>
>
Applied, thanks!
[2/3] arm64: dts: qcom: extend scm compatible strings
commit: b9c0c0e5da43ff3aa6dd93e2f994dc889dd5b261
Best regards,
--
Bjorn Andersson <[email protected]>