2022-06-27 09:30:09

by Kavyasree Kotagiri

Subject: [PATCH] ARM: dts: lan966x: Cleanup flexcom3 usart pinctrl settings.

On pcb8291, Flexcom3 usart has only tx and rx pins.
Cleaningup usart3 pinctrl settings.

Signed-off-by: Kavyasree Kotagiri <[email protected]>
---
arch/arm/boot/dts/lan966x-pcb8291.dts | 18 ++++++------------
1 file changed, 6 insertions(+), 12 deletions(-)

diff --git a/arch/arm/boot/dts/lan966x-pcb8291.dts b/arch/arm/boot/dts/lan966x-pcb8291.dts
index 3c7e3a7d6f14..5dc8ed4cee9a 100644
--- a/arch/arm/boot/dts/lan966x-pcb8291.dts
+++ b/arch/arm/boot/dts/lan966x-pcb8291.dts
@@ -19,19 +19,13 @@
};

&gpio {
- fc_shrd7_pins: fc_shrd7-pins {
- pins = "GPIO_49";
- function = "fc_shrd7";
- };
-
- fc_shrd8_pins: fc_shrd8-pins {
- pins = "GPIO_54";
- function = "fc_shrd8";
+ fc3_b_rxd_pins: fc3-b-rxd-pins {
+ pins = "GPIO_52";
+ function = "fc3_b";
};

- fc3_b_pins: fcb3-spi-pins {
- /* SCK, RXD, TXD */
- pins = "GPIO_51", "GPIO_52", "GPIO_53";
+ fc3_b_txd_pins: fc3-b-txd-pins {
+ pins = "GPIO_53";
function = "fc3_b";
};

@@ -53,7 +47,7 @@
status = "okay";

usart3: serial@200 {
- pinctrl-0 = <&fc3_b_pins>, <&fc_shrd7_pins>, <&fc_shrd8_pins>;
+ pinctrl-0 = <&fc3_b_rxd_pins>, <&fc3_b_txd_pins>;
pinctrl-names = "default";
status = "okay";
};
--
2.17.1

2022-07-01 08:48:40

by Nicolas Ferre

Subject: Re: [PATCH] ARM: dts: lan966x: Cleanup flexcom3 usart pinctrl settings.

On 27/06/2022 at 11:12, Kavyasree Kotagiri wrote:
> On pcb8291, Flexcom3 usart has only tx and rx pins.
> Cleaningup usart3 pinctrl settings.
>
> Signed-off-by: Kavyasree Kotagiri <[email protected]>

Okay, looks good to me:
Acked-by: Nicolas Ferre <[email protected]>

We'll integrate it in our next dt branch that we'll build for arm-soc.

Best regards,
Nicolas

> ---
> arch/arm/boot/dts/lan966x-pcb8291.dts | 18 ++++++------------
> 1 file changed, 6 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm/boot/dts/lan966x-pcb8291.dts b/arch/arm/boot/dts/lan966x-pcb8291.dts
> index 3c7e3a7d6f14..5dc8ed4cee9a 100644
> --- a/arch/arm/boot/dts/lan966x-pcb8291.dts
> +++ b/arch/arm/boot/dts/lan966x-pcb8291.dts
> @@ -19,19 +19,13 @@
> };
>
> &gpio {
> - fc_shrd7_pins: fc_shrd7-pins {
> - pins = "GPIO_49";
> - function = "fc_shrd7";
> - };
> -
> - fc_shrd8_pins: fc_shrd8-pins {
> - pins = "GPIO_54";
> - function = "fc_shrd8";
> + fc3_b_rxd_pins: fc3-b-rxd-pins {
> + pins = "GPIO_52";
> + function = "fc3_b";
> };
>
> - fc3_b_pins: fcb3-spi-pins {
> - /* SCK, RXD, TXD */
> - pins = "GPIO_51", "GPIO_52", "GPIO_53";
> + fc3_b_txd_pins: fc3-b-txd-pins {
> + pins = "GPIO_53";
> function = "fc3_b";
> };
>
> @@ -53,7 +47,7 @@
> status = "okay";
>
> usart3: serial@200 {
> - pinctrl-0 = <&fc3_b_pins>, <&fc_shrd7_pins>, <&fc_shrd8_pins>;
> + pinctrl-0 = <&fc3_b_rxd_pins>, <&fc3_b_txd_pins>;
> pinctrl-names = "default";
> status = "okay";
> };


--
Nicolas Ferre

2022-07-01 09:01:38

by Claudiu Beznea

Subject: Re: [PATCH] ARM: dts: lan966x: Cleanup flexcom3 usart pinctrl settings.

On 27.06.2022 12:12, Kavyasree Kotagiri wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> On pcb8291, Flexcom3 usart has only tx and rx pins.
> Cleaningup usart3 pinctrl settings.
>
> Signed-off-by: Kavyasree Kotagiri <[email protected]>
> ---
> arch/arm/boot/dts/lan966x-pcb8291.dts | 18 ++++++------------
> 1 file changed, 6 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm/boot/dts/lan966x-pcb8291.dts b/arch/arm/boot/dts/lan966x-pcb8291.dts
> index 3c7e3a7d6f14..5dc8ed4cee9a 100644
> --- a/arch/arm/boot/dts/lan966x-pcb8291.dts
> +++ b/arch/arm/boot/dts/lan966x-pcb8291.dts
> @@ -19,19 +19,13 @@
> };
>
> &gpio {
> - fc_shrd7_pins: fc_shrd7-pins {
> - pins = "GPIO_49";
> - function = "fc_shrd7";
> - };
> -
> - fc_shrd8_pins: fc_shrd8-pins {
> - pins = "GPIO_54";
> - function = "fc_shrd8";
> + fc3_b_rxd_pins: fc3-b-rxd-pins {
> + pins = "GPIO_52";
> + function = "fc3_b";
> };
>
> - fc3_b_pins: fcb3-spi-pins {
> - /* SCK, RXD, TXD */
> - pins = "GPIO_51", "GPIO_52", "GPIO_53";
> + fc3_b_txd_pins: fc3-b-txd-pins {
> + pins = "GPIO_53";

Could we keep both pins under the same node? As in case of can0_b_pins,
something like:

fc3_b_pins: fc3-b-pins {
pins = "GPIO_52", "GPIO_53";
function = "fc3_b";
};

Thank you,
Claudiu Beznea

> function = "fc3_b";
> };
>
> @@ -53,7 +47,7 @@
> status = "okay";
>
> usart3: serial@200 {
> - pinctrl-0 = <&fc3_b_pins>, <&fc_shrd7_pins>, <&fc_shrd8_pins>;
> + pinctrl-0 = <&fc3_b_rxd_pins>, <&fc3_b_txd_pins>;
> pinctrl-names = "default";
> status = "okay";
> };
> --
> 2.17.1
>
>
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