Subject: [PATCH 08/11] arm64: dts: mediatek: cherry: Enable T-PHYs and USB XHCI controllers

Add USB functionality by enabling the required PHYs and the XHCI
controllers.
This enables all of the supported USB ports on the Cherry boards.

Please note that u3phy1 also enables u3port1, which is configured
to be a PCI-Express PHY for the second PCIe controller that is
found on the MT8195 SoC, which will be enabled in a later commit.

Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
---
.../boot/dts/mediatek/mt8195-cherry.dtsi | 55 +++++++++++++++++++
1 file changed, 55 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
index 23a86d07274c..379d0e5c4055 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
@@ -93,6 +93,15 @@ ppvar_sys: regulator-ppvar-sys {
regulator-always-on;
regulator-boot-on;
};
+
+ usb_vbus: regulator-5v0-usb-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ regulator-always-on;
+ };
};

&i2c0 {
@@ -563,6 +572,52 @@ &spi0 {
mediatek,pad-select = <0>;
};

+&u3phy0 {
+ status = "okay";
+};
+
+&u3phy1 {
+ status = "okay";
+};
+
+&u3phy2 {
+ status = "okay";
+};
+
+&u3phy3 {
+ status = "okay";
+};
+
&uart0 {
status = "okay";
};
+
+&xhci0 {
+ status = "okay";
+
+ vusb33-supply = <&mt6359_vusb_ldo_reg>;
+ vbus-supply = <&usb_vbus>;
+};
+
+&xhci1 {
+ status = "okay";
+
+ vusb33-supply = <&mt6359_vusb_ldo_reg>;
+ vbus-supply = <&usb_vbus>;
+};
+
+&xhci2 {
+ status = "okay";
+
+ vusb33-supply = <&mt6359_vusb_ldo_reg>;
+ vbus-supply = <&usb_vbus>;
+};
+
+&xhci3 {
+ status = "okay";
+
+ /* MT7921's USB Bluetooth has issues with USB2 LPM */
+ usb2-lpm-disable;
+ vusb33-supply = <&mt6359_vusb_ldo_reg>;
+ vbus-supply = <&usb_vbus>;
+};
--
2.35.1


2022-07-01 23:02:52

by Nícolas F. R. A. Prado

[permalink] [raw]
Subject: Re: [PATCH 08/11] arm64: dts: mediatek: cherry: Enable T-PHYs and USB XHCI controllers

On Thu, Jun 30, 2022 at 05:33:13PM +0200, AngeloGioacchino Del Regno wrote:
> Add USB functionality by enabling the required PHYs and the XHCI
> controllers.
> This enables all of the supported USB ports on the Cherry boards.
>
> Please note that u3phy1 also enables u3port1, which is configured
> to be a PCI-Express PHY for the second PCIe controller that is
> found on the MT8195 SoC, which will be enabled in a later commit.
>
> Signed-off-by: AngeloGioacchino Del Regno <[email protected]>

Reviewed-by: N?colas F. R. A. Prado <[email protected]>

Thanks,
N?colas