2022-07-04 10:43:13

by Herve Codina

Subject: [PATCH v5 3/3] ARM: dts: lan966x: Add UDPHS support

Add UDPHS (the USB High Speed Device Port controller) support.

The both lan966x SOCs (LAN9662 and LAN9668) have the same UDPHS
IP. This IP is also the same as the one present in the SAMA5D3
SOC.

Signed-off-by: Herve Codina <[email protected]>
---
arch/arm/boot/dts/lan966x.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)

diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi
index 3cb02fffe716..a54fee5254a4 100644
--- a/arch/arm/boot/dts/lan966x.dtsi
+++ b/arch/arm/boot/dts/lan966x.dtsi
@@ -84,6 +84,17 @@ soc {
#size-cells = <1>;
ranges;

+ udc: usb@200000 {
+ compatible = "microchip,lan9662-udc",
+ "atmel,sama5d3-udc";
+ reg = <0x00200000 0x80000>,
+ <0xe0808000 0x400>;
+ interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks GCK_GATE_UDPHS>, <&nic_clk>;
+ clock-names = "pclk", "hclk";
+ status = "disabled";
+ };
+
switch: switch@e0000000 {
compatible = "microchip,lan966x-switch";
reg = <0xe0000000 0x0100000>,
--
2.35.3

2022-07-05 07:51:01

by Claudiu Beznea

Subject: Re: [PATCH v5 3/3] ARM: dts: lan966x: Add UDPHS support

On 04.07.2022 13:28, Herve Codina wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> Add UDPHS (the USB High Speed Device Port controller) support.
>
> The both lan966x SOCs (LAN9662 and LAN9668) have the same UDPHS
> IP. This IP is also the same as the one present in the SAMA5D3
> SOC.
>
> Signed-off-by: Herve Codina <[email protected]>

Applied to at91-dt, thanks!

> ---
> arch/arm/boot/dts/lan966x.dtsi | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi
> index 3cb02fffe716..a54fee5254a4 100644
> --- a/arch/arm/boot/dts/lan966x.dtsi
> +++ b/arch/arm/boot/dts/lan966x.dtsi
> @@ -84,6 +84,17 @@ soc {
> #size-cells = <1>;
> ranges;
>
> + udc: usb@200000 {
> + compatible = "microchip,lan9662-udc",
> + "atmel,sama5d3-udc";
> + reg = <0x00200000 0x80000>,
> + <0xe0808000 0x400>;
> + interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clks GCK_GATE_UDPHS>, <&nic_clk>;
> + clock-names = "pclk", "hclk";
> + status = "disabled";
> + };
> +
> switch: switch@e0000000 {
> compatible = "microchip,lan966x-switch";
> reg = <0xe0000000 0x0100000>,
> --
> 2.35.3
>