From: Conor Dooley <[email protected]>
The default implementation of store_cpu_topology() is exactly that
used by RISC-V so revert the portions of aaaabbbbccccdddd ("riscv:
arch-topology: fix default topology reporting") which add the arch
specific version.
Signed-off-by: Conor Dooley <[email protected]>
---
arch/riscv/include/asm/topology.h | 13 -------------
arch/riscv/kernel/Makefile | 1 -
arch/riscv/kernel/smpboot.c | 1 -
arch/riscv/kernel/topology.c | 32 -------------------------------
4 files changed, 47 deletions(-)
delete mode 100644 arch/riscv/include/asm/topology.h
delete mode 100644 arch/riscv/kernel/topology.c
diff --git a/arch/riscv/include/asm/topology.h b/arch/riscv/include/asm/topology.h
deleted file mode 100644
index 36bc6ecda898..000000000000
--- a/arch/riscv/include/asm/topology.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries
- */
-
-#ifndef _ASM_RISCV_TOPOLOGY_H
-#define _ASM_RISCV_TOPOLOGY_H
-
-#include <asm-generic/topology.h>
-
-void store_cpu_topology(unsigned int cpuid);
-
-#endif /* _ASM_RISCV_TOPOLOGY_H */
diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile
index 9518882ba6f9..c71d6591d539 100644
--- a/arch/riscv/kernel/Makefile
+++ b/arch/riscv/kernel/Makefile
@@ -50,7 +50,6 @@ obj-y += riscv_ksyms.o
obj-y += stacktrace.o
obj-y += cacheinfo.o
obj-y += patch.o
-obj-y += topology.o
obj-y += probes/
obj-$(CONFIG_MMU) += vdso.o vdso/
diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
index a8239b4b61f3..a1c861f84fe2 100644
--- a/arch/riscv/kernel/smpboot.c
+++ b/arch/riscv/kernel/smpboot.c
@@ -32,7 +32,6 @@
#include <asm/sections.h>
#include <asm/sbi.h>
#include <asm/smp.h>
-#include <asm/topology.h>
#include "head.h"
diff --git a/arch/riscv/kernel/topology.c b/arch/riscv/kernel/topology.c
deleted file mode 100644
index db72862bd5b5..000000000000
--- a/arch/riscv/kernel/topology.c
+++ /dev/null
@@ -1,32 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries
- *
- * Based on the arm64 version, which was in turn based on arm32, which was
- * ultimately based on sh's.
- * The arm64 version was listed as:
- * Copyright (C) 2011,2013,2014 Linaro Limited.
- */
-
-#include <linux/arch_topology.h>
-#include <linux/topology.h>
-#include <asm/topology.h>
-
-void store_cpu_topology(unsigned int cpuid)
-{
- struct cpu_topology *cpuid_topo = &cpu_topology[cpuid];
-
- if (cpuid_topo->package_id != -1)
- goto topology_populated;
-
- cpuid_topo->thread_id = -1;
- cpuid_topo->core_id = cpuid;
- cpuid_topo->package_id = cpu_to_node(cpuid);
-
- pr_debug("CPU%u: package %d core %d thread %d\n",
- cpuid, cpuid_topo->package_id, cpuid_topo->core_id,
- cpuid_topo->thread_id);
-
-topology_populated:
- update_siblings_masks(cpuid);
-}
--
2.37.0