2022-07-04 10:42:50

by Herve Codina

Subject: [PATCH v5 1/3] clk: lan966x: Fix the lan966x clock gate register address

The register address used for the clock gate register is the base
register address coming from first reg map (ie. the generic
clock registers) instead of the second reg map defining the clock
gate register.

Use the correct clock gate register address.

Fixes: 5ad5915dea00 ("clk: lan966x: Extend lan966x clock driver for clock gating support")
Signed-off-by: Herve Codina <[email protected]>
---
drivers/clk/clk-lan966x.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/clk-lan966x.c b/drivers/clk/clk-lan966x.c
index d1535ac13e89..81cb90955d68 100644
--- a/drivers/clk/clk-lan966x.c
+++ b/drivers/clk/clk-lan966x.c
@@ -213,7 +213,7 @@ static int lan966x_gate_clk_register(struct device *dev,

hw_data->hws[i] =
devm_clk_hw_register_gate(dev, clk_gate_desc[idx].name,
- "lan966x", 0, base,
+ "lan966x", 0, gate_base,
clk_gate_desc[idx].bit_idx,
0, &clk_gate_lock);

--
2.35.3

2022-07-05 08:56:24

by Claudiu Beznea

Subject: Re: [PATCH v5 1/3] clk: lan966x: Fix the lan966x clock gate register address

On 04.07.2022 13:28, Herve Codina wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> The register address used for the clock gate register is the base
> register address coming from first reg map (ie. the generic
> clock registers) instead of the second reg map defining the clock
> gate register.
>
> Use the correct clock gate register address.
>
> Fixes: 5ad5915dea00 ("clk: lan966x: Extend lan966x clock driver for clock gating support")
> Signed-off-by: Herve Codina <[email protected]>

Reviewed-by: Claudiu Beznea <[email protected]>


> ---
> drivers/clk/clk-lan966x.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/clk-lan966x.c b/drivers/clk/clk-lan966x.c
> index d1535ac13e89..81cb90955d68 100644
> --- a/drivers/clk/clk-lan966x.c
> +++ b/drivers/clk/clk-lan966x.c
> @@ -213,7 +213,7 @@ static int lan966x_gate_clk_register(struct device *dev,
>
> hw_data->hws[i] =
> devm_clk_hw_register_gate(dev, clk_gate_desc[idx].name,
> - "lan966x", 0, base,
> + "lan966x", 0, gate_base,
> clk_gate_desc[idx].bit_idx,
> 0, &clk_gate_lock);
>
> --
> 2.35.3
>

2022-07-05 14:24:04

by Michael Walle

Subject: Re: [PATCH v5 1/3] clk: lan966x: Fix the lan966x clock gate register address

> The register address used for the clock gate register is the base
> register address coming from first reg map (ie. the generic
> clock registers) instead of the second reg map defining the clock
> gate register.
>
> Use the correct clock gate register address.
>
> Fixes: 5ad5915dea00 ("clk: lan966x: Extend lan966x clock driver for clock gating support")
> Signed-off-by: Herve Codina <[email protected]>

Tested-by: Michael Walle <[email protected]>

2022-07-19 07:14:00

by Stephen Boyd

Subject: Re: [PATCH v5 1/3] clk: lan966x: Fix the lan966x clock gate register address

Quoting Herve Codina (2022-07-04 03:28:43)
> The register address used for the clock gate register is the base
> register address coming from first reg map (ie. the generic
> clock registers) instead of the second reg map defining the clock
> gate register.
>
> Use the correct clock gate register address.
>
> Fixes: 5ad5915dea00 ("clk: lan966x: Extend lan966x clock driver for clock gating support")
> Signed-off-by: Herve Codina <[email protected]>
> ---

Applied to clk-fixes