Document compatible for the PMP8074 PMIC.
Signed-off-by: Robert Marko <[email protected]>
---
Changes in v8:
* Add to dtschema now that its available instead
* Drop ACK as we are dealing with dtschema now
Changes in v7:
* Fixup commit description
---
Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml
index 65cbc6dee545..a05ae172fccc 100644
--- a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml
+++ b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml
@@ -66,6 +66,7 @@ properties:
- qcom,pmi8998
- qcom,pmk8350
- qcom,pmm8155au
+ - qcom,pmp8074
- qcom,pmr735a
- qcom,pmr735b
- qcom,pms405
--
2.37.2
Add support for ADC5_VREF_VADC channel to rev2 ADC5 channel list.
This channel measures the VADC reference LDO output.
Signed-off-by: Robert Marko <[email protected]>
Acked-by: Jonathan Cameron <[email protected]>
---
drivers/iio/adc/qcom-spmi-adc5.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/iio/adc/qcom-spmi-adc5.c b/drivers/iio/adc/qcom-spmi-adc5.c
index e96da2ef1964..821fee60a765 100644
--- a/drivers/iio/adc/qcom-spmi-adc5.c
+++ b/drivers/iio/adc/qcom-spmi-adc5.c
@@ -597,6 +597,8 @@ static const struct adc5_channels adc5_chans_rev2[ADC5_MAX_CHANNEL] = {
SCALE_HW_CALIB_DEFAULT)
[ADC5_1P25VREF] = ADC5_CHAN_VOLT("vref_1p25", 0,
SCALE_HW_CALIB_DEFAULT)
+ [ADC5_VREF_VADC] = ADC5_CHAN_VOLT("vref_vadc", 0,
+ SCALE_HW_CALIB_DEFAULT)
[ADC5_VPH_PWR] = ADC5_CHAN_VOLT("vph_pwr", 1,
SCALE_HW_CALIB_DEFAULT)
[ADC5_VBAT_SNS] = ADC5_CHAN_VOLT("vbat_sns", 1,
--
2.37.2
Add support for PMP8074 PMIC which is a companion PMIC for the Qualcomm
IPQ8074 SoC-s.
It shares the same subtype identifier as PM8901.
Signed-off-by: Robert Marko <[email protected]>
Acked-by: Lee Jones <[email protected]>
---
drivers/mfd/qcom-spmi-pmic.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mfd/qcom-spmi-pmic.c b/drivers/mfd/qcom-spmi-pmic.c
index 00003a868d28..7e2cd79d17eb 100644
--- a/drivers/mfd/qcom-spmi-pmic.c
+++ b/drivers/mfd/qcom-spmi-pmic.c
@@ -60,6 +60,7 @@ static const struct of_device_id pmic_spmi_id_table[] = {
{ .compatible = "qcom,pmi8994", .data = N_USIDS(2) },
{ .compatible = "qcom,pmi8998", .data = N_USIDS(2) },
{ .compatible = "qcom,pmk8002", .data = N_USIDS(2) },
+ { .compatible = "qcom,pmp8074", .data = N_USIDS(2) },
{ .compatible = "qcom,smb2351", .data = N_USIDS(2) },
{ .compatible = "qcom,spmi-pmic", .data = N_USIDS(1) },
{ }
--
2.37.2
PMP8074 is a companion PMIC to the Qualcomm IPQ8074 series that is
controlled via SPMI.
Add DTSI for it providing GPIO, regulator, RTC and VADC support.
RTC is disabled by default as there is no built-in battery so it will
loose time unless board vendor added a battery, so make it optional.
Signed-off-by: Robert Marko <[email protected]>
---
Changes in v7:
* Dual license with BSD-3-Clause
* Use "-" instead of underscores in node names
Changes in v6:
* Add RTC and GPIO nodes
Changes in v5:
* Remove #address-cells and #size-cells as they are not required for
regulator subnodes
---
arch/arm64/boot/dts/qcom/pmp8074.dtsi | 125 ++++++++++++++++++++++++++
1 file changed, 125 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/pmp8074.dtsi
diff --git a/arch/arm64/boot/dts/qcom/pmp8074.dtsi b/arch/arm64/boot/dts/qcom/pmp8074.dtsi
new file mode 100644
index 000000000000..ceb2e6358b3d
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/pmp8074.dtsi
@@ -0,0 +1,125 @@
+// SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause
+
+#include <dt-bindings/spmi/spmi.h>
+#include <dt-bindings/iio/qcom,spmi-vadc.h>
+
+&spmi_bus {
+ pmic@0 {
+ compatible = "qcom,pmp8074", "qcom,spmi-pmic";
+ reg = <0x0 SPMI_USID>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pmp8074_adc: adc@3100 {
+ compatible = "qcom,spmi-adc-rev2";
+ reg = <0x3100>;
+ interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #io-channel-cells = <1>;
+
+ ref-gnd@0 {
+ reg = <ADC5_REF_GND>;
+ qcom,pre-scaling = <1 1>;
+ };
+
+ vref-1p25@1 {
+ reg = <ADC5_1P25VREF>;
+ qcom,pre-scaling = <1 1>;
+ };
+
+ vref-vadc@2 {
+ reg = <ADC5_VREF_VADC>;
+ qcom,pre-scaling = <1 1>;
+ };
+
+ pmic_die: die-temp@6 {
+ reg = <ADC5_DIE_TEMP>;
+ qcom,pre-scaling = <1 1>;
+ };
+
+ xo_therm: xo-temp@76 {
+ reg = <ADC5_XO_THERM_100K_PU>;
+ qcom,ratiometric;
+ qcom,hw-settle-time = <200>;
+ qcom,pre-scaling = <1 1>;
+ };
+
+ pa_therm1: thermistor1@77 {
+ reg = <ADC5_AMUX_THM1_100K_PU>;
+ qcom,ratiometric;
+ qcom,hw-settle-time = <200>;
+ qcom,pre-scaling = <1 1>;
+ };
+
+ pa_therm2: thermistor2@78 {
+ reg = <ADC5_AMUX_THM2_100K_PU>;
+ qcom,ratiometric;
+ qcom,hw-settle-time = <200>;
+ qcom,pre-scaling = <1 1>;
+ };
+
+ pa_therm3: thermistor3@79 {
+ reg = <ADC5_AMUX_THM3_100K_PU>;
+ qcom,ratiometric;
+ qcom,hw-settle-time = <200>;
+ qcom,pre-scaling = <1 1>;
+ };
+
+ vph-pwr@131 {
+ reg = <ADC5_VPH_PWR>;
+ qcom,pre-scaling = <1 3>;
+ };
+ };
+
+ pmp8074_rtc: rtc@6000 {
+ compatible = "qcom,pm8941-rtc";
+ reg = <0x6000>;
+ reg-names = "rtc", "alarm";
+ interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
+ allow-set-time;
+ status = "disabled";
+ };
+
+ pmp8074_gpios: gpio@c000 {
+ compatible = "qcom,pmp8074-gpio", "qcom,spmi-gpio";
+ reg = <0xc000>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pmp8074_gpios 0 0 12>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
+ pmic@1 {
+ compatible = "qcom,pmp8074", "qcom,spmi-pmic";
+ reg = <0x1 SPMI_USID>;
+
+ regulators {
+ compatible = "qcom,pmp8074-regulators";
+
+ s3: s3 {
+ regulator-name = "vdd_s3";
+ regulator-min-microvolt = <592000>;
+ regulator-max-microvolt = <1064000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ s4: s4 {
+ regulator-name = "vdd_s4";
+ regulator-min-microvolt = <712000>;
+ regulator-max-microvolt = <992000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ l11: l11 {
+ regulator-name = "l11";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ };
+ };
+ };
+};
--
2.37.2
Since now we have control over the PMP8074 PMIC providing various system
voltages including L11 which provides the SDIO/eMMC I/O voltage set it as
the SDHCI VQMMC supply.
This allows SDHCI controller to switch to 1.8V I/O mode and support high
speed modes like HS200 and HS400.
Signed-off-by: Robert Marko <[email protected]>
---
arch/arm64/boot/dts/qcom/ipq8074-hk01.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
index 81dc3a0bcd7d..b788e1605476 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
+++ b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
@@ -3,6 +3,7 @@
/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
*/
#include "ipq8074.dtsi"
+#include "pmp8074.dtsi"
/ {
model = "Qualcomm Technologies, Inc. IPQ8074-HK01";
@@ -84,6 +85,7 @@ nand@0 {
&sdhc_1 {
status = "okay";
+ vqmmc-supply = <&l11>;
};
&qusb_phy_0 {
--
2.37.2
On 19/08/2022 01:18, Robert Marko wrote:
> Document compatible for the PMP8074 PMIC.
>
> Signed-off-by: Robert Marko <[email protected]>
> ---
> Changes in v8:
Acked-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof
On Fri, 19 Aug 2022 00:18:13 +0200
Robert Marko <[email protected]> wrote:
> Add support for ADC5_VREF_VADC channel to rev2 ADC5 channel list.
> This channel measures the VADC reference LDO output.
>
> Signed-off-by: Robert Marko <[email protected]>
> Acked-by: Jonathan Cameron <[email protected]>
I've changed my mind on this, mostly because we've reached a new
cycle and I'd rather not see a v9 series + Lee is (I think)
keen to only take stuff through MFD if there is a build time
dependency.
Applied this patch directly to the togreg branch of iio.git
and pushed that out as testing for 0-day to play with it.
> ---
> drivers/iio/adc/qcom-spmi-adc5.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/iio/adc/qcom-spmi-adc5.c b/drivers/iio/adc/qcom-spmi-adc5.c
> index e96da2ef1964..821fee60a765 100644
> --- a/drivers/iio/adc/qcom-spmi-adc5.c
> +++ b/drivers/iio/adc/qcom-spmi-adc5.c
> @@ -597,6 +597,8 @@ static const struct adc5_channels adc5_chans_rev2[ADC5_MAX_CHANNEL] = {
> SCALE_HW_CALIB_DEFAULT)
> [ADC5_1P25VREF] = ADC5_CHAN_VOLT("vref_1p25", 0,
> SCALE_HW_CALIB_DEFAULT)
> + [ADC5_VREF_VADC] = ADC5_CHAN_VOLT("vref_vadc", 0,
> + SCALE_HW_CALIB_DEFAULT)
> [ADC5_VPH_PWR] = ADC5_CHAN_VOLT("vph_pwr", 1,
> SCALE_HW_CALIB_DEFAULT)
> [ADC5_VBAT_SNS] = ADC5_CHAN_VOLT("vbat_sns", 1,
On Fri, 19 Aug 2022 at 19:20, Jonathan Cameron <[email protected]> wrote:
>
> On Fri, 19 Aug 2022 00:18:13 +0200
> Robert Marko <[email protected]> wrote:
>
> > Add support for ADC5_VREF_VADC channel to rev2 ADC5 channel list.
> > This channel measures the VADC reference LDO output.
> >
> > Signed-off-by: Robert Marko <[email protected]>
> > Acked-by: Jonathan Cameron <[email protected]>
>
> I've changed my mind on this, mostly because we've reached a new
> cycle and I'd rather not see a v9 series + Lee is (I think)
> keen to only take stuff through MFD if there is a build time
> dependency.
>
> Applied this patch directly to the togreg branch of iio.git
> and pushed that out as testing for 0-day to play with it.
Thanks,
Robert
> > ---
> > drivers/iio/adc/qcom-spmi-adc5.c | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/drivers/iio/adc/qcom-spmi-adc5.c b/drivers/iio/adc/qcom-spmi-adc5.c
> > index e96da2ef1964..821fee60a765 100644
> > --- a/drivers/iio/adc/qcom-spmi-adc5.c
> > +++ b/drivers/iio/adc/qcom-spmi-adc5.c
> > @@ -597,6 +597,8 @@ static const struct adc5_channels adc5_chans_rev2[ADC5_MAX_CHANNEL] = {
> > SCALE_HW_CALIB_DEFAULT)
> > [ADC5_1P25VREF] = ADC5_CHAN_VOLT("vref_1p25", 0,
> > SCALE_HW_CALIB_DEFAULT)
> > + [ADC5_VREF_VADC] = ADC5_CHAN_VOLT("vref_vadc", 0,
> > + SCALE_HW_CALIB_DEFAULT)
> > [ADC5_VPH_PWR] = ADC5_CHAN_VOLT("vph_pwr", 1,
> > SCALE_HW_CALIB_DEFAULT)
> > [ADC5_VBAT_SNS] = ADC5_CHAN_VOLT("vbat_sns", 1,
>
On Fri, 19 Aug 2022, Robert Marko wrote:
> Document compatible for the PMP8074 PMIC.
>
> Signed-off-by: Robert Marko <[email protected]>
> ---
> Changes in v8:
> * Add to dtschema now that its available instead
> * Drop ACK as we are dealing with dtschema now
>
> Changes in v7:
> * Fixup commit description
> ---
> Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml | 1 +
> 1 file changed, 1 insertion(+)
Applied, thanks.
--
Lee Jones [李琼斯]
On Fri, 19 Aug 2022, Robert Marko wrote:
> Add support for PMP8074 PMIC which is a companion PMIC for the Qualcomm
> IPQ8074 SoC-s.
>
> It shares the same subtype identifier as PM8901.
>
> Signed-off-by: Robert Marko <[email protected]>
> Acked-by: Lee Jones <[email protected]>
> ---
> drivers/mfd/qcom-spmi-pmic.c | 1 +
> 1 file changed, 1 insertion(+)
Applied, thanks.
--
Lee Jones [李琼斯]
On Fri, 19 Aug 2022 00:18:11 +0200, Robert Marko wrote:
> Document compatible for the PMP8074 PMIC.
>
>
Applied, thanks!
[4/5] arm64: dts: qcom: add PMP8074 DTSI
commit: 01da7baf018c4977a260b40e7e6978133c9ef824
[5/5] arm64: dts: qcom: ipq8074-hk01: add VQMMC supply
commit: 378c2064264e18b61922c388c09faba544ce7a15
Best regards,
--
Bjorn Andersson <[email protected]>