J784s4 EVM board is designed for TI J784s4 SoC. It supports the following
interfaces:
* 32 GB DDR4 RAM
* x2 Gigabit Ethernet interfaces capable of working in Switch and MAC mode
* x1 Input Audio Jack, x1 Output Audio Jack
* x1 USB2.0 Hub with two Type A host and x1 USB 3.1 Type-C Port
* x2 4L PCIe connector
* x1 UHS-1 capable micro-SD card slot
* 512 Mbit OSPI flash, 1 Gbit Octal NAND flash, 512 Mbit QSPI flash,
UFS flash.
* x6 UART through UART-USB bridge
* XDS110 for onboard JTAG debug using USB
* Temperature sensors, user push buttons and LEDs
* 40-pin User Expansion Connector
* x2 ENET Expansion Connector, x1 GESI expander, x2 Display connector
* x1 15-pin CSI header
* x6 MCAN instances
Add basic support for J784s4-EVM.
Schematics: https://www.ti.com/lit/zip/sprr458
Signed-off-by: Hari Nagalla <[email protected]>
Signed-off-by: Apurva Nandan <[email protected]>
Signed-off-by: Nishanth Menon <[email protected]>
Signed-off-by: Matt Ranostay <[email protected]>
Signed-off-by: Rahul T R <[email protected]>
Signed-off-by: Suman Anna <[email protected]>
Signed-off-by: Pratyush Yadav <[email protected]>
Signed-off-by: Siddharth Vadapalli <[email protected]>
---
arch/arm64/boot/dts/ti/Makefile | 2 +
arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 602 +++++++++++++++++++++++
2 files changed, 604 insertions(+)
create mode 100644 arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
index 02e5d80344d0..6381c458738a 100644
--- a/arch/arm64/boot/dts/ti/Makefile
+++ b/arch/arm64/boot/dts/ti/Makefile
@@ -19,6 +19,8 @@ dtb-$(CONFIG_ARCH_K3) += k3-j7200-common-proc-board.dtb
dtb-$(CONFIG_ARCH_K3) += k3-j721s2-common-proc-board.dtb
+dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm.dtb
+
dtb-$(CONFIG_ARCH_K3) += k3-am642-evm.dtb
dtb-$(CONFIG_ARCH_K3) += k3-am642-sk.dtb
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
new file mode 100644
index 000000000000..7ca08e115e67
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
@@ -0,0 +1,602 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+ *
+ * Common Processor Board: https://www.ti.com/tool/J721EXCPXEVM
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/net/ti-dp83867.h>
+#include <dt-bindings/gpio/gpio.h>
+#include "k3-j784s4.dtsi"
+
+/ {
+ compatible = "ti,j784s4-evm", "ti,j784s4";
+ model = "Texas Instruments J784S4 EVM";
+
+ chosen {
+ stdout-path = "serial2:115200n8";
+ bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x2880000";
+ };
+
+ aliases {
+ serial2 = &main_uart8;
+ mmc0 = &main_sdhci0;
+ mmc1 = &main_sdhci1;
+ i2c0 = &main_i2c0;
+ can0 = &mcu_mcan0;
+ can1 = &mcu_mcan1;
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ /* 32G RAM */
+ reg = <0x00 0x80000000 0x00 0x80000000>,
+ <0x08 0x80000000 0x07 0x80000000>;
+ };
+
+ /* Reserving memory regions still pending */
+ reserved_memory: reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ secure_ddr: optee@9e800000 {
+ reg = <0x00 0x9e800000 0x00 0x01800000>;
+ alignment = <0x1000>;
+ no-map;
+ };
+ };
+
+ evm_12v0: fixedregulator-evm12v0 {
+ /* main supply */
+ compatible = "regulator-fixed";
+ regulator-name = "evm_12v0";
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vsys_3v3: fixedregulator-vsys3v3 {
+ /* Output of LM5140 */
+ compatible = "regulator-fixed";
+ regulator-name = "vsys_3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&evm_12v0>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vsys_5v0: fixedregulator-vsys5v0 {
+ /* Output of LM5140 */
+ compatible = "regulator-fixed";
+ regulator-name = "vsys_5v0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&evm_12v0>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vdd_mmc1: fixedregulator-sd {
+ /* Output of TPS22918 */
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_mmc1";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ enable-active-high;
+ vin-supply = <&vsys_3v3>;
+ gpio = <&exp2 2 GPIO_ACTIVE_HIGH>;
+ };
+
+ vdd_sd_dv: gpio-regulator-TLV71033 {
+ /* Output of TLV71033 */
+ compatible = "regulator-gpio";
+ regulator-name = "tlv71033";
+ pinctrl-names = "default";
+ pinctrl-0 = <&vdd_sd_dv_pins_default>;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ vin-supply = <&vsys_5v0>;
+ gpios = <&main_gpio0 8 GPIO_ACTIVE_HIGH>;
+ states = <1800000 0x0>,
+ <3300000 0x1>;
+ };
+
+ transceiver1: can-phy1 {
+ compatible = "ti,tcan1042";
+ #phy-cells = <0>;
+ max-bitrate = <5000000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcu_mcan0_gpio_pins_default>;
+ standby-gpios = <&wkup_gpio0 69 GPIO_ACTIVE_HIGH>;
+ };
+
+ transceiver2: can-phy2 {
+ compatible = "ti,tcan1042";
+ #phy-cells = <0>;
+ max-bitrate = <5000000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcu_mcan1_gpio_pins_default>;
+ standby-gpios = <&wkup_gpio0 2 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&main_pmx0 {
+ main_uart8_pins_default: main-uart8-pins-default {
+ pinctrl-single,pins = <
+ J784S4_IOPAD(0x040, PIN_INPUT, 14) /* (AF37) MCASP0_AXR0.UART8_CTSn */
+ J784S4_IOPAD(0x044, PIN_OUTPUT, 14) /* (AG37) MCASP0_AXR1.UART8_RTSn */
+ J784S4_IOPAD(0x0d0, PIN_INPUT, 11) /* (AP38) SPI0_CS1.UART8_RXD */
+ J784S4_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AN38) SPI0_CLK.UART8_TXD */
+ >;
+ };
+
+ main_i2c0_pins_default: main-i2c0-pins-default {
+ pinctrl-single,pins = <
+ J784S4_IOPAD(0x0e0, PIN_INPUT_PULLUP, 0) /* (AN36) I2C0_SCL */
+ J784S4_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AP37) I2C0_SDA */
+ >;
+ };
+
+ main_i2c4_pins_default: main-i2c4-pins-default {
+ pinctrl-single,pins = <
+ J784S4_IOPAD(0x014, PIN_INPUT_PULLUP, 8) /* (AG33) MCAN14_TX.I2C4_SCL */
+ J784S4_IOPAD(0x010, PIN_INPUT_PULLUP, 8) /* (AH33) MCAN13_RX.I2C4_SDA */
+ >;
+ };
+
+ main_mmc1_pins_default: main-mmc1-pins-default {
+ pinctrl-single,pins = <
+ J784S4_IOPAD(0x104, PIN_INPUT, 0) /* (AB38) MMC1_CLK */
+ J784S4_IOPAD(0x108, PIN_INPUT, 0) /* (AB36) MMC1_CMD */
+ J784S4_IOPAD(0x100, PIN_INPUT, 0) /* (###) MMC1_CLKLB */
+ J784S4_IOPAD(0x0fc, PIN_INPUT, 0) /* (AA33) MMC1_DAT0 */
+ J784S4_IOPAD(0x0f8, PIN_INPUT, 0) /* (AB34) MMC1_DAT1 */
+ J784S4_IOPAD(0x0f4, PIN_INPUT, 0) /* (AA32) MMC1_DAT2 */
+ J784S4_IOPAD(0x0f0, PIN_INPUT, 0) /* (AC38) MMC1_DAT3 */
+ J784S4_IOPAD(0x0e8, PIN_INPUT, 8) /* (AR38) TIMER_IO0.MMC1_SDCD */
+ >;
+ };
+
+ vdd_sd_dv_pins_default: vdd-sd-dv-pins-default {
+ pinctrl-single,pins = <
+ J784S4_IOPAD(0x020, PIN_INPUT, 7) /* (AJ35) MCAN15_RX.GPIO0_8 */
+ >;
+ };
+
+ main_i2c5_pins_default: main-i2c5-pins-default {
+ pinctrl-single,pins = <
+ J784S4_IOPAD(0x01c, PIN_INPUT, 8) /* (AG34) MCAN15_TX.I2C5_SCL */
+ J784S4_IOPAD(0x018, PIN_INPUT, 8) /* (AK36) MCAN14_RX.I2C5_SDA */
+ >;
+ };
+};
+
+&wkup_pmx0 {
+ mcu_cpsw_pins_default: mcu-cpsw-pins-default {
+ pinctrl-single,pins = <
+ J784S4_WKUP_IOPAD(0x094, PIN_INPUT, 0) /* (A35) MCU_RGMII1_RD0 */
+ J784S4_WKUP_IOPAD(0x090, PIN_INPUT, 0) /* (B36) MCU_RGMII1_RD1 */
+ J784S4_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (C36) MCU_RGMII1_RD2 */
+ J784S4_WKUP_IOPAD(0x088, PIN_INPUT, 0) /* (D36) MCU_RGMII1_RD3 */
+ J784S4_WKUP_IOPAD(0x084, PIN_INPUT, 0) /* (B37) MCU_RGMII1_RXC */
+ J784S4_WKUP_IOPAD(0x06c, PIN_INPUT, 0) /* (C37) MCU_RGMII1_RX_CTL */
+ J784S4_WKUP_IOPAD(0x07c, PIN_OUTPUT, 0) /* (D37) MCU_RGMII1_TD0 */
+ J784S4_WKUP_IOPAD(0x078, PIN_OUTPUT, 0) /* (D38) MCU_RGMII1_TD1 */
+ J784S4_WKUP_IOPAD(0x074, PIN_OUTPUT, 0) /* (E37) MCU_RGMII1_TD2 */
+ J784S4_WKUP_IOPAD(0x070, PIN_OUTPUT, 0) /* (E38) MCU_RGMII1_TD3 */
+ J784S4_WKUP_IOPAD(0x080, PIN_OUTPUT, 0) /* (E36) MCU_RGMII1_TXC */
+ J784S4_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /* (C38) MCU_RGMII1_TX_CTL */
+ >;
+ };
+
+ mcu_mdio_pins_default: mcu-mdio-pins-default {
+ pinctrl-single,pins = <
+ J784S4_WKUP_IOPAD(0x09c, PIN_OUTPUT, 0) /* (A36) MCU_MDIO0_MDC */
+ J784S4_WKUP_IOPAD(0x098, PIN_INPUT, 0) /* (B35) MCU_MDIO0_MDIO */
+ >;
+ };
+
+ mcu_mcan0_pins_default: mcu_mcan0_pins_default {
+ pinctrl-single,pins = <
+ J784S4_WKUP_IOPAD(0x0bc, PIN_INPUT, 0) /* (F38) MCU_MCAN0_RX */
+ J784S4_WKUP_IOPAD(0x0b8, PIN_OUTPUT, 0) /* (K33) MCU_MCAN0_TX */
+ >;
+ };
+
+ mcu_mcan1_pins_default: mcu_mcan1_pins_default {
+ pinctrl-single,pins = <
+ J784S4_WKUP_IOPAD(0x0d4, PIN_INPUT, 0) /* (K36) WKUP_GPIO0_5.MCU_MCAN1_RX */
+ J784S4_WKUP_IOPAD(0x0d0, PIN_OUTPUT, 0) /* (H35) WKUP_GPIO0_4.MCU_MCAN1_TX */
+ >;
+ };
+
+ mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-pins-default {
+ pinctrl-single,pins = <
+ J784S4_WKUP_IOPAD(0x0a8, PIN_INPUT, 7) /* (J38) MCU_SPI0_D1.WKUP_GPIO0_69 */
+ >;
+ };
+
+ mcu_mcan1_gpio_pins_default: mcu-mcan1-gpio-pins-default {
+ pinctrl-single,pins = <
+ J784S4_WKUP_IOPAD(0x0c8, PIN_INPUT, 7) /* (J35) WKUP_GPIO0_2 */
+ >;
+ };
+};
+
+&main_uart0 {
+ status = "disabled";
+};
+
+&main_uart1 {
+ status = "disabled";
+};
+
+&main_uart2 {
+ status = "disabled";
+};
+
+&main_uart3 {
+ status = "disabled";
+};
+
+&main_uart4 {
+ status = "disabled";
+};
+
+&main_uart5 {
+ status = "disabled";
+};
+
+&main_uart6 {
+ status = "disabled";
+};
+
+&main_uart7 {
+ status = "disabled";
+};
+
+&main_uart8 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_uart8_pins_default>;
+};
+
+&main_uart9 {
+ status = "disabled";
+};
+
+&main_gpio2 {
+ status = "disabled";
+};
+
+&main_gpio4 {
+ status = "disabled";
+};
+
+&main_gpio6 {
+ status = "disabled";
+};
+
+&main_i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_i2c0_pins_default>;
+
+ clock-frequency = <400000>;
+
+ exp1: gpio@20 {
+ compatible = "ti,tca6416";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names = "PCIE1_2L_MODE_SEL", "PCIE1_4L_PERSTZ", "PCIE1_2L_RC_RSTZ",
+ "PCIE1_2L_EP_RST_EN", "PCIE0_4L_MODE_SEL", "PCIE0_4L_PERSTZ",
+ "PCIE0_4L_RC_RSTZ", "PCIE0_4L_EP_RST_EN", "PCIE1_4L_PRSNT#",
+ "PCIE0_4L_PRSNT#", "CDCI1_OE1/OE4", "CDCI1_OE2/OE3",
+ "AUDIO_MUX_SEL", "EXP_MUX2", "EXP_MUX3", "GESI_EXP_PHY_RSTZ";
+ };
+
+ exp2: gpio@22 {
+ compatible = "ti,tca6424";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names = "R_GPIO_RGMII1_RST", "ENET2_I2CMUX_SEL", "GPIO_USD_PWR_EN",
+ "USBC_PWR_EN", "USBC_MODE_SEL1", "USBC_MODE_SEL0",
+ "GPIO_LIN_EN", "R_CAN_STB", "CTRL_PM_I2C_OE#",
+ "ENET2_EXP_PWRDN", "ENET2_EXP_SPARE2", "CDCI2_RSTZ",
+ "USB2.0_MUX_SEL", "CANUART_MUX_SEL0", "CANUART_MUX2_SEL1",
+ "CANUART_MUX1_SEL1", "ENET1_EXP_PWRDN", "ENET1_EXP_RESETZ",
+ "ENET1_I2CMUX_SEL", "ENET1_EXP_SPARE2", "ENET2_EXP_RESETZ",
+ "USER_INPUT1", "USER_LED1", "USER_LED2";
+ };
+};
+
+&main_i2c4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_i2c4_pins_default>;
+ clock-frequency = <400000>;
+
+ exp4: gpio@20 {
+ compatible = "ti,tca6408";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+};
+
+&main_i2c1 {
+ status = "disabled";
+};
+
+&main_i2c2 {
+ status = "disabled";
+};
+
+&main_i2c3 {
+ status = "disabled";
+};
+
+&main_i2c5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_i2c5_pins_default>;
+ clock-frequency = <400000>;
+};
+
+&main_i2c6 {
+ status = "disabled";
+};
+
+&main_sdhci0 {
+ /* eMMC */
+ non-removable;
+ ti,driver-strength-ohm = <50>;
+ /*
+ * Disabling all the UHS modes by adding no-1-8-v property.
+ * To re-enable UHS modes, remove the no-1-8-v property.
+ */
+ no-1-8-v;
+ disable-wp;
+};
+
+&main_sdhci1 {
+ /* SD card */
+ pinctrl-0 = <&main_mmc1_pins_default>;
+ pinctrl-names = "default";
+ disable-wp;
+ vmmc-supply = <&vdd_mmc1>;
+ vqmmc-supply = <&vdd_sd_dv>;
+ /*
+ * Disabling all the UHS modes by adding no-1-8-v property.
+ * To re-enable UHS modes, remove the no-1-8-v property.
+ */
+ no-1-8-v;
+};
+
+&mcu_cpsw {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
+};
+
+&davinci_mdio {
+ mcu_phy0: ethernet-phy@0 {
+ reg = <0>;
+ ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
+ ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
+ ti,min-output-impedance;
+ };
+};
+
+&mcu_cpsw_port1 {
+ phy-mode = "rgmii-rxid";
+ phy-handle = <&mcu_phy0>;
+};
+
+&mailbox0_cluster0 {
+ status = "disabled";
+};
+
+&mailbox0_cluster1 {
+ status = "disabled";
+};
+
+&mailbox0_cluster2 {
+ status = "disabled";
+};
+
+&mailbox0_cluster3 {
+ status = "disabled";
+};
+
+&mailbox0_cluster4 {
+ status = "disabled";
+};
+
+&mailbox0_cluster5 {
+ status = "disabled";
+};
+
+&mailbox0_cluster6 {
+ status = "disabled";
+};
+
+&mailbox0_cluster7 {
+ status = "disabled";
+};
+
+&mailbox0_cluster8 {
+ status = "disabled";
+};
+
+&mailbox0_cluster9 {
+ status = "disabled";
+};
+
+&mailbox0_cluster10 {
+ status = "disabled";
+};
+
+&mailbox0_cluster11 {
+ status = "disabled";
+};
+
+&mailbox1_cluster0 {
+ status = "disabled";
+};
+
+&mailbox1_cluster1 {
+ status = "disabled";
+};
+
+&mailbox1_cluster2 {
+ status = "disabled";
+};
+
+&mailbox1_cluster3 {
+ status = "disabled";
+};
+
+&mailbox1_cluster4 {
+ status = "disabled";
+};
+
+&mailbox1_cluster5 {
+ status = "disabled";
+};
+
+&mailbox1_cluster6 {
+ status = "disabled";
+};
+
+&mailbox1_cluster7 {
+ status = "disabled";
+};
+
+&mailbox1_cluster8 {
+ status = "disabled";
+};
+
+&mailbox1_cluster9 {
+ status = "disabled";
+};
+
+&mailbox1_cluster10 {
+ status = "disabled";
+};
+
+&mailbox1_cluster11 {
+ status = "disabled";
+};
+
+&main_mcan0 {
+ status = "disabled";
+};
+
+&main_mcan1 {
+ status = "disabled";
+};
+
+&main_mcan2 {
+ status = "disabled";
+};
+
+&main_mcan3 {
+ status = "disabled";
+};
+
+&main_mcan4 {
+ status = "disabled";
+};
+
+&main_mcan5 {
+ status = "disabled";
+};
+
+&main_mcan6 {
+ status = "disabled";
+};
+
+&main_mcan7 {
+ status = "disabled";
+};
+
+&main_mcan8 {
+ status = "disabled";
+};
+
+&main_mcan9 {
+ status = "disabled";
+};
+
+&main_mcan10 {
+ status = "disabled";
+};
+
+&main_mcan11 {
+ status = "disabled";
+};
+
+&main_mcan12 {
+ status = "disabled";
+};
+
+&main_mcan13 {
+ status = "disabled";
+};
+
+&main_mcan14 {
+ status = "disabled";
+};
+
+&main_mcan15 {
+ status = "disabled";
+};
+
+&main_mcan16 {
+ status = "disabled";
+};
+
+&main_mcan17 {
+ status = "disabled";
+};
+
+&wkup_gpio1 {
+ status = "disabled";
+};
+
+&wkup_i2c0 {
+ status = "disabled";
+};
+
+&wkup_uart0 {
+ status = "disabled";
+};
+
+&mcu_uart0 {
+ status = "disabled";
+};
+
+&mcu_i2c0 {
+ status = "disabled";
+};
+
+&mcu_i2c1 {
+ status = "disabled";
+};
+
+&mcu_mcan0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcu_mcan0_pins_default>;
+ phys = <&transceiver1>;
+};
+
+&mcu_mcan1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcu_mcan1_pins_default>;
+ phys = <&transceiver2>;
+};
--
2.17.1
On 19/08/2022 22:00, Apurva Nandan wrote:
> J784s4 EVM board is designed for TI J784s4 SoC. It supports the following
> interfaces:
> * 32 GB DDR4 RAM
> * x2 Gigabit Ethernet interfaces capable of working in Switch and MAC mode
> * x1 Input Audio Jack, x1 Output Audio Jack
> * x1 USB2.0 Hub with two Type A host and x1 USB 3.1 Type-C Port
> * x2 4L PCIe connector
> * x1 UHS-1 capable micro-SD card slot
> * 512 Mbit OSPI flash, 1 Gbit Octal NAND flash, 512 Mbit QSPI flash,
> UFS flash.
> * x6 UART through UART-USB bridge
> * XDS110 for onboard JTAG debug using USB
> * Temperature sensors, user push buttons and LEDs
> * 40-pin User Expansion Connector
> * x2 ENET Expansion Connector, x1 GESI expander, x2 Display connector
> * x1 15-pin CSI header
> * x6 MCAN instances
>
> Add basic support for J784s4-EVM.
>
> Schematics: https://www.ti.com/lit/zip/sprr458
Use subject perfixes matching the subsystem (git log --oneline -- ...).
For example:
arm64: dts: ti:
>
> Signed-off-by: Hari Nagalla <[email protected]>
> Signed-off-by: Apurva Nandan <[email protected]>
> Signed-off-by: Nishanth Menon <[email protected]>
> Signed-off-by: Matt Ranostay <[email protected]>
> Signed-off-by: Rahul T R <[email protected]>
> Signed-off-by: Suman Anna <[email protected]>
> Signed-off-by: Pratyush Yadav <[email protected]>
> Signed-off-by: Siddharth Vadapalli <[email protected]>
> ---
> arch/arm64/boot/dts/ti/Makefile | 2 +
> arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 602 +++++++++++++++++++++++
> 2 files changed, 604 insertions(+)
> create mode 100644 arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
>
> diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
> index 02e5d80344d0..6381c458738a 100644
> --- a/arch/arm64/boot/dts/ti/Makefile
> +++ b/arch/arm64/boot/dts/ti/Makefile
> @@ -19,6 +19,8 @@ dtb-$(CONFIG_ARCH_K3) += k3-j7200-common-proc-board.dtb
>
> dtb-$(CONFIG_ARCH_K3) += k3-j721s2-common-proc-board.dtb
>
> +dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm.dtb
> +
> dtb-$(CONFIG_ARCH_K3) += k3-am642-evm.dtb
> dtb-$(CONFIG_ARCH_K3) += k3-am642-sk.dtb
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
> new file mode 100644
> index 000000000000..7ca08e115e67
> --- /dev/null
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
> @@ -0,0 +1,602 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
> + *
> + * Common Processor Board: https://www.ti.com/tool/J721EXCPXEVM
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/net/ti-dp83867.h>
> +#include <dt-bindings/gpio/gpio.h>
> +#include "k3-j784s4.dtsi"
> +
> +/ {
> + compatible = "ti,j784s4-evm", "ti,j784s4";
> + model = "Texas Instruments J784S4 EVM";
> +
> + chosen {
> + stdout-path = "serial2:115200n8";
> + bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x2880000";
earlycon is not a property of hardware. Console is defined in
stdout-path, so please drop entire bootargs.
> + };
> +
> + aliases {
> + serial2 = &main_uart8;
> + mmc0 = &main_sdhci0;
> + mmc1 = &main_sdhci1;
> + i2c0 = &main_i2c0;
> + can0 = &mcu_mcan0;
> + can1 = &mcu_mcan1;
> + };
> +
> + memory@80000000 {
> + device_type = "memory";
> + /* 32G RAM */
> + reg = <0x00 0x80000000 0x00 0x80000000>,
> + <0x08 0x80000000 0x07 0x80000000>;
> + };
> +
> + /* Reserving memory regions still pending */
> + reserved_memory: reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + secure_ddr: optee@9e800000 {
> + reg = <0x00 0x9e800000 0x00 0x01800000>;
> + alignment = <0x1000>;
> + no-map;
> + };
> + };
> +
> + evm_12v0: fixedregulator-evm12v0 {
Node name should be generic, so:
regulator-evm12v0
> + /* main supply */
> + compatible = "regulator-fixed";
> + regulator-name = "evm_12v0";
> + regulator-min-microvolt = <12000000>;
> + regulator-max-microvolt = <12000000>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + vsys_3v3: fixedregulator-vsys3v3 {
ditto
> + /* Output of LM5140 */
> + compatible = "regulator-fixed";
> + regulator-name = "vsys_3v3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + vin-supply = <&evm_12v0>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + vsys_5v0: fixedregulator-vsys5v0 {
ditto
> + /* Output of LM5140 */
> + compatible = "regulator-fixed";
> + regulator-name = "vsys_5v0";
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5000000>;
> + vin-supply = <&evm_12v0>;
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + vdd_mmc1: fixedregulator-sd {
ditto
> + /* Output of TPS22918 */
> + compatible = "regulator-fixed";
> + regulator-name = "vdd_mmc1";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + enable-active-high;
> + vin-supply = <&vsys_3v3>;
> + gpio = <&exp2 2 GPIO_ACTIVE_HIGH>;
> + };
> +
> + vdd_sd_dv: gpio-regulator-TLV71033 {
ditto
> + /* Output of TLV71033 */
> + compatible = "regulator-gpio";
> + regulator-name = "tlv71033";
> + pinctrl-names = "default";
> + pinctrl-0 = <&vdd_sd_dv_pins_default>;
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-boot-on;
> + vin-supply = <&vsys_5v0>;
> + gpios = <&main_gpio0 8 GPIO_ACTIVE_HIGH>;
> + states = <1800000 0x0>,
> + <3300000 0x1>;
> + };
> +
> + transceiver1: can-phy1 {
> + compatible = "ti,tcan1042";
> + #phy-cells = <0>;
> + max-bitrate = <5000000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&mcu_mcan0_gpio_pins_default>;
> + standby-gpios = <&wkup_gpio0 69 GPIO_ACTIVE_HIGH>;
> + };
> +
> + transceiver2: can-phy2 {
> + compatible = "ti,tcan1042";
> + #phy-cells = <0>;
> + max-bitrate = <5000000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&mcu_mcan1_gpio_pins_default>;
> + standby-gpios = <&wkup_gpio0 2 GPIO_ACTIVE_HIGH>;
> + };
Best regards,
Krzysztof
On 13:21-20220823, Krzysztof Kozlowski wrote:
> > +
> > +/ {
> > + compatible = "ti,j784s4-evm", "ti,j784s4";
> > + model = "Texas Instruments J784S4 EVM";
> > +
> > + chosen {
> > + stdout-path = "serial2:115200n8";
> > + bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x2880000";
>
> earlycon is not a property of hardware. Console is defined in
> stdout-path, so please drop entire bootargs.
We will probably have to cleanup elsewhere as well - point noted.
[...]
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
Hi Krzysztof,
On 24/08/22 10:36, Nishanth Menon wrote:
> On 13:21-20220823, Krzysztof Kozlowski wrote:
>>> +
>>> +/ {
>>> + compatible = "ti,j784s4-evm", "ti,j784s4";
>>> + model = "Texas Instruments J784S4 EVM";
>>> +
>>> + chosen {
>>> + stdout-path = "serial2:115200n8";
>>> + bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x2880000";
>>
>> earlycon is not a property of hardware. Console is defined in
earlycon is helpful for debugging early crashes. How is it any different
from "console =" property as described in
Documentation/devicetree/usage-model.rst?
>> stdout-path, so please drop entire bootargs.
>
> We will probably have to cleanup elsewhere as well - point noted.
>
Whats the alternative to pass default bootargs to kernel if bootloader
does not pass bootargs via cmdline? I see quite a few dts file use
bootargs = "earlycon" at least
--
Regards
Vignesh
On 24/08/2022 08:33, Vignesh Raghavendra wrote:
> Hi Krzysztof,
>
> On 24/08/22 10:36, Nishanth Menon wrote:
>> On 13:21-20220823, Krzysztof Kozlowski wrote:
>>>> +
>>>> +/ {
>>>> + compatible = "ti,j784s4-evm", "ti,j784s4";
>>>> + model = "Texas Instruments J784S4 EVM";
>>>> +
>>>> + chosen {
>>>> + stdout-path = "serial2:115200n8";
>>>> + bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x2880000";
>>>
>>> earlycon is not a property of hardware. Console is defined in
>
> earlycon is helpful for debugging early crashes. How is it any different
> from "console =" property as described in
> Documentation/devicetree/usage-model.rst?
choice of console is needed for basic operation and is chosen based on
current hardware setup. earlycon is purely for debugging and should be
enabled only when debugging is intended, not on mainline wide-available
sources.
>
>>> stdout-path, so please drop entire bootargs.
>>
>> We will probably have to cleanup elsewhere as well - point noted.
>>
>
> Whats the alternative to pass default bootargs to kernel if bootloader
> does not pass bootargs via cmdline? I see quite a few dts file use
> bootargs = "earlycon" at least
Uboot, your own out-of-tree testing patches? What's the point to have
earlycon available for every user which does not want to debug?
Sorry, but bootargs are not accepted in DTS. We have several discussions
around it over time...
Best regards,
Krzysztof
On 24/08/22 12:42, Krzysztof Kozlowski wrote:
> On 24/08/2022 08:33, Vignesh Raghavendra wrote:
>> Hi Krzysztof,
>>
>> On 24/08/22 10:36, Nishanth Menon wrote:
>>> On 13:21-20220823, Krzysztof Kozlowski wrote:
>>>>> +
>>>>> +/ {
>>>>> + compatible = "ti,j784s4-evm", "ti,j784s4";
>>>>> + model = "Texas Instruments J784S4 EVM";
>>>>> +
>>>>> + chosen {
>>>>> + stdout-path = "serial2:115200n8";
>>>>> + bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x2880000";
>>>>
>>>> earlycon is not a property of hardware. Console is defined in
>>
>> earlycon is helpful for debugging early crashes. How is it any different
>> from "console =" property as described in
>> Documentation/devicetree/usage-model.rst?
>
> choice of console is needed for basic operation and is chosen based on
> current hardware setup. earlycon is purely for debugging and should be
> enabled only when debugging is intended, not on mainline wide-available
> sources.
>
>>
>>>> stdout-path, so please drop entire bootargs.
>>>
>>> We will probably have to cleanup elsewhere as well - point noted.
>>>
>>
>> Whats the alternative to pass default bootargs to kernel if bootloader
>> does not pass bootargs via cmdline? I see quite a few dts file use
>> bootargs = "earlycon" at least
>
> Uboot, your own out-of-tree testing patches? What's the point to have
> earlycon available for every user which does not want to debug?
>
> Sorry, but bootargs are not accepted in DTS. We have several discussions
> around it over time...
Understood, just wanted to make sure what the latest stance is, as I see
lot of files in arm64 dts folder still use bootargs and earlycon. Thanks
for the clarification!
--
Regards
Vignesh