2022-09-01 13:20:24

by Peter Chiu

Subject: [PATCH v5] arm64: dts: mt7986: add built-in Wi-Fi device nodes

This enables built-in 802.11ax Wi-Fi support.

Reviewed-by: Sam Shih <[email protected]>
Reviewed-by: Ryder Lee <[email protected]>
Signed-off-by: Peter Chiu <[email protected]>

---
v2: add clocks and clock-names.
v3: rename wmac to wifi and change underscores to dash in node names.
v4: rebase to the latest codebase.
v5: remove useless pins in wf_dbdc_pins node.
---
arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 38 +++++++++++++++++++
arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 23 +++++++++++
arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts | 40 ++++++++++++++++++++
3 files changed, 101 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
index 882277a52b69..afe37b702eef 100644
--- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
@@ -115,6 +115,13 @@
status = "okay";
};

+&wifi {
+ status = "okay";
+ pinctrl-names = "default", "dbdc";
+ pinctrl-0 = <&wf_2g_5g_pins>;
+ pinctrl-1 = <&wf_dbdc_pins>;
+};
+
&pio {
uart1_pins: uart1-pins {
mux {
@@ -129,4 +136,35 @@
groups = "uart2";
};
};
+
+ wf_2g_5g_pins: wf-2g-5g-pins {
+ mux {
+ function = "wifi";
+ groups = "wf_2g", "wf_5g";
+ };
+ conf {
+ pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
+ "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
+ "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
+ "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
+ "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
+ "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
+ "WF1_TOP_CLK", "WF1_TOP_DATA";
+ drive-strength = <4>;
+ };
+ };
+
+ wf_dbdc_pins: wf-dbdc-pins {
+ mux {
+ function = "wifi";
+ groups = "wf_dbdc";
+ };
+ conf {
+ pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
+ "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
+ "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
+ "WF0_TOP_CLK", "WF0_TOP_DATA";
+ drive-strength = <4>;
+ };
+ };
};
diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
index e3a407d03551..890ded0efc51 100644
--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
@@ -7,6 +7,7 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/mt7986-clk.h>
+#include <dt-bindings/reset/mt7986-resets.h>

/ {
interrupt-parent = <&gic>;
@@ -70,6 +71,11 @@
reg = <0 0x43000000 0 0x30000>;
no-map;
};
+
+ wmcpu_emi: wmcpu-reserved@4fc00000 {
+ no-map;
+ reg = <0 0x4fc00000 0 0x00100000>;
+ };
};

timer {
@@ -261,6 +267,23 @@
#size-cells = <0>;
status = "disabled";
};
+
+ wifi: wifi@18000000 {
+ compatible = "mediatek,mt7986-wmac";
+ resets = <&watchdog MT7986_TOPRGU_CONSYS_SW_RST>;
+ reset-names = "consys";
+ clocks = <&topckgen CLK_TOP_CONN_MCUSYS_SEL>,
+ <&topckgen CLK_TOP_AP2CNN_HOST_SEL>;
+ clock-names = "mcu", "ap2conn";
+ reg = <0 0x18000000 0 0x1000000>,
+ <0 0x10003000 0 0x1000>,
+ <0 0x11d10000 0 0x1000>;
+ interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
+ memory-region = <&wmcpu_emi>;
+ };
};

};
diff --git a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
index 0f49d5764ff3..3443013b5971 100644
--- a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
@@ -98,3 +98,43 @@
};
};
};
+
+&wifi {
+ status = "okay";
+ pinctrl-names = "default", "dbdc";
+ pinctrl-0 = <&wf_2g_5g_pins>;
+ pinctrl-1 = <&wf_dbdc_pins>;
+};
+
+&pio {
+ wf_2g_5g_pins: wf-2g-5g-pins {
+ mux {
+ function = "wifi";
+ groups = "wf_2g", "wf_5g";
+ };
+ conf {
+ pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
+ "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
+ "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
+ "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
+ "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
+ "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
+ "WF1_TOP_CLK", "WF1_TOP_DATA";
+ drive-strength = <4>;
+ };
+ };
+
+ wf_dbdc_pins: wf-dbdc-pins {
+ mux {
+ function = "wifi";
+ groups = "wf_dbdc";
+ };
+ conf {
+ pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
+ "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
+ "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
+ "WF0_TOP_CLK", "WF0_TOP_DATA";
+ drive-strength = <4>;
+ };
+ };
+};
--
2.18.0

2022-09-01 14:46:02

by Matthias Brugger

Subject: Re: [PATCH v5] arm64: dts: mt7986: add built-in Wi-Fi device nodes

On 01/09/2022 15:05, Peter Chiu wrote:
> This enables built-in 802.11ax Wi-Fi support.
>
> Reviewed-by: Sam Shih <[email protected]>
> Reviewed-by: Ryder Lee <[email protected]>
> Signed-off-by: Peter Chiu <[email protected]>
>

That won't work without the pinctrl yaml file updated. Please send both together
so that we can review them.

Regards,
Matthias

> ---
> v2: add clocks and clock-names.
> v3: rename wmac to wifi and change underscores to dash in node names.
> v4: rebase to the latest codebase.
> v5: remove useless pins in wf_dbdc_pins node.
> ---
> arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 38 +++++++++++++++++++
> arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 23 +++++++++++
> arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts | 40 ++++++++++++++++++++
> 3 files changed, 101 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
> index 882277a52b69..afe37b702eef 100644
> --- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
> +++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
> @@ -115,6 +115,13 @@
> status = "okay";
> };
>
> +&wifi {
> + status = "okay";
> + pinctrl-names = "default", "dbdc";
> + pinctrl-0 = <&wf_2g_5g_pins>;
> + pinctrl-1 = <&wf_dbdc_pins>;
> +};
> +
> &pio {
> uart1_pins: uart1-pins {
> mux {
> @@ -129,4 +136,35 @@
> groups = "uart2";
> };
> };
> +
> + wf_2g_5g_pins: wf-2g-5g-pins {
> + mux {
> + function = "wifi";
> + groups = "wf_2g", "wf_5g";
> + };
> + conf {
> + pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
> + "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
> + "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
> + "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
> + "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
> + "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
> + "WF1_TOP_CLK", "WF1_TOP_DATA";
> + drive-strength = <4>;
> + };
> + };
> +
> + wf_dbdc_pins: wf-dbdc-pins {
> + mux {
> + function = "wifi";
> + groups = "wf_dbdc";
> + };
> + conf {
> + pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
> + "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
> + "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
> + "WF0_TOP_CLK", "WF0_TOP_DATA";
> + drive-strength = <4>;
> + };
> + };
> };
> diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
> index e3a407d03551..890ded0efc51 100644
> --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
> @@ -7,6 +7,7 @@
> #include <dt-bindings/interrupt-controller/irq.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/clock/mt7986-clk.h>
> +#include <dt-bindings/reset/mt7986-resets.h>
>
> / {
> interrupt-parent = <&gic>;
> @@ -70,6 +71,11 @@
> reg = <0 0x43000000 0 0x30000>;
> no-map;
> };
> +
> + wmcpu_emi: wmcpu-reserved@4fc00000 {
> + no-map;
> + reg = <0 0x4fc00000 0 0x00100000>;
> + };
> };
>
> timer {
> @@ -261,6 +267,23 @@
> #size-cells = <0>;
> status = "disabled";
> };
> +
> + wifi: wifi@18000000 {
> + compatible = "mediatek,mt7986-wmac";
> + resets = <&watchdog MT7986_TOPRGU_CONSYS_SW_RST>;
> + reset-names = "consys";
> + clocks = <&topckgen CLK_TOP_CONN_MCUSYS_SEL>,
> + <&topckgen CLK_TOP_AP2CNN_HOST_SEL>;
> + clock-names = "mcu", "ap2conn";
> + reg = <0 0x18000000 0 0x1000000>,
> + <0 0x10003000 0 0x1000>,
> + <0 0x11d10000 0 0x1000>;
> + interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
> + memory-region = <&wmcpu_emi>;
> + };
> };
>
> };
> diff --git a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
> index 0f49d5764ff3..3443013b5971 100644
> --- a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
> +++ b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
> @@ -98,3 +98,43 @@
> };
> };
> };
> +
> +&wifi {
> + status = "okay";
> + pinctrl-names = "default", "dbdc";
> + pinctrl-0 = <&wf_2g_5g_pins>;
> + pinctrl-1 = <&wf_dbdc_pins>;
> +};
> +
> +&pio {
> + wf_2g_5g_pins: wf-2g-5g-pins {
> + mux {
> + function = "wifi";
> + groups = "wf_2g", "wf_5g";
> + };
> + conf {
> + pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
> + "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
> + "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
> + "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
> + "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
> + "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
> + "WF1_TOP_CLK", "WF1_TOP_DATA";
> + drive-strength = <4>;
> + };
> + };
> +
> + wf_dbdc_pins: wf-dbdc-pins {
> + mux {
> + function = "wifi";
> + groups = "wf_dbdc";
> + };
> + conf {
> + pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
> + "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
> + "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
> + "WF0_TOP_CLK", "WF0_TOP_DATA";
> + drive-strength = <4>;
> + };
> + };
> +};

2022-09-02 03:32:01

by Peter Chiu

Subject: Re: [PATCH v5] arm64: dts: mt7986: add built-in Wi-Fi device nodes

On Thu, 2022-09-01 at 16:31 +0200, Matthias Brugger wrote:
>
> On 01/09/2022 15:05, Peter Chiu wrote:
> > This enables built-in 802.11ax Wi-Fi support.
> >
> > Reviewed-by: Sam Shih <[email protected]>
> > Reviewed-by: Ryder Lee <[email protected]>
> > Signed-off-by: Peter Chiu <[email protected]>
> >
>
> That won't work without the pinctrl yaml file updated. Please send
> both together
> so that we can review them.
>

Thanks for your kind reminder. I just sent the pinctrl yaml patch.

https://patchwork.kernel.org/project/linux-mediatek/patch/[email protected]/

Best Regards,
Peter Chiu
> Regards,
> Matthias
>
> > ---
> > v2: add clocks and clock-names.
> > v3: rename wmac to wifi and change underscores to dash in node
> > names.
> > v4: rebase to the latest codebase.
> > v5: remove useless pins in wf_dbdc_pins node.
> > ---
> > arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 38
> > +++++++++++++++++++
> > arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 23 +++++++++++
> > arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts | 40
> > ++++++++++++++++++++
> > 3 files changed, 101 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
> > b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
> > index 882277a52b69..afe37b702eef 100644
> > --- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
> > +++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
> > @@ -115,6 +115,13 @@
> > status = "okay";
> > };
> >
> > +&wifi {
> > + status = "okay";
> > + pinctrl-names = "default", "dbdc";
> > + pinctrl-0 = <&wf_2g_5g_pins>;
> > + pinctrl-1 = <&wf_dbdc_pins>;
> > +};
> > +
> > &pio {
> > uart1_pins: uart1-pins {
> > mux {
> > @@ -129,4 +136,35 @@
> > groups = "uart2";
> > };
> > };
> > +
> > + wf_2g_5g_pins: wf-2g-5g-pins {
> > + mux {
> > + function = "wifi";
> > + groups = "wf_2g", "wf_5g";
> > + };
> > + conf {
> > + pins = "WF0_HB1", "WF0_HB2", "WF0_HB3",
> > "WF0_HB4",
> > + "WF0_HB0", "WF0_HB0_B", "WF0_HB5",
> > "WF0_HB6",
> > + "WF0_HB7", "WF0_HB8", "WF0_HB9",
> > "WF0_HB10",
> > + "WF0_TOP_CLK", "WF0_TOP_DATA",
> > "WF1_HB1",
> > + "WF1_HB2", "WF1_HB3", "WF1_HB4",
> > "WF1_HB0",
> > + "WF1_HB5", "WF1_HB6", "WF1_HB7",
> > "WF1_HB8",
> > + "WF1_TOP_CLK", "WF1_TOP_DATA";
> > + drive-strength = <4>;
> > + };
> > + };
> > +
> > + wf_dbdc_pins: wf-dbdc-pins {
> > + mux {
> > + function = "wifi";
> > + groups = "wf_dbdc";
> > + };
> > + conf {
> > + pins = "WF0_HB1", "WF0_HB2", "WF0_HB3",
> > "WF0_HB4",
> > + "WF0_HB0", "WF0_HB0_B", "WF0_HB5",
> > "WF0_HB6",
> > + "WF0_HB7", "WF0_HB8", "WF0_HB9",
> > "WF0_HB10",
> > + "WF0_TOP_CLK", "WF0_TOP_DATA";
> > + drive-strength = <4>;
> > + };
> > + };
> > };
> > diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
> > b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
> > index e3a407d03551..890ded0efc51 100644
> > --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
> > +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
> > @@ -7,6 +7,7 @@
> > #include <dt-bindings/interrupt-controller/irq.h>
> > #include <dt-bindings/interrupt-controller/arm-gic.h>
> > #include <dt-bindings/clock/mt7986-clk.h>
> > +#include <dt-bindings/reset/mt7986-resets.h>
> >
> > / {
> > interrupt-parent = <&gic>;
> > @@ -70,6 +71,11 @@
> > reg = <0 0x43000000 0 0x30000>;
> > no-map;
> > };
> > +
> > + wmcpu_emi: wmcpu-reserved@4fc00000 {
> > + no-map;
> > + reg = <0 0x4fc00000 0 0x00100000>;
> > + };
> > };
> >
> > timer {
> > @@ -261,6 +267,23 @@
> > #size-cells = <0>;
> > status = "disabled";
> > };
> > +
> > + wifi: wifi@18000000 {
> > + compatible = "mediatek,mt7986-wmac";
> > + resets = <&watchdog
> > MT7986_TOPRGU_CONSYS_SW_RST>;
> > + reset-names = "consys";
> > + clocks = <&topckgen CLK_TOP_CONN_MCUSYS_SEL>,
> > + <&topckgen CLK_TOP_AP2CNN_HOST_SEL>;
> > + clock-names = "mcu", "ap2conn";
> > + reg = <0 0x18000000 0 0x1000000>,
> > + <0 0x10003000 0 0x1000>,
> > + <0 0x11d10000 0 0x1000>;
> > + interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
> > + memory-region = <&wmcpu_emi>;
> > + };
> > };
> >
> > };
> > diff --git a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
> > b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
> > index 0f49d5764ff3..3443013b5971 100644
> > --- a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
> > +++ b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
> > @@ -98,3 +98,43 @@
> > };
> > };
> > };
> > +
> > +&wifi {
> > + status = "okay";
> > + pinctrl-names = "default", "dbdc";
> > + pinctrl-0 = <&wf_2g_5g_pins>;
> > + pinctrl-1 = <&wf_dbdc_pins>;
> > +};
> > +
> > +&pio {
> > + wf_2g_5g_pins: wf-2g-5g-pins {
> > + mux {
> > + function = "wifi";
> > + groups = "wf_2g", "wf_5g";
> > + };
> > + conf {
> > + pins = "WF0_HB1", "WF0_HB2", "WF0_HB3",
> > "WF0_HB4",
> > + "WF0_HB0", "WF0_HB0_B", "WF0_HB5",
> > "WF0_HB6",
> > + "WF0_HB7", "WF0_HB8", "WF0_HB9",
> > "WF0_HB10",
> > + "WF0_TOP_CLK", "WF0_TOP_DATA",
> > "WF1_HB1",
> > + "WF1_HB2", "WF1_HB3", "WF1_HB4",
> > "WF1_HB0",
> > + "WF1_HB5", "WF1_HB6", "WF1_HB7",
> > "WF1_HB8",
> > + "WF1_TOP_CLK", "WF1_TOP_DATA";
> > + drive-strength = <4>;
> > + };
> > + };
> > +
> > + wf_dbdc_pins: wf-dbdc-pins {
> > + mux {
> > + function = "wifi";
> > + groups = "wf_dbdc";
> > + };
> > + conf {
> > + pins = "WF0_HB1", "WF0_HB2", "WF0_HB3",
> > "WF0_HB4",
> > + "WF0_HB0", "WF0_HB0_B", "WF0_HB5",
> > "WF0_HB6",
> > + "WF0_HB7", "WF0_HB8", "WF0_HB9",
> > "WF0_HB10",
> > + "WF0_TOP_CLK", "WF0_TOP_DATA";
> > + drive-strength = <4>;
> > + };
> > + };
> > +};

2022-09-14 14:26:46

by Matthias Brugger

Subject: Re: [PATCH v5] arm64: dts: mt7986: add built-in Wi-Fi device nodes

On 01/09/2022 15:05, Peter Chiu wrote:
> This enables built-in 802.11ax Wi-Fi support.
>
> Reviewed-by: Sam Shih <[email protected]>
> Reviewed-by: Ryder Lee <[email protected]>
> Signed-off-by: Peter Chiu <[email protected]>
>

Now that the yaml file change was accpeted:

Applied to v6.0-next/dts64

Thanks!

> ---
> v2: add clocks and clock-names.
> v3: rename wmac to wifi and change underscores to dash in node names.
> v4: rebase to the latest codebase.
> v5: remove useless pins in wf_dbdc_pins node.
> ---
> arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 38 +++++++++++++++++++
> arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 23 +++++++++++
> arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts | 40 ++++++++++++++++++++
> 3 files changed, 101 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
> index 882277a52b69..afe37b702eef 100644
> --- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
> +++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
> @@ -115,6 +115,13 @@
> status = "okay";
> };
>
> +&wifi {
> + status = "okay";
> + pinctrl-names = "default", "dbdc";
> + pinctrl-0 = <&wf_2g_5g_pins>;
> + pinctrl-1 = <&wf_dbdc_pins>;
> +};
> +
> &pio {
> uart1_pins: uart1-pins {
> mux {
> @@ -129,4 +136,35 @@
> groups = "uart2";
> };
> };
> +
> + wf_2g_5g_pins: wf-2g-5g-pins {
> + mux {
> + function = "wifi";
> + groups = "wf_2g", "wf_5g";
> + };
> + conf {
> + pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
> + "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
> + "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
> + "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
> + "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
> + "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
> + "WF1_TOP_CLK", "WF1_TOP_DATA";
> + drive-strength = <4>;
> + };
> + };
> +
> + wf_dbdc_pins: wf-dbdc-pins {
> + mux {
> + function = "wifi";
> + groups = "wf_dbdc";
> + };
> + conf {
> + pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
> + "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
> + "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
> + "WF0_TOP_CLK", "WF0_TOP_DATA";
> + drive-strength = <4>;
> + };
> + };
> };
> diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
> index e3a407d03551..890ded0efc51 100644
> --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
> @@ -7,6 +7,7 @@
> #include <dt-bindings/interrupt-controller/irq.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/clock/mt7986-clk.h>
> +#include <dt-bindings/reset/mt7986-resets.h>
>
> / {
> interrupt-parent = <&gic>;
> @@ -70,6 +71,11 @@
> reg = <0 0x43000000 0 0x30000>;
> no-map;
> };
> +
> + wmcpu_emi: wmcpu-reserved@4fc00000 {
> + no-map;
> + reg = <0 0x4fc00000 0 0x00100000>;
> + };
> };
>
> timer {
> @@ -261,6 +267,23 @@
> #size-cells = <0>;
> status = "disabled";
> };
> +
> + wifi: wifi@18000000 {
> + compatible = "mediatek,mt7986-wmac";
> + resets = <&watchdog MT7986_TOPRGU_CONSYS_SW_RST>;
> + reset-names = "consys";
> + clocks = <&topckgen CLK_TOP_CONN_MCUSYS_SEL>,
> + <&topckgen CLK_TOP_AP2CNN_HOST_SEL>;
> + clock-names = "mcu", "ap2conn";
> + reg = <0 0x18000000 0 0x1000000>,
> + <0 0x10003000 0 0x1000>,
> + <0 0x11d10000 0 0x1000>;
> + interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
> + memory-region = <&wmcpu_emi>;
> + };
> };
>
> };
> diff --git a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
> index 0f49d5764ff3..3443013b5971 100644
> --- a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
> +++ b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
> @@ -98,3 +98,43 @@
> };
> };
> };
> +
> +&wifi {
> + status = "okay";
> + pinctrl-names = "default", "dbdc";
> + pinctrl-0 = <&wf_2g_5g_pins>;
> + pinctrl-1 = <&wf_dbdc_pins>;
> +};
> +
> +&pio {
> + wf_2g_5g_pins: wf-2g-5g-pins {
> + mux {
> + function = "wifi";
> + groups = "wf_2g", "wf_5g";
> + };
> + conf {
> + pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
> + "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
> + "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
> + "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
> + "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
> + "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
> + "WF1_TOP_CLK", "WF1_TOP_DATA";
> + drive-strength = <4>;
> + };
> + };
> +
> + wf_dbdc_pins: wf-dbdc-pins {
> + mux {
> + function = "wifi";
> + groups = "wf_dbdc";
> + };
> + conf {
> + pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
> + "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
> + "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
> + "WF0_TOP_CLK", "WF0_TOP_DATA";
> + drive-strength = <4>;
> + };
> + };
> +};