2022-09-06 15:16:02

by Sergiu Moga

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Subject: [PATCH v2 09/13] tty: serial: atmel: Define BRSRCCK bitmask of UART IP's Mode Register

Add definitions for the Baud Rate Source Clock bitmask of the
Mode Register of UART IP's and its bitfields.

Signed-off-by: Sergiu Moga <[email protected]>
---



v1 -> v2:
- Nothing, this patch was not here before



drivers/tty/serial/atmel_serial.h | 3 +++
1 file changed, 3 insertions(+)

diff --git a/drivers/tty/serial/atmel_serial.h b/drivers/tty/serial/atmel_serial.h
index 70d0611e56fd..ed64035ba6c3 100644
--- a/drivers/tty/serial/atmel_serial.h
+++ b/drivers/tty/serial/atmel_serial.h
@@ -68,6 +68,9 @@
#define ATMEL_US_NBSTOP_1 (0 << 12)
#define ATMEL_US_NBSTOP_1_5 (1 << 12)
#define ATMEL_US_NBSTOP_2 (2 << 12)
+#define ATMEL_UA_BRSRCCK GENMASK(13, 12) /* Clock Selection for UART */
+#define ATMEL_UA_BRSRCCK_PERIPH_CLK (0 << 12)
+#define ATMEL_UA_BRSRCCK_GCLK (1 << 12)
#define ATMEL_US_CHMODE GENMASK(15, 14) /* Channel Mode */
#define ATMEL_US_CHMODE_NORMAL (0 << 14)
#define ATMEL_US_CHMODE_ECHO (1 << 14)
--
2.25.1


2022-09-07 10:06:36

by Ilpo Järvinen

[permalink] [raw]
Subject: Re: [PATCH v2 09/13] tty: serial: atmel: Define BRSRCCK bitmask of UART IP's Mode Register

On Tue, 6 Sep 2022, Sergiu Moga wrote:

> Add definitions for the Baud Rate Source Clock bitmask of the
> Mode Register of UART IP's and its bitfields.
>
> Signed-off-by: Sergiu Moga <[email protected]>
> ---
>
>
>
> v1 -> v2:
> - Nothing, this patch was not here before
>
>
>
> drivers/tty/serial/atmel_serial.h | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/tty/serial/atmel_serial.h b/drivers/tty/serial/atmel_serial.h
> index 70d0611e56fd..ed64035ba6c3 100644
> --- a/drivers/tty/serial/atmel_serial.h
> +++ b/drivers/tty/serial/atmel_serial.h
> @@ -68,6 +68,9 @@
> #define ATMEL_US_NBSTOP_1 (0 << 12)
> #define ATMEL_US_NBSTOP_1_5 (1 << 12)
> #define ATMEL_US_NBSTOP_2 (2 << 12)
> +#define ATMEL_UA_BRSRCCK GENMASK(13, 12) /* Clock Selection for UART */
> +#define ATMEL_UA_BRSRCCK_PERIPH_CLK (0 << 12)
> +#define ATMEL_UA_BRSRCCK_GCLK (1 << 12)

FIELD_PREP(ATMEL_UA_BRSRCCK, ...)

> #define ATMEL_US_CHMODE GENMASK(15, 14) /* Channel Mode */
> #define ATMEL_US_CHMODE_NORMAL (0 << 14)
> #define ATMEL_US_CHMODE_ECHO (1 << 14)
>

--
i.