2022-09-07 15:22:39

by Alexander Stein

[permalink] [raw]
Subject: [PATCH 4/4] arm64: dts: tqma8mpql: add support for 2nd USB (host) interface

The on-board USB hub has a single reset line which needs to be enabled.

Signed-off-by: Alexander Stein <[email protected]>
---
.../freescale/imx8mp-tqma8mpql-mba8mpxl.dts | 42 +++++++++++++++++++
1 file changed, 42 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts
index 0091430f6154..09c80ffae4b6 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts
@@ -459,11 +459,23 @@ &usb3_0 {
status = "okay";
};

+&usb3_1 {
+ fsl,disable-port-power-control;
+ fsl,permanently-attached;
+ dr_mode = "host";
+ status = "okay";
+};
+
&usb3_phy0 {
vbus-supply = <&reg_vcc_5v0>;
status = "okay";
};

+&usb3_phy1 {
+ vbus-supply = <&reg_vcc_5v0>;
+ status = "okay";
+};
+
&usb_dwc3_0 {
/* dual role is implemented, but not a full featured OTG */
hnp-disable;
@@ -484,6 +496,32 @@ connector {
};
};

+&usb_dwc3_1 {
+ dr_mode = "host";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usbhub>;
+ snps,dis_u3_susphy_quirk;
+ status = "okay";
+
+ hub_2_0: hub@1 {
+ compatible = "usb451,8142";
+ reg = <1>;
+ peer-hub = <&hub_3_0>;
+ reset-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
+ vdd-supply = <&reg_vcc_3v3>;
+ };
+
+ hub_3_0: hub@2 {
+ compatible = "usb451,8140";
+ reg = <2>;
+ peer-hub = <&hub_2_0>;
+ reset-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
+ vdd-supply = <&reg_vcc_3v3>;
+ };
+};
+
&usdhc2 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
@@ -714,6 +752,10 @@ pinctrl_usbcon0: usb0congrp {
fsl,pins = <MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x1c0>;
};

+ pinctrl_usbhub: usbhubgrp {
+ fsl,pins = <MX8MP_IOMUXC_GPIO1_IO11__GPIO1_IO11 0x10>;
+ };
+
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x192>,
<MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d2>,
--
2.25.1