From: Mikko Perttunen <[email protected]>
v2:
* Updated patches 1,3 based on comments
* Added Acked-by to patch 2
Original message:
Hi all,
this series adds support for the HW video decoder, NVDEC,
on Tegra234 (Orin). The main change is a switch from Falcon
to RISC-V for the internal microcontroller, which brings along
a change in how the engine is booted. Otherwise it is backwards
compatible with earlier versions.
In previous iterations, firmware was simply loaded from disk and
written into engine internal memory. Now, the engine has a
bootrom that loads the firmware from a carveout where it has been
loaded by the system bootloader; however, we still need to tell it
where that carveout is loaded and some offsets into it. For that,
the first patch adds a new memory controller API to query the
carveout address. The offsets are read from device tree -- the
expectation is that at flashing time (when the firmware is also
flashed), the flasher also delivers a device tree overlay with
values corresponding to the flashed firmware.
The currently available Linux for Tegra release doesn't yet
include this device tree overlay flashing, and the firmware version
it contains is incompatible with this series. The plan is to fix
that for the next Linux for Tegra release, but if necessary, we
can postpone merging of this series to once those changes are
available.
Thanks!
Mikko
Mikko Perttunen (8):
memory: tegra: Add API for retrieving carveout bounds
dt-bindings: Add headers for NVDEC on Tegra234
dt-bindings: Add bindings for Tegra234 NVDEC
arm64: tegra: Add NVDEC on Tegra234
gpu: host1x: Add stream ID register data for NVDEC on Tegra234
drm/tegra: nvdec: Support multiple clocks
drm/tegra: Add code for booting RISC-V based engines
drm/tegra: Add Tegra234 support to NVDEC driver
.../gpu/host1x/nvidia,tegra234-nvdec.yaml | 154 ++++++++++++++++
arch/arm64/boot/dts/nvidia/tegra234.dtsi | 27 +++
drivers/gpu/drm/tegra/Makefile | 3 +-
drivers/gpu/drm/tegra/drm.c | 1 +
drivers/gpu/drm/tegra/nvdec.c | 171 +++++++++++++++---
drivers/gpu/drm/tegra/riscv.c | 106 +++++++++++
drivers/gpu/drm/tegra/riscv.h | 30 +++
drivers/gpu/host1x/dev.c | 12 ++
drivers/memory/tegra/mc.c | 25 +++
drivers/memory/tegra/tegra234.c | 5 +
include/dt-bindings/clock/tegra234-clock.h | 4 +
include/dt-bindings/memory/tegra234-mc.h | 3 +
.../dt-bindings/power/tegra234-powergate.h | 1 +
include/dt-bindings/reset/tegra234-reset.h | 1 +
include/soc/tegra/mc.h | 11 ++
15 files changed, 528 insertions(+), 26 deletions(-)
create mode 100644 Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra234-nvdec.yaml
create mode 100644 drivers/gpu/drm/tegra/riscv.c
create mode 100644 drivers/gpu/drm/tegra/riscv.h
--
2.37.0
From: Mikko Perttunen <[email protected]>
Add a device tree node for NVDEC on Tegra234.
Booting the firmware requires some information regarding offsets
within the firmware binary. These are passed through the device
tree, but since the values vary depending on the firmware version,
and the firmware itself is not available to the OS, the flasher is
expected to provide a device tree overlay with values corresponding
to the firmware it is flashing. The overlay then replaces the
placeholder values here.
Signed-off-by: Mikko Perttunen <[email protected]>
---
arch/arm64/boot/dts/nvidia/tegra234.dtsi | 27 ++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
index 81a0f599685f..65d49b27bc5f 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
@@ -586,6 +586,33 @@ vic@15340000 {
iommus = <&smmu_niso1 TEGRA234_SID_VIC>;
dma-coherent;
};
+
+ nvdec@15480000 {
+ compatible = "nvidia,tegra234-nvdec";
+ reg = <0x15480000 0x00040000>;
+ clocks = <&bpmp TEGRA234_CLK_NVDEC>,
+ <&bpmp TEGRA234_CLK_FUSE>,
+ <&bpmp TEGRA234_CLK_TSEC_PKA>;
+ clock-names = "nvdec", "fuse", "tsec_pka";
+ resets = <&bpmp TEGRA234_RESET_NVDEC>;
+ reset-names = "nvdec";
+ power-domains = <&bpmp TEGRA234_POWER_DOMAIN_NVDEC>;
+ interconnects = <&mc TEGRA234_MEMORY_CLIENT_NVDECSRD &emc>,
+ <&mc TEGRA234_MEMORY_CLIENT_NVDECSWR &emc>;
+ interconnect-names = "dma-mem", "write";
+ iommus = <&smmu_niso1 TEGRA234_SID_NVDEC>;
+ dma-coherent;
+
+ nvidia,memory-controller = <&mc>;
+
+ /* Placeholder values, to be replaced with values from overlay */
+ nvidia,bl-manifest-offset = <0>;
+ nvidia,bl-data-offset = <0>;
+ nvidia,bl-code-offset = <0>;
+ nvidia,os-manifest-offset = <0>;
+ nvidia,os-data-offset = <0>;
+ nvidia,os-code-offset = <0>;
+ };
};
gpio: gpio@2200000 {
--
2.37.0