The bindings for different LPDDR versions mostly use the same kinds of
properties, so in order to reduce duplication when we're adding support
for more versions, this patch creates a new lpddr-props subschema that
can be referenced by the others to define these common parts. (This will
consider a few smaller I/O width and density numbers "legal" for LPDDR3
that are usually not used there, but this should be harmless.)
Signed-off-by: Julius Werner <[email protected]>
---
.../ddr/jedec,lpddr-props.yaml | 52 +++++++++++++++++++
.../memory-controllers/ddr/jedec,lpddr2.yaml | 40 ++------------
.../memory-controllers/ddr/jedec,lpddr3.yaml | 32 ++----------
3 files changed, 60 insertions(+), 64 deletions(-)
create mode 100644 Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml
Changelog:
- v2:
- removed minItems
- reordered io-width enum from lowest to highest
- moved `$ref` below `mainainers`
- removed part about undeprecating manufacturer-id
- v3:
- no changes
- v4:
- removed quotes from schema $ref strings
diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml
new file mode 100644
index 00000000000000..02700ac3c387ec
--- /dev/null
+++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml
@@ -0,0 +1,52 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr-props.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Common properties for LPDDR types
+
+description:
+ Different LPDDR types generally use the same properties and only differ in the
+ range of legal values for each. This file defines the common parts that can be
+ reused for each type.
+
+maintainers:
+ - Krzysztof Kozlowski <[email protected]>
+
+properties:
+ revision-id:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ description:
+ Revision IDs read from Mode Register 6 and 7. One byte per uint32 cell (i.e. <MR6 MR7>).
+ maxItems: 2
+ items:
+ minimum: 0
+ maximum: 255
+
+ density:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Density in megabits of SDRAM chip. Decoded from Mode Register 8.
+ enum:
+ - 64
+ - 128
+ - 256
+ - 512
+ - 1024
+ - 2048
+ - 4096
+ - 8192
+ - 16384
+ - 32768
+
+ io-width:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ IO bus width in bits of SDRAM chip. Decoded from Mode Register 8.
+ enum:
+ - 8
+ - 16
+ - 32
+
+additionalProperties: true
diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml
index 9d78f140609b6c..e5e15d288d89b2 100644
--- a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml
+++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml
@@ -9,6 +9,9 @@ title: LPDDR2 SDRAM compliant to JEDEC JESD209-2
maintainers:
- Krzysztof Kozlowski <[email protected]>
+allOf:
+ - $ref: jedec,lpddr-props.yaml#
+
properties:
compatible:
oneOf:
@@ -41,41 +44,6 @@ properties:
Property is deprecated, use revision-id instead.
deprecated: true
- revision-id:
- $ref: /schemas/types.yaml#/definitions/uint32-array
- description: |
- Revision IDs read from Mode Register 6 and 7. One byte per uint32 cell (i.e. <MR6 MR7>).
- minItems: 2
- maxItems: 2
- items:
- minimum: 0
- maximum: 255
-
- density:
- $ref: /schemas/types.yaml#/definitions/uint32
- description: |
- Density in megabits of SDRAM chip. Obtained from device datasheet.
- enum:
- - 64
- - 128
- - 256
- - 512
- - 1024
- - 2048
- - 4096
- - 8192
- - 16384
- - 32768
-
- io-width:
- $ref: /schemas/types.yaml#/definitions/uint32
- description: |
- IO bus width in bits of SDRAM chip. Obtained from device datasheet.
- enum:
- - 32
- - 16
- - 8
-
tRRD-min-tck:
$ref: /schemas/types.yaml#/definitions/uint32
maximum: 16
@@ -168,7 +136,7 @@ required:
- density
- io-width
-additionalProperties: false
+unevaluatedProperties: false
examples:
- |
diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml
index 48908a19473c3f..0f7ab51842ae09 100644
--- a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml
+++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml
@@ -9,6 +9,9 @@ title: LPDDR3 SDRAM compliant to JEDEC JESD209-3
maintainers:
- Krzysztof Kozlowski <[email protected]>
+allOf:
+ - $ref: jedec,lpddr-props.yaml#
+
properties:
compatible:
items:
@@ -20,24 +23,6 @@ properties:
const: 1
deprecated: true
- density:
- $ref: /schemas/types.yaml#/definitions/uint32
- description: |
- Density in megabits of SDRAM chip.
- enum:
- - 4096
- - 8192
- - 16384
- - 32768
-
- io-width:
- $ref: /schemas/types.yaml#/definitions/uint32
- description: |
- IO bus width in bits of SDRAM chip.
- enum:
- - 32
- - 16
-
manufacturer-id:
$ref: /schemas/types.yaml#/definitions/uint32
description: |
@@ -45,15 +30,6 @@ properties:
deprecated, manufacturer should be derived from the compatible.
deprecated: true
- revision-id:
- $ref: /schemas/types.yaml#/definitions/uint32-array
- minItems: 2
- maxItems: 2
- items:
- maximum: 255
- description: |
- Revision value of SDRAM chip read from Mode Registers 6 and 7.
-
'#size-cells':
const: 0
deprecated: true
@@ -206,7 +182,7 @@ required:
- density
- io-width
-additionalProperties: false
+unevaluatedProperties: false
examples:
- |
--
2.31.0
This patch allows a new kind of compatible string for LPDDR parts in the
device tree bindings, in addition to the existing hardcoded
<vendor>,<part-number> strings. The new format contains manufacturer and
part (revision) information in numerical form, such as lpddr3-ff,0201
for an LPDDR3 part with manufacturer ID ff and revision ID 0201. This
helps cases where LPDDR parts are probed at runtime by boot firmware and
cannot be matched to hardcoded part numbers, such as the firmware on the
qcom/sc7280-herobrine boards does (which supports 4 different memory
configurations at the moment, and more are expected to be added later at
a point where the boot firmware can no longer be updated to specifically
accomodate them).
Signed-off-by: Julius Werner <[email protected]>
---
.../memory-controllers/ddr/jedec,lpddr-props.yaml | 10 ++++++++++
.../memory-controllers/ddr/jedec,lpddr2.yaml | 8 +++++---
.../memory-controllers/ddr/jedec,lpddr3.yaml | 12 ++++++++----
3 files changed, 23 insertions(+), 7 deletions(-)
Changelog:
- v2
- Updated commit message to describe intended use case as an example
- v3
- no changes
- v4
- no changes
diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml
index 02700ac3c387ec..4114cfa8de67f1 100644
--- a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml
+++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml
@@ -15,6 +15,16 @@ maintainers:
- Krzysztof Kozlowski <[email protected]>
properties:
+ compatible:
+ description:
+ Compatible strings can be either explicit vendor names and part numbers
+ (e.g. elpida,ECB240ABACN), or generated strings of the form
+ lpddrX-YY,ZZZZ where X is the LPDDR version, YY is the manufacturer ID
+ (from MR5) and ZZZZ is the revision ID (from MR6 and MR7). Both IDs are
+ formatted in lower case hexadecimal representation with leading zeroes.
+ The latter form can be useful when LPDDR nodes are created at runtime by
+ boot firmware that doesn't have access to static part number information.
+
revision-id:
$ref: /schemas/types.yaml#/definitions/uint32-array
description:
diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml
index e5e15d288d89b2..a237bc259273bf 100644
--- a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml
+++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml
@@ -20,13 +20,15 @@ properties:
- elpida,ECB240ABACN
- elpida,B8132B2PB-6D-F
- enum:
- - jedec,lpddr2-s4
- - items:
- - enum:
+ - jedec,lpddr2-nvm
- jedec,lpddr2-s2
+ - jedec,lpddr2-s4
- items:
+ - pattern: "^lpddr2-[0-9a-f]{2},[0-9a-f]{4}$"
- enum:
- jedec,lpddr2-nvm
+ - jedec,lpddr2-s2
+ - jedec,lpddr2-s4
revision-id1:
$ref: /schemas/types.yaml#/definitions/uint32
diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml
index 0f7ab51842ae09..e328a1195ba646 100644
--- a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml
+++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml
@@ -14,10 +14,14 @@ allOf:
properties:
compatible:
- items:
- - enum:
- - samsung,K3QF2F20DB
- - const: jedec,lpddr3
+ oneOf:
+ - items:
+ - enum:
+ - samsung,K3QF2F20DB
+ - const: jedec,lpddr3
+ - items:
+ - pattern: "^lpddr3-[0-9a-f]{2},[0-9a-f]{4}$"
+ - const: jedec,lpddr3
'#address-cells':
const: 1
--
2.31.0
This patch adds a new device tree binding for an LPDDR channel to serve
as a top-level organizing node for LPDDR part nodes nested below it. An
LPDDR channel needs to have an "io-width" property to describe its width
(this is important because this width does not always match the io-width
of the part number, indicating that multiple parts are wired in parallel
on the same channel), as well as one or more nested "rank@X" nodes.
Those represent information about the individual ranks of each LPDDR
part connected on that channel and should match the existing
"jedec,lpddrX" bindings for individual LPDDR parts.
New platforms should be using this node -- the existing practice of
providing a raw, toplevel "jedec,lpddrX" node without indication of how
many identical parts are in the system should be considered deprecated.
Signed-off-by: Julius Werner <[email protected]>
---
.../ddr/jedec,lpddr-channel.yaml | 146 ++++++++++++++++++
.../ddr/jedec,lpddr-props.yaml | 10 +-
2 files changed, 155 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-channel.yaml
Changelog:
- v2:
- changed $ref for rank subnode to specifically match LPDDR type in
compatible string
- moved `reg` up to be listed right below `compatible`
- v3:
- no changes
- v4:
- no changes
diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-channel.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-channel.yaml
new file mode 100644
index 00000000000000..34b5bd153f63e0
--- /dev/null
+++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-channel.yaml
@@ -0,0 +1,146 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr-channel.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: LPDDR channel with chip/rank topology description
+
+description:
+ An LPDDR channel is a completely independent set of LPDDR pins (DQ, CA, CS,
+ CK, etc.) that connect one or more LPDDR chips to a host system. The main
+ purpose of this node is to overall LPDDR topology of the system, including the
+ amount of individual LPDDR chips and the ranks per chip.
+
+maintainers:
+ - Julius Werner <[email protected]>
+
+properties:
+ compatible:
+ enum:
+ - jedec,lpddr2-channel
+ - jedec,lpddr3-channel
+ - jedec,lpddr4-channel
+ - jedec,lpddr5-channel
+
+ io-width:
+ description:
+ The number of DQ pins in the channel. If this number is different
+ from (a multiple of) the io-width of the LPDDR chip, that means that
+ multiple instances of that type of chip are wired in parallel on this
+ channel (with the channel's DQ pins split up between the different
+ chips, and the CA, CS, etc. pins of the different chips all shorted
+ together). This means that the total physical memory controlled by a
+ channel is equal to the sum of the densities of each rank on the
+ connected LPDDR chip, times the io-width of the channel divided by
+ the io-width of the LPDDR chip.
+ enum:
+ - 8
+ - 16
+ - 32
+ - 64
+ - 128
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+patternProperties:
+ "^rank@[0-9]+$":
+ type: object
+ description:
+ Each physical LPDDR chip may have one or more ranks. Ranks are
+ internal but fully independent sub-units of the chip. Each LPDDR bus
+ transaction on the channel targets exactly one rank, based on the
+ state of the CS pins. Different ranks may have different densities and
+ timing requirements.
+ required:
+ - reg
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: jedec,lpddr2-channel
+ then:
+ patternProperties:
+ "^rank@[0-9]+$":
+ $ref: /schemas/memory-controllers/ddr/jedec,lpddr2.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: jedec,lpddr3-channel
+ then:
+ patternProperties:
+ "^rank@[0-9]+$":
+ $ref: /schemas/memory-controllers/ddr/jedec,lpddr3.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: jedec,lpddr4-channel
+ then:
+ patternProperties:
+ "^rank@[0-9]+$":
+ $ref: /schemas/memory-controllers/ddr/jedec,lpddr4.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: jedec,lpddr5-channel
+ then:
+ patternProperties:
+ "^rank@[0-9]+$":
+ $ref: /schemas/memory-controllers/ddr/jedec,lpddr5.yaml#
+
+required:
+ - compatible
+ - io-width
+ - "#address-cells"
+ - "#size-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ lpddr-channel0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "jedec,lpddr3-channel";
+ io-width = <32>;
+
+ rank@0 {
+ compatible = "lpddr3-ff,0100", "jedec,lpddr3";
+ reg = <0>;
+ density = <8192>;
+ io-width = <16>;
+ revision-id = <1 0>;
+ };
+ };
+
+ lpddr-channel1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "jedec,lpddr4-channel";
+ io-width = <32>;
+
+ rank@0 {
+ compatible = "lpddr4-05,0301", "jedec,lpddr4";
+ reg = <0>;
+ density = <4096>;
+ io-width = <32>;
+ revision-id = <3 1>;
+ };
+
+ rank@1 {
+ compatible = "lpddr4-05,0301", "jedec,lpddr4";
+ reg = <1>;
+ density = <2048>;
+ io-width = <32>;
+ revision-id = <3 1>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml
index 92ef660888f318..30267ce701249a 100644
--- a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml
+++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml
@@ -9,7 +9,8 @@ title: Common properties for LPDDR types
description:
Different LPDDR types generally use the same properties and only differ in the
range of legal values for each. This file defines the common parts that can be
- reused for each type.
+ reused for each type. Nodes using this schema should generally be nested under
+ an LPDDR channel node.
maintainers:
- Krzysztof Kozlowski <[email protected]>
@@ -25,6 +26,13 @@ properties:
The latter form can be useful when LPDDR nodes are created at runtime by
boot firmware that doesn't have access to static part number information.
+ reg:
+ description:
+ The rank number of this LPDDR rank when used as a subnode to an LPDDR
+ channel.
+ minimum: 0
+ maximum: 3
+
revision-id:
$ref: /schemas/types.yaml#/definitions/uint32-array
description:
--
2.31.0
This patch adds bindings for LPDDR4 and LPDDR5 memory analogous to the
existing bindings for LPDDR2 and LPDDR3. For now, the new types are only
needed for topology description, so other properties like timing
parameters are omitted. They can be added later if needed.
Signed-off-by: Julius Werner <[email protected]>
---
.../ddr/jedec,lpddr-props.yaml | 4 ++
.../memory-controllers/ddr/jedec,lpddr4.yaml | 35 ++++++++++++++
.../memory-controllers/ddr/jedec,lpddr5.yaml | 46 +++++++++++++++++++
3 files changed, 85 insertions(+)
create mode 100644 Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr4.yaml
create mode 100644 Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr5.yaml
Changelog:
- v2
- removed minItems
- moved `$ref` below `maintainers`
- renamed example node from `lpddr4` to `lpddr`
- v3
- removed manufacturer-id property from examples
- v4
- removed quotes from schema $ref strings
diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml
index 4114cfa8de67f1..92ef660888f318 100644
--- a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml
+++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml
@@ -45,9 +45,13 @@ properties:
- 512
- 1024
- 2048
+ - 3072
- 4096
+ - 6144
- 8192
+ - 12288
- 16384
+ - 24576
- 32768
io-width:
diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr4.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr4.yaml
new file mode 100644
index 00000000000000..a078892fecee36
--- /dev/null
+++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr4.yaml
@@ -0,0 +1,35 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr4.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: LPDDR4 SDRAM compliant to JEDEC JESD209-4
+
+maintainers:
+ - Krzysztof Kozlowski <[email protected]>
+
+allOf:
+ - $ref: jedec,lpddr-props.yaml#
+
+properties:
+ compatible:
+ items:
+ - pattern: "^lpddr4-[0-9a-f]{2},[0-9a-f]{4}$"
+ - const: jedec,lpddr4
+
+required:
+ - compatible
+ - density
+ - io-width
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ lpddr {
+ compatible = "lpddr4-ff,0100", "jedec,lpddr4";
+ density = <8192>;
+ io-width = <16>;
+ revision-id = <1 0>;
+ };
diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr5.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr5.yaml
new file mode 100644
index 00000000000000..e441dac5f15445
--- /dev/null
+++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr5.yaml
@@ -0,0 +1,46 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr5.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: LPDDR5 SDRAM compliant to JEDEC JESD209-5
+
+maintainers:
+ - Krzysztof Kozlowski <[email protected]>
+
+allOf:
+ - $ref: jedec,lpddr-props.yaml#
+
+properties:
+ compatible:
+ items:
+ - pattern: "^lpddr5-[0-9a-f]{2},[0-9a-f]{4}$"
+ - const: jedec,lpddr5
+
+ serial-id:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ description:
+ Serial IDs read from Mode Registers 47 through 54. One byte per uint32
+ cell (i.e. <MR47 MR48 MR49 MR50 MR51 MR52 MR53 MR54>).
+ maxItems: 8
+ items:
+ minimum: 0
+ maximum: 255
+
+required:
+ - compatible
+ - density
+ - io-width
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ lpddr {
+ compatible = "lpddr5-01,0200", "jedec,lpddr5";
+ density = <8192>;
+ io-width = <8>;
+ revision-id = <2 0>;
+ serial-id = <3 1 0 0 0 0 0 0>;
+ };
--
2.31.0
On Wed, 14 Sep 2022 17:32:19 -0700, Julius Werner wrote:
> The bindings for different LPDDR versions mostly use the same kinds of
> properties, so in order to reduce duplication when we're adding support
> for more versions, this patch creates a new lpddr-props subschema that
> can be referenced by the others to define these common parts. (This will
> consider a few smaller I/O width and density numbers "legal" for LPDDR3
> that are usually not used there, but this should be harmless.)
>
> Signed-off-by: Julius Werner <[email protected]>
> ---
> .../ddr/jedec,lpddr-props.yaml | 52 +++++++++++++++++++
> .../memory-controllers/ddr/jedec,lpddr2.yaml | 40 ++------------
> .../memory-controllers/ddr/jedec,lpddr3.yaml | 32 ++----------
> 3 files changed, 60 insertions(+), 64 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml
>
> Changelog:
>
> - v2:
> - removed minItems
> - reordered io-width enum from lowest to highest
> - moved `$ref` below `mainainers`
> - removed part about undeprecating manufacturer-id
> - v3:
> - no changes
> - v4:
> - removed quotes from schema $ref strings
>
Please add Acked-by/Reviewed-by tags when posting new versions. However,
there's no need to repost patches *only* to add the tags. The upstream
maintainer will do that for acks received on the version they apply.
If a tag was not added on purpose, please state why and what changed.
On Wed, 14 Sep 2022 17:32:20 -0700, Julius Werner wrote:
> This patch allows a new kind of compatible string for LPDDR parts in the
> device tree bindings, in addition to the existing hardcoded
> <vendor>,<part-number> strings. The new format contains manufacturer and
> part (revision) information in numerical form, such as lpddr3-ff,0201
> for an LPDDR3 part with manufacturer ID ff and revision ID 0201. This
> helps cases where LPDDR parts are probed at runtime by boot firmware and
> cannot be matched to hardcoded part numbers, such as the firmware on the
> qcom/sc7280-herobrine boards does (which supports 4 different memory
> configurations at the moment, and more are expected to be added later at
> a point where the boot firmware can no longer be updated to specifically
> accomodate them).
>
> Signed-off-by: Julius Werner <[email protected]>
> ---
> .../memory-controllers/ddr/jedec,lpddr-props.yaml | 10 ++++++++++
> .../memory-controllers/ddr/jedec,lpddr2.yaml | 8 +++++---
> .../memory-controllers/ddr/jedec,lpddr3.yaml | 12 ++++++++----
> 3 files changed, 23 insertions(+), 7 deletions(-)
>
> Changelog:
>
> - v2
> - Updated commit message to describe intended use case as an example
> - v3
> - no changes
> - v4
> - no changes
>
Please add Acked-by/Reviewed-by tags when posting new versions. However,
there's no need to repost patches *only* to add the tags. The upstream
maintainer will do that for acks received on the version they apply.
If a tag was not added on purpose, please state why and what changed.
On Wed, 14 Sep 2022 17:32:21 -0700, Julius Werner wrote:
> This patch adds bindings for LPDDR4 and LPDDR5 memory analogous to the
> existing bindings for LPDDR2 and LPDDR3. For now, the new types are only
> needed for topology description, so other properties like timing
> parameters are omitted. They can be added later if needed.
>
> Signed-off-by: Julius Werner <[email protected]>
> ---
> .../ddr/jedec,lpddr-props.yaml | 4 ++
> .../memory-controllers/ddr/jedec,lpddr4.yaml | 35 ++++++++++++++
> .../memory-controllers/ddr/jedec,lpddr5.yaml | 46 +++++++++++++++++++
> 3 files changed, 85 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr4.yaml
> create mode 100644 Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr5.yaml
>
> Changelog:
>
> - v2
> - removed minItems
> - moved `$ref` below `maintainers`
> - renamed example node from `lpddr4` to `lpddr`
> - v3
> - removed manufacturer-id property from examples
> - v4
> - removed quotes from schema $ref strings
>
Reviewed-by: Rob Herring <[email protected]>
Hi Krzysztof,
Just wanted to quickly check on the status of this patch series, are
you good to take this or do you need anything more from me / is
anything still contentious? Do you want me to send a v5 with Rob's
Acked-by/Reviewed-by tags (apologies for not gathering those up
earlier)?
On 30/09/2022 03:00, Julius Werner wrote:
> Hi Krzysztof,
>
> Just wanted to quickly check on the status of this patch series, are
> you good to take this or do you need anything more from me / is
> anything still contentious? Do you want me to send a v5 with Rob's
> Acked-by/Reviewed-by tags (apologies for not gathering those up
> earlier)?
You got some comments from Rob, so I was expecting a new version.
Best regards,
Krzysztof