2022-09-20 06:15:25

by Mehta, Piyush

[permalink] [raw]
Subject: [PATCH V3 0/2] usb: dwc3: core: Enable GUCTL1 bit 10 for fixing crc error after resume

This patch of the series does the following:
- Add a new DT "snps,resume-hs-terminations" quirk
- Enable GUCTL1 bit 10 for fixing crc error after resume bug
- When this bit is set to '1', the ULPI opmode will be changed to 'normal'
along with HS terminations, and term/xcvr select signals after EOR.
This option is to support certain legacy ULPI PHYs.
---
Changes in V3:
- Addressed Krzysztof Kozlowski review comments:
- Switch to amd.com with amd SoB and ownership.
- Added Krzysztof Ack for DT patch
Link: https://lore.kernel.org/all/[email protected]/

Changes in V2:
- Addressed Krzysztof Kozlowski review comments:
- Update the quirk name and No underscores in properties.
- Modified the quirk description.
Link: https://lore.kernel.org/all/[email protected]/
---
Piyush Mehta (2):
dt-bindings: usb: snps,dwc3: Add 'snps,resume-hs-terminations' quirk
usb: dwc3: core: Enable GUCTL1 bit 10 for fixing termination error
after resume bug

.../devicetree/bindings/usb/snps,dwc3.yaml | 7 +++++++
drivers/usb/dwc3/core.c | 17 +++++++++++++++++
drivers/usb/dwc3/core.h | 4 ++++
3 files changed, 28 insertions(+)

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2.25.1