Hi,
Changes since v2
================
1. ipq6018-cp01-c1: do not switch to blsp1 (Robert).
2. pinctrl: qcom,ipq6018: correct BLSP6->BLSP0 functions: new patch.
3. Drop quotes from $ref when not needed (Rob).
4. Add Rb tags. Few patches from v1 got review from Rob, but I changed them in
v2 significantly, so I did not keep these Rb tags.
Changes since v1
================
v1: https://lore.kernel.org/linux-devicetree/[email protected]/T/#t
1. As Stephan suggested, move check for function on non-GPIO pins to common
TLMM schema. This affects few commits in the set named:
"use common TLMM schema"
"do not require function on non-GPIOs"
Overview
========
This is the third, independent patchset around Qualcomm pinctrl in recent days:
1. First round of TLMM fixes: merged
2. LPASS fixes:
https://lore.kernel.org/linux-devicetree/[email protected]/T/#t
3. ARMv7 TLMM fixes: *THIS PATCHSET*
4. ARMv8 remaining TLMM fixes: v1 send:
https://lore.kernel.org/linux-devicetree/[email protected]/T/#t
Dependencies
============
1. No dependencies.
2. dt-bindings are independent of DTS patches.
Best regards,
Krzysztof
Krzysztof Kozlowski (34):
arm64: dts: qcom: ipq6018-cp01-c1: use BLSPI1 pins
arm64: dts: qcom: ipq6018: align TLMM pin configuration with DT schema
ARM: dts: qcom: sdx55: add gpio-ranges to TLMM pinctrl
ARM: dts: qcom: sdx55: align TLMM pin configuration with DT schema
ARM: dts: qcom: msm8226: align TLMM pin configuration with DT schema
ARM: dts: qcom: msm8974: align TLMM pin configuration with DT schema
dt-bindings: pinctrl: qcom,tlmm-common: add common check for function
dt-bindings: pinctrl: qcom,ipq6018: add qpic_pad function
dt-bindings: pinctrl: qcom,ipq6018: correct BLSP6->BLSP0 functions
dt-bindings: pinctrl: qcom,ipq6018: increase number of pins in pinmux
dt-bindings: pinctrl: qcom,ipq6018: fix matching pin config
dt-bindings: pinctrl: qcom,ipq6018: use common TLMM schema
dt-bindings: pinctrl: qcom,ipq6018: fix indentation in example
dt-bindings: pinctrl: qcom,msm8226: fix matching pin config
dt-bindings: pinctrl: qcom,msm8226: use common TLMM schema
dt-bindings: pinctrl: qcom,msm8226: add functions and input-enable
dt-bindings: pinctrl: qcom,msm8226: fix indentation in example
dt-bindings: pinctrl: qcom,msm8909-tlmm: fix matching pin config
dt-bindings: pinctrl: qcom,msm8909-tlmm: do not require function on
non-GPIOs
dt-bindings: pinctrl: qcom,msm8909-tlmm: fix indentation in example
dt-bindings: pinctrl: qcom,msm8953: fix matching pin config
dt-bindings: pinctrl: qcom,msm8953: use common TLMM schema
dt-bindings: pinctrl: qcom,msm8953: fix indentation in example
dt-bindings: pinctrl: qcom,mdm9607: do not require function on
non-GPIOs
dt-bindings: pinctrl: qcom,mdm9607: fix indentation in example
dt-bindings: pinctrl: qcom,qcm2290: fix matching pin config
dt-bindings: pinctrl: qcom,qcm2290: use common TLMM schema
dt-bindings: pinctrl: qcom,sdx55: fix matching pin config
dt-bindings: pinctrl: qcom,sdx55: use common TLMM schema
dt-bindings: pinctrl: qcom,sdx55: fix indentation in example
dt-bindings: pinctrl: qcom,sdx65: fix matching pin config
dt-bindings: pinctrl: qcom,sdx65: use common TLMM schema
dt-bindings: pinctrl: qcom,sc7280: fix matching pin config
dt-bindings: pinctrl: qcom,sc8280xp: fix indentation in example
(remaining piece)
.../pinctrl/qcom,ipq6018-pinctrl.yaml | 66 ++++++++++---------
.../pinctrl/qcom,mdm9607-pinctrl.yaml | 23 ++++---
.../pinctrl/qcom,msm8226-pinctrl.yaml | 63 ++++++++++--------
.../bindings/pinctrl/qcom,msm8909-tlmm.yaml | 64 +++++++++---------
.../pinctrl/qcom,msm8953-pinctrl.yaml | 51 +++++++-------
.../pinctrl/qcom,qcm2290-pinctrl.yaml | 11 ++--
.../bindings/pinctrl/qcom,sc7280-pinctrl.yaml | 14 +++-
.../pinctrl/qcom,sc8280xp-pinctrl.yaml | 4 +-
.../bindings/pinctrl/qcom,sdx55-pinctrl.yaml | 51 +++++++-------
.../bindings/pinctrl/qcom,sdx65-pinctrl.yaml | 12 ++--
.../bindings/pinctrl/qcom,tlmm-common.yaml | 20 ++++--
arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts | 6 +-
arch/arm/boot/dts/qcom-msm8226.dtsi | 24 +++----
.../qcom-msm8974-lge-nexus5-hammerhead.dts | 30 ++++-----
.../boot/dts/qcom-sdx55-telit-fn980-tlb.dts | 45 +++++--------
arch/arm/boot/dts/qcom-sdx55.dtsi | 1 +
arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 6 +-
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 4 +-
18 files changed, 266 insertions(+), 229 deletions(-)
--
2.34.1
Certain pins, like SDcard related, do not have functions and such should
not be required.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
---
v1 was reviewed by Rob, but patch was changed since that time, so not
adding Rob's tag.
---
.../devicetree/bindings/pinctrl/qcom,mdm9607-pinctrl.yaml | 1 -
1 file changed, 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,mdm9607-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,mdm9607-pinctrl.yaml
index f7bd4be1739e..57a4fed55de7 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,mdm9607-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,mdm9607-pinctrl.yaml
@@ -115,7 +115,6 @@ patternProperties:
required:
- pins
- - function
additionalProperties: false
--
2.34.1
Bindings example should be indented with 4-spaces.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
---
.../bindings/pinctrl/qcom,sdx55-pinctrl.yaml | 34 +++++++++----------
1 file changed, 17 insertions(+), 17 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml
index 498f2f87217f..afe60b1c6d89 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml
@@ -142,23 +142,23 @@ additionalProperties: false
examples:
- |
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- tlmm: pinctrl@1f00000 {
- compatible = "qcom,sdx55-pinctrl";
- reg = <0x0f100000 0x300000>;
- gpio-controller;
- #gpio-cells = <2>;
- gpio-ranges = <&tlmm 0 0 108>;
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>;
-
- serial-state {
- pins = "gpio8", "gpio9";
- function = "blsp_uart3";
- drive-strength = <8>;
- bias-disable;
- };
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ tlmm: pinctrl@1f00000 {
+ compatible = "qcom,sdx55-pinctrl";
+ reg = <0x0f100000 0x300000>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&tlmm 0 0 108>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>;
+
+ serial-state {
+ pins = "gpio8", "gpio9";
+ function = "blsp_uart3";
+ drive-strength = <8>;
+ bias-disable;
};
+ };
...
--
2.34.1
The TLMM pin controller follows generic pin-controller bindings, so
should have subnodes with '-state' and '-pins'. Otherwise the subnodes
(level one and two) are not properly matched. This method also unifies
the bindings with other Qualcomm TLMM and LPASS pinctrl bindings.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
---
.../devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml
index cdfcf29dffee..0f796f1f0104 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml
@@ -49,8 +49,10 @@ patternProperties:
oneOf:
- $ref: "#/$defs/qcom-sdx65-tlmm-state"
- patternProperties:
- ".*":
+ "-pins$":
$ref: "#/$defs/qcom-sdx65-tlmm-state"
+ additionalProperties: false
+
'$defs':
qcom-sdx65-tlmm-state:
type: object
@@ -175,13 +177,13 @@ examples:
};
uart-w-subnodes-state {
- rx {
+ rx-pins {
pins = "gpio4";
function = "blsp_uart1";
bias-pull-up;
};
- tx {
+ tx-pins {
pins = "gpio5";
function = "blsp_uart1";
bias-disable;
--
2.34.1
Bindings example should be indented with 4-spaces.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
---
.../pinctrl/qcom,msm8226-pinctrl.yaml | 36 +++++++++----------
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml
index 9c2dbc1e31fe..ecee354715f2 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml
@@ -119,22 +119,22 @@ additionalProperties: false
examples:
- |
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- msmgpio: pinctrl@fd510000 {
- compatible = "qcom,msm8226-pinctrl";
- reg = <0xfd510000 0x4000>;
-
- gpio-controller;
- #gpio-cells = <2>;
- gpio-ranges = <&msmgpio 0 0 117>;
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
-
- serial-state {
- pins = "gpio8", "gpio9";
- function = "blsp_uart3";
- drive-strength = <8>;
- bias-disable;
- };
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ msmgpio: pinctrl@fd510000 {
+ compatible = "qcom,msm8226-pinctrl";
+ reg = <0xfd510000 0x4000>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&msmgpio 0 0 117>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
+
+ serial-state {
+ pins = "gpio8", "gpio9";
+ function = "blsp_uart3";
+ drive-strength = <8>;
+ bias-disable;
};
+ };
--
2.34.1
Reference common Qualcomm TLMM pin controller schema, to bring other
regular schemas and additional checks, like function required only for
GPIOs.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
---
v1 was reviewed by Rob, but patch was changed since that time, so not
adding Rob's tag.
---
.../devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml
index 0f796f1f0104..f5451b1a3a2f 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml
@@ -142,10 +142,12 @@ patternProperties:
required:
- pins
- - function
additionalProperties: false
+allOf:
+ - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
+
required:
- compatible
- reg
--
2.34.1
The MSM8226 pinctrl driver supports input-enable, blsp_i2c4, blsp_uart4
and sdc3 functions and DTS already uses it:
qcom-msm8226-samsung-s3ve3g.dtb: pinctrl@fd510000: 'blsp1-i2c1', 'blsp1-i2c2', 'blsp1-i2c3', 'blsp1-i2c4', 'blsp1-i2c5' ...
qcom-apq8026-lg-lenok.dtb: pinctrl@fd510000: touch-state: 'oneOf' conditional failed, one must be fixed:
'input-enable' does not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
---
.../bindings/pinctrl/qcom,msm8226-pinctrl.yaml | 10 ++++------
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml
index a64e2dbb0972..9c2dbc1e31fe 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml
@@ -79,9 +79,10 @@ $defs:
Specify the alternative function to be configured for the specified
pins. Functions are only valid for gpio pins.
enum: [ gpio, cci_i2c0, blsp_uim1, blsp_uim2, blsp_uim3, blsp_uim5,
- blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c5, blsp_spi1,
+ blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c4, blsp_i2c5, blsp_spi1,
blsp_spi2, blsp_spi3, blsp_spi5, blsp_uart1, blsp_uart2,
- blsp_uart3, blsp_uart5, cam_mclk0, cam_mclk1, wlan ]
+ blsp_uart3, blsp_uart4, blsp_uart5, cam_mclk0, cam_mclk1, sdc3,
+ wlan ]
drive-strength:
enum: [2, 4, 6, 8, 10, 12, 14, 16]
@@ -90,13 +91,10 @@ $defs:
Selects the drive strength for the specified pins, in mA.
bias-pull-down: true
-
bias-pull-up: true
-
bias-disable: true
-
+ input-enable: true
output-high: true
-
output-low: true
required:
--
2.34.1
The TLMM pin controller follows generic pin-controller bindings, so
should have subnodes with '-state' and '-pins'. Otherwise the subnodes
(level one and two) are not properly matched. This method also unifies
the bindings with other Qualcomm TLMM and LPASS pinctrl bindings.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
---
.../bindings/pinctrl/qcom,sc7280-pinctrl.yaml | 14 +++++++++++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml
index ad3496784678..4606ca980dc4 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml
@@ -47,9 +47,17 @@ properties:
wakeup-parent: true
-#PIN CONFIGURATION NODES
patternProperties:
- '-pins$':
+ "-state$":
+ oneOf:
+ - $ref: "#/$defs/qcom-sc7280-tlmm-state"
+ - patternProperties:
+ "-pins$":
+ $ref: "#/$defs/qcom-sc7280-tlmm-state"
+ additionalProperties: false
+
+$defs:
+ qcom-sc7280-tlmm-state:
type: object
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
@@ -162,7 +170,7 @@ examples:
gpio-ranges = <&tlmm 0 0 175>;
wakeup-parent = <&pdc>;
- qup_uart5_default: qup-uart5-pins {
+ qup_uart5_default: qup-uart5-state {
pins = "gpio46", "gpio47";
function = "qup13";
drive-strength = <2>;
--
2.34.1
The IPQ6018 pinctrl driver supports qpic_pad and DTS already uses it:
'qpic_pad' is not one of ['adsp_ext', 'alsp_int', 'atest_bbrx0', ...
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
---
.../devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml
index 9c6e2cb0c6a5..0bd1aded132d 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml
@@ -92,9 +92,9 @@ patternProperties:
qdss_ctitrig_in_b0, qdss_ctitrig_in_b1, qdss_ctitrig_out_a0,
qdss_ctitrig_out_a1, qdss_ctitrig_out_b0, qdss_ctitrig_out_b1,
qdss_traceclk_a, qdss_traceclk_b, qdss_tracectl_a, qdss_tracectl_b,
- qdss_tracedata_a, qdss_tracedata_b, reset_n, sd_card, sd_write,
- sec_mi2s, smb_int, ssbi_wtr0, ssbi_wtr1, uim1, uim2, uim3,
- uim_batt, wcss_bt, wcss_fm, wcss_wlan, webcam1_rst ]
+ qdss_tracedata_a, qdss_tracedata_b, qpic_pad, reset_n, sd_card,
+ sd_write, sec_mi2s, smb_int, ssbi_wtr0, ssbi_wtr1, uim1, uim2,
+ uim3, uim_batt, wcss_bt, wcss_fm, wcss_wlan, webcam1_rst ]
drive-strength:
enum: [2, 4, 6, 8, 10, 12, 14, 16]
--
2.34.1
Bindings example should be indented with 4-spaces. Previous adjustment
missefd one spot.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
---
.../devicetree/bindings/pinctrl/qcom,sc8280xp-pinctrl.yaml | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-pinctrl.yaml
index b9ab130cd558..0b251caaebf2 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-pinctrl.yaml
@@ -139,8 +139,8 @@ examples:
gpio-ranges = <&tlmm 0 0 230>;
gpio-wo-subnode-state {
- pins = "gpio1";
- function = "gpio";
+ pins = "gpio1";
+ function = "gpio";
};
uart-w-subnodes-state {
--
2.34.1
The TLMM pin controller follows generic pin-controller bindings, so
should have subnodes with '-state' and '-pins'. Otherwise the subnodes
(level one and two) are not properly matched. This method also unifies
the bindings with other Qualcomm TLMM and LPASS pinctrl bindings.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
---
.../devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml
index e03530091478..b1735918fa90 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml
@@ -43,8 +43,9 @@ patternProperties:
oneOf:
- $ref: "#/$defs/qcom-msm8909-tlmm-state"
- patternProperties:
- ".*":
+ "-pins$":
$ref: "#/$defs/qcom-msm8909-tlmm-state"
+ additionalProperties: false
$defs:
qcom-msm8909-tlmm-state:
@@ -136,13 +137,13 @@ examples:
};
uart-w-subnodes-state {
- rx {
+ rx-pins {
pins = "gpio4";
function = "blsp_uart1";
bias-pull-up;
};
- tx {
+ tx-pins {
pins = "gpio5";
function = "blsp_uart1";
bias-disable;
--
2.34.1
The TLMM pin controller follows generic pin-controller bindings, so
should have subnodes with '-state' and '-pins'. Otherwise the subnodes
(level one and two) are not properly matched. This method also unifies
the bindings with other Qualcomm TLMM and LPASS pinctrl bindings.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
---
.../bindings/pinctrl/qcom,msm8953-pinctrl.yaml | 14 +++++++++++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml
index d4da558cde54..c162796ab604 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml
@@ -44,9 +44,17 @@ properties:
gpio-ranges:
maxItems: 1
-#PIN CONFIGURATION NODES
patternProperties:
- '-pins$':
+ "-state$":
+ oneOf:
+ - $ref: "#/$defs/qcom-msm8953-tlmm-state"
+ - patternProperties:
+ "-pins$":
+ $ref: "#/$defs/qcom-msm8953-tlmm-state"
+ additionalProperties: false
+
+$defs:
+ qcom-msm8953-tlmm-state:
type: object
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
@@ -163,7 +171,7 @@ examples:
#gpio-cells = <2>;
gpio-ranges = <&tlmm 0 0 142>;
- serial_default: serial-pins {
+ serial_default: serial-state {
pins = "gpio4", "gpio5";
function = "blsp_uart2";
drive-strength = <2>;
--
2.34.1
When BLSPI1 (originally SPI0, later renamed in commit f82c48d46852
("arm64: dts: qcom: ipq6018: correct QUP peripheral labels")) was added,
the device node lacked respective pin configuration assignment.
Fixes: 5bf635621245 ("arm64: dts: ipq6018: Add a few device nodes")
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
---
Changes since v2:
1. Do not switch to blsp1 (Robert)
---
arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
index 1ba2eca33c7b..6a716c83e5f1 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
+++ b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
@@ -37,6 +37,8 @@ &blsp1_i2c3 {
&blsp1_spi1 {
cs-select = <0>;
+ pinctrl-0 = <&spi_0_pins>;
+ pinctrl-names = "default";
status = "okay";
flash@0 {
--
2.34.1
The TLMM pin controller follows generic pin-controller bindings, so
should have subnodes with '-state' and '-pins'. Otherwise the subnodes
(level one and two) are not properly matched.
qcom-sdx55-telit-fn980-tlb.dtb: pinctrl@f100000: 'pcie_ep_clkreq_default', 'pcie_ep_perst_default', 'pcie_ep_wake_default' do not match any of the regexes: '-pins$', 'pinctrl-[0-9]+'
This method also unifies the bindings with other Qualcomm TLMM and LPASS
pinctrl bindings.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
---
.../bindings/pinctrl/qcom,sdx55-pinctrl.yaml | 14 +++++++++++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml
index a38090b14aab..fff57abf4fbc 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml
@@ -45,9 +45,17 @@ properties:
gpio-reserved-ranges:
maxItems: 1
-#PIN CONFIGURATION NODES
patternProperties:
- '-pins$':
+ "-state$":
+ oneOf:
+ - $ref: "#/$defs/qcom-sdx55-tlmm-state"
+ - patternProperties:
+ "-pins$":
+ $ref: "#/$defs/qcom-sdx55-tlmm-state"
+ additionalProperties: false
+
+$defs:
+ qcom-sdx55-tlmm-state:
type: object
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
@@ -146,7 +154,7 @@ examples:
#interrupt-cells = <2>;
interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>;
- serial-pins {
+ serial-state {
pins = "gpio8", "gpio9";
function = "blsp_uart3";
drive-strength = <8>;
--
2.34.1
The pin controller driver has BLSP functions from 0 to 5, not 1 to 6.
Add missing blsp0_i2c, blsp0_spi (already used in ipq6018-cp01-c1) and
blsp0_uart. Drop blsp6_i2c and blsp6_spi.
This fixes dtbs_check warning:
ipq6018-cp01-c1.dtb: pinctrl@1000000: spi-0-state: 'oneOf' conditional failed, one must be fixed:
'bias-pull-down', 'drive-strength', 'function', 'pins' do not match any of the regexes: '-pins$', 'pinctrl-[0-9]+'
'blsp0_spi' is not one of ['adsp_ext', 'alsp_int', .....
Signed-off-by: Krzysztof Kozlowski <[email protected]>
---
Changes since v2:
1. New patch
---
.../devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml
index 0bd1aded132d..76698cd97e8c 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml
@@ -72,12 +72,12 @@ patternProperties:
enum: [ adsp_ext, alsp_int, atest_bbrx0, atest_bbrx1, atest_char,
atest_char0, atest_char1, atest_char2, atest_char3, atest_combodac,
atest_gpsadc0, atest_gpsadc1, atest_tsens, atest_wlan0,
- atest_wlan1, backlight_en, bimc_dte0, bimc_dte1, blsp1_i2c,
- blsp2_i2c, blsp3_i2c, blsp4_i2c, blsp5_i2c, blsp6_i2c, blsp1_spi,
+ atest_wlan1, backlight_en, bimc_dte0, bimc_dte1, blsp0_i2c, blsp1_i2c,
+ blsp2_i2c, blsp3_i2c, blsp4_i2c, blsp5_i2c, blsp0_spi, blsp1_spi,
blsp1_spi_cs1, blsp1_spi_cs2, blsp1_spi_cs3, blsp2_spi,
blsp2_spi_cs1, blsp2_spi_cs2, blsp2_spi_cs3, blsp3_spi,
blsp3_spi_cs1, blsp3_spi_cs2, blsp3_spi_cs3, blsp4_spi, blsp5_spi,
- blsp6_spi, blsp1_uart, blsp2_uart, blsp1_uim, blsp2_uim, cam1_rst,
+ blsp0_uart, blsp1_uart, blsp2_uart, blsp1_uim, blsp2_uim, cam1_rst,
cam1_standby, cam_mclk0, cam_mclk1, cci_async, cci_i2c, cci_timer0,
cci_timer1, cci_timer2, cdc_pdm0, codec_mad, dbg_out, display_5v,
dmic0_clk, dmic0_data, dsi_rst, ebi0_wrcdc, euro_us, ext_lpass,
--
2.34.1
Bindings example should be indented with 4-spaces.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
---
.../pinctrl/qcom,msm8953-pinctrl.yaml | 34 +++++++++----------
1 file changed, 17 insertions(+), 17 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml
index 1bf29b82f486..6d97ea421633 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml
@@ -159,21 +159,21 @@ additionalProperties: false
examples:
- |
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- tlmm: pinctrl@1000000 {
- compatible = "qcom,msm8953-pinctrl";
- reg = <0x01000000 0x300000>;
- interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-controller;
- #interrupt-cells = <2>;
- gpio-controller;
- #gpio-cells = <2>;
- gpio-ranges = <&tlmm 0 0 142>;
-
- serial_default: serial-state {
- pins = "gpio4", "gpio5";
- function = "blsp_uart2";
- drive-strength = <2>;
- bias-disable;
- };
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ tlmm: pinctrl@1000000 {
+ compatible = "qcom,msm8953-pinctrl";
+ reg = <0x01000000 0x300000>;
+ interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&tlmm 0 0 142>;
+
+ serial_default: serial-state {
+ pins = "gpio4", "gpio5";
+ function = "blsp_uart2";
+ drive-strength = <2>;
+ bias-disable;
};
+ };
--
2.34.1
Bindings example should be indented with 4-spaces.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
---
.../pinctrl/qcom,mdm9607-pinctrl.yaml | 22 +++++++++----------
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,mdm9607-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,mdm9607-pinctrl.yaml
index 57a4fed55de7..a37b358715a3 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,mdm9607-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,mdm9607-pinctrl.yaml
@@ -120,14 +120,14 @@ patternProperties:
examples:
- |
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- tlmm: pinctrl@1000000 {
- compatible = "qcom,mdm9607-tlmm";
- reg = <0x01000000 0x300000>;
- interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- gpio-ranges = <&msmgpio 0 0 80>;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ tlmm: pinctrl@1000000 {
+ compatible = "qcom,mdm9607-tlmm";
+ reg = <0x01000000 0x300000>;
+ interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ gpio-ranges = <&msmgpio 0 0 80>;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
--
2.34.1
Reference common Qualcomm TLMM pin controller schema, to bring other
regular schemas and additional checks, like function required only for
GPIOs.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
---
v1 was reviewed by Rob, but patch was changed since that time, so not
adding Rob's tag.
---
.../devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml
index ecb90c77f666..a64e2dbb0972 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml
@@ -60,7 +60,7 @@ $defs:
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
- $ref: "/schemas/pinctrl/pincfg-node.yaml"
+ $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
properties:
pins:
@@ -101,12 +101,11 @@ $defs:
required:
- pins
- - function
additionalProperties: false
allOf:
- - $ref: "pinctrl.yaml#"
+ - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
required:
- compatible
--
2.34.1
On Tue, 27 Sep 2022 19:36:46 +0200, Krzysztof Kozlowski wrote:
> The TLMM pin controller follows generic pin-controller bindings, so
> should have subnodes with '-state' and '-pins'. Otherwise the subnodes
> (level one and two) are not properly matched. This method also unifies
> the bindings with other Qualcomm TLMM and LPASS pinctrl bindings.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> Reviewed-by: Bjorn Andersson <[email protected]>
> ---
> .../devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
Reviewed-by: Rob Herring <[email protected]>
On Tue, 27 Sep 2022 19:36:45 +0200, Krzysztof Kozlowski wrote:
> Bindings example should be indented with 4-spaces.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> Reviewed-by: Bjorn Andersson <[email protected]>
> ---
> .../pinctrl/qcom,msm8226-pinctrl.yaml | 36 +++++++++----------
> 1 file changed, 18 insertions(+), 18 deletions(-)
>
Reviewed-by: Rob Herring <[email protected]>
On Tue, 27 Sep 2022 19:36:52 +0200, Krzysztof Kozlowski wrote:
> Certain pins, like SDcard related, do not have functions and such should
> not be required.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> Reviewed-by: Bjorn Andersson <[email protected]>
>
> ---
>
> v1 was reviewed by Rob, but patch was changed since that time, so not
> adding Rob's tag.
> ---
> .../devicetree/bindings/pinctrl/qcom,mdm9607-pinctrl.yaml | 1 -
> 1 file changed, 1 deletion(-)
>
Reviewed-by: Rob Herring <[email protected]>
On Tue, 27 Sep 2022 19:36:53 +0200, Krzysztof Kozlowski wrote:
> Bindings example should be indented with 4-spaces.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> Reviewed-by: Bjorn Andersson <[email protected]>
> ---
> .../pinctrl/qcom,mdm9607-pinctrl.yaml | 22 +++++++++----------
> 1 file changed, 11 insertions(+), 11 deletions(-)
>
Reviewed-by: Rob Herring <[email protected]>
On Tue, 27 Sep 2022 19:36:58 +0200, Krzysztof Kozlowski wrote:
> Bindings example should be indented with 4-spaces.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> Reviewed-by: Bjorn Andersson <[email protected]>
> ---
> .../bindings/pinctrl/qcom,sdx55-pinctrl.yaml | 34 +++++++++----------
> 1 file changed, 17 insertions(+), 17 deletions(-)
>
Reviewed-by: Rob Herring <[email protected]>
On Tue, 27 Sep 2022 19:37:02 +0200, Krzysztof Kozlowski wrote:
> Bindings example should be indented with 4-spaces. Previous adjustment
> missefd one spot.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> Reviewed-by: Bjorn Andersson <[email protected]>
> ---
> .../devicetree/bindings/pinctrl/qcom,sc8280xp-pinctrl.yaml | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
Reviewed-by: Rob Herring <[email protected]>
On Tue, 27 Sep 2022 19:37:00 +0200, Krzysztof Kozlowski wrote:
> Reference common Qualcomm TLMM pin controller schema, to bring other
> regular schemas and additional checks, like function required only for
> GPIOs.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> Reviewed-by: Bjorn Andersson <[email protected]>
>
> ---
>
> v1 was reviewed by Rob, but patch was changed since that time, so not
> adding Rob's tag.
> ---
> .../devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
Reviewed-by: Rob Herring <[email protected]>
On Tue, 27 Sep 2022 19:37:01 +0200, Krzysztof Kozlowski wrote:
> The TLMM pin controller follows generic pin-controller bindings, so
> should have subnodes with '-state' and '-pins'. Otherwise the subnodes
> (level one and two) are not properly matched. This method also unifies
> the bindings with other Qualcomm TLMM and LPASS pinctrl bindings.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> Reviewed-by: Bjorn Andersson <[email protected]>
> ---
> .../bindings/pinctrl/qcom,sc7280-pinctrl.yaml | 14 +++++++++++---
> 1 file changed, 11 insertions(+), 3 deletions(-)
>
Reviewed-by: Rob Herring <[email protected]>
On Tue, 27 Sep 2022 19:36:43 +0200, Krzysztof Kozlowski wrote:
> Reference common Qualcomm TLMM pin controller schema, to bring other
> regular schemas and additional checks, like function required only for
> GPIOs.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> Reviewed-by: Bjorn Andersson <[email protected]>
>
> ---
>
> v1 was reviewed by Rob, but patch was changed since that time, so not
> adding Rob's tag.
> ---
> .../devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
Reviewed-by: Rob Herring <[email protected]>
On Tue, 27 Sep 2022 19:36:36 +0200, Krzysztof Kozlowski wrote:
> The IPQ6018 pinctrl driver supports qpic_pad and DTS already uses it:
>
> 'qpic_pad' is not one of ['adsp_ext', 'alsp_int', 'atest_bbrx0', ...
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> Reviewed-by: Bjorn Andersson <[email protected]>
> ---
> .../devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
Reviewed-by: Rob Herring <[email protected]>
On Tue, 27 Sep 2022 19:36:37 +0200, Krzysztof Kozlowski wrote:
> The pin controller driver has BLSP functions from 0 to 5, not 1 to 6.
> Add missing blsp0_i2c, blsp0_spi (already used in ipq6018-cp01-c1) and
> blsp0_uart. Drop blsp6_i2c and blsp6_spi.
>
> This fixes dtbs_check warning:
>
> ipq6018-cp01-c1.dtb: pinctrl@1000000: spi-0-state: 'oneOf' conditional failed, one must be fixed:
> 'bias-pull-down', 'drive-strength', 'function', 'pins' do not match any of the regexes: '-pins$', 'pinctrl-[0-9]+'
> 'blsp0_spi' is not one of ['adsp_ext', 'alsp_int', .....
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
>
> ---
>
> Changes since v2:
> 1. New patch
> ---
> .../devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
Reviewed-by: Rob Herring <[email protected]>
On Tue, 27 Sep 2022 19:36:49 +0200, Krzysztof Kozlowski wrote:
> The TLMM pin controller follows generic pin-controller bindings, so
> should have subnodes with '-state' and '-pins'. Otherwise the subnodes
> (level one and two) are not properly matched. This method also unifies
> the bindings with other Qualcomm TLMM and LPASS pinctrl bindings.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> Reviewed-by: Bjorn Andersson <[email protected]>
> ---
> .../bindings/pinctrl/qcom,msm8953-pinctrl.yaml | 14 +++++++++++---
> 1 file changed, 11 insertions(+), 3 deletions(-)
>
Reviewed-by: Rob Herring <[email protected]>
On Tue, 27 Sep 2022 19:36:56 +0200, Krzysztof Kozlowski wrote:
> The TLMM pin controller follows generic pin-controller bindings, so
> should have subnodes with '-state' and '-pins'. Otherwise the subnodes
> (level one and two) are not properly matched.
>
> qcom-sdx55-telit-fn980-tlb.dtb: pinctrl@f100000: 'pcie_ep_clkreq_default', 'pcie_ep_perst_default', 'pcie_ep_wake_default' do not match any of the regexes: '-pins$', 'pinctrl-[0-9]+'
>
> This method also unifies the bindings with other Qualcomm TLMM and LPASS
> pinctrl bindings.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> Reviewed-by: Bjorn Andersson <[email protected]>
> ---
> .../bindings/pinctrl/qcom,sdx55-pinctrl.yaml | 14 +++++++++++---
> 1 file changed, 11 insertions(+), 3 deletions(-)
>
Reviewed-by: Rob Herring <[email protected]>
On Tue, 27 Sep 2022 19:36:44 +0200, Krzysztof Kozlowski wrote:
> The MSM8226 pinctrl driver supports input-enable, blsp_i2c4, blsp_uart4
> and sdc3 functions and DTS already uses it:
>
> qcom-msm8226-samsung-s3ve3g.dtb: pinctrl@fd510000: 'blsp1-i2c1', 'blsp1-i2c2', 'blsp1-i2c3', 'blsp1-i2c4', 'blsp1-i2c5' ...
> qcom-apq8026-lg-lenok.dtb: pinctrl@fd510000: touch-state: 'oneOf' conditional failed, one must be fixed:
> 'input-enable' does not match any of the regexes: 'pinctrl-[0-9]+'
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> Reviewed-by: Bjorn Andersson <[email protected]>
> ---
> .../bindings/pinctrl/qcom,msm8226-pinctrl.yaml | 10 ++++------
> 1 file changed, 4 insertions(+), 6 deletions(-)
>
Reviewed-by: Rob Herring <[email protected]>
On Tue, 27 Sep 2022 19:36:51 +0200, Krzysztof Kozlowski wrote:
> Bindings example should be indented with 4-spaces.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> Reviewed-by: Bjorn Andersson <[email protected]>
> ---
> .../pinctrl/qcom,msm8953-pinctrl.yaml | 34 +++++++++----------
> 1 file changed, 17 insertions(+), 17 deletions(-)
>
Reviewed-by: Rob Herring <[email protected]>
On Tue, 27 Sep 2022 19:36:59 +0200, Krzysztof Kozlowski wrote:
> The TLMM pin controller follows generic pin-controller bindings, so
> should have subnodes with '-state' and '-pins'. Otherwise the subnodes
> (level one and two) are not properly matched. This method also unifies
> the bindings with other Qualcomm TLMM and LPASS pinctrl bindings.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> Reviewed-by: Bjorn Andersson <[email protected]>
> ---
> .../devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
Reviewed-by: Rob Herring <[email protected]>
On Tue, Sep 27, 2022 at 07:36:46PM +0200, Krzysztof Kozlowski wrote:
> The TLMM pin controller follows generic pin-controller bindings, so
> should have subnodes with '-state' and '-pins'. Otherwise the subnodes
> (level one and two) are not properly matched. This method also unifies
> the bindings with other Qualcomm TLMM and LPASS pinctrl bindings.
>
> Signed-off-by: Krzysztof Kozlowski <[email protected]>
> Reviewed-by: Bjorn Andersson <[email protected]>
Reviewed-by: Stephan Gerhold <[email protected]>
> ---
> .../devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml
> index e03530091478..b1735918fa90 100644
> --- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml
> +++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml
> @@ -43,8 +43,9 @@ patternProperties:
> oneOf:
> - $ref: "#/$defs/qcom-msm8909-tlmm-state"
> - patternProperties:
> - ".*":
> + "-pins$":
> $ref: "#/$defs/qcom-msm8909-tlmm-state"
> + additionalProperties: false
>
> $defs:
> qcom-msm8909-tlmm-state:
> @@ -136,13 +137,13 @@ examples:
> };
>
> uart-w-subnodes-state {
> - rx {
> + rx-pins {
> pins = "gpio4";
> function = "blsp_uart1";
> bias-pull-up;
> };
>
> - tx {
> + tx-pins {
> pins = "gpio5";
> function = "blsp_uart1";
> bias-disable;
> --
> 2.34.1
>
On Tue, 27 Sep 2022 19:36:28 +0200, Krzysztof Kozlowski wrote:
> Changes since v2
> ================
> 1. ipq6018-cp01-c1: do not switch to blsp1 (Robert).
> 2. pinctrl: qcom,ipq6018: correct BLSP6->BLSP0 functions: new patch.
> 3. Drop quotes from $ref when not needed (Rob).
> 4. Add Rb tags. Few patches from v1 got review from Rob, but I changed them in
> v2 significantly, so I did not keep these Rb tags.
>
> [...]
Applied, thanks!
[03/34] ARM: dts: qcom: sdx55: add gpio-ranges to TLMM pinctrl
commit: 0139f183bcddcf5b36f805254bb0f0625963f783
[04/34] ARM: dts: qcom: sdx55: align TLMM pin configuration with DT schema
commit: bda79af488a3e75769433fb961800c39bb07b29c
[05/34] ARM: dts: qcom: msm8226: align TLMM pin configuration with DT schema
commit: df9c86025510c45a6d90669347129e8000e1bbbc
[06/34] ARM: dts: qcom: msm8974: align TLMM pin configuration with DT schema
commit: 6cd72414abc7345e277fcab5e1c763c3a017dc6a
Best regards,
--
Bjorn Andersson <[email protected]>