From: Yuval Shaia <[email protected]>
AC5 requieres different handling for MSI as with armada8k.
Fix it by:
1. Enabling the relevant bits in init phase
2. Dispatch virtual IRQ handlers when MSI interrupts are received
Also enable/disable PCIE_APP_LTSSM for AC5.
Signed-off-by: Yuval Shaia <[email protected]>
Signed-off-by: Vadym Kochan <[email protected]>
---
drivers/pci/controller/dwc/pcie-armada8k.c | 28 ++++++++++++++++++++--
1 file changed, 26 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-armada8k.c b/drivers/pci/controller/dwc/pcie-armada8k.c
index b025d23bb058..c2a285e33e90 100644
--- a/drivers/pci/controller/dwc/pcie-armada8k.c
+++ b/drivers/pci/controller/dwc/pcie-armada8k.c
@@ -45,6 +45,7 @@ struct armada8k_pcie {
#define PCIE_GLOBAL_CONTROL_REG (PCIE_VENDOR_REGS_OFFSET + 0x0)
#define PCIE_APP_LTSSM_EN BIT(2)
+#define PCIE_APP_LTSSM_EN_AC5 BIT(24)
#define PCIE_DEVICE_TYPE_SHIFT 4
#define PCIE_DEVICE_TYPE_MASK 0xF
#define PCIE_DEVICE_TYPE_RC 0x4 /* Root complex */
@@ -64,6 +65,7 @@ struct armada8k_pcie {
#define PCIE_INT_B_ASSERT_MASK_AC5 BIT(13)
#define PCIE_INT_C_ASSERT_MASK_AC5 BIT(14)
#define PCIE_INT_D_ASSERT_MASK_AC5 BIT(15)
+#define PCIE_MSI_MASK_AC5 BIT(11)
#define PCIE_ARCACHE_TRC_REG (PCIE_VENDOR_REGS_OFFSET + 0x50)
#define PCIE_AWCACHE_TRC_REG (PCIE_VENDOR_REGS_OFFSET + 0x54)
@@ -167,16 +169,30 @@ static int armada8k_pcie_link_up(struct dw_pcie *pci)
static int armada8k_pcie_start_link(struct dw_pcie *pci)
{
+ struct armada8k_pcie *pcie = to_armada8k_pcie(pci);
u32 reg;
/* Start LTSSM */
reg = dw_pcie_readl_dbi(pci, PCIE_GLOBAL_CONTROL_REG);
- reg |= PCIE_APP_LTSSM_EN;
+ if (pcie->pcie_type == MVPCIE_TYPE_AC5)
+ reg |= PCIE_APP_LTSSM_EN_AC5;
+ else
+ reg |= PCIE_APP_LTSSM_EN;
dw_pcie_writel_dbi(pci, PCIE_GLOBAL_CONTROL_REG, reg);
return 0;
}
+void ac5_pcie_msi_init(struct dw_pcie *pci)
+{
+ u32 val;
+
+ /* Set MSI bit in interrupt mask */
+ val = dw_pcie_readl_dbi(pci, PCIE_GLOBAL_INT_MASK1_REG);
+ val |= PCIE_MSI_MASK_AC5;
+ dw_pcie_writel_dbi(pci, PCIE_GLOBAL_INT_MASK1_REG, val);
+}
+
static int armada8k_pcie_host_init(struct dw_pcie_rp *pp)
{
u32 reg;
@@ -186,7 +202,10 @@ static int armada8k_pcie_host_init(struct dw_pcie_rp *pp)
if (!dw_pcie_link_up(pci)) {
/* Disable LTSSM state machine to enable configuration */
reg = dw_pcie_readl_dbi(pci, PCIE_GLOBAL_CONTROL_REG);
- reg &= ~(PCIE_APP_LTSSM_EN);
+ if (pcie->pcie_type == MVPCIE_TYPE_AC5)
+ reg &= ~(PCIE_APP_LTSSM_EN_AC5);
+ else
+ reg &= ~(PCIE_APP_LTSSM_EN);
dw_pcie_writel_dbi(pci, PCIE_GLOBAL_CONTROL_REG, reg);
}
@@ -226,6 +245,9 @@ static int armada8k_pcie_host_init(struct dw_pcie_rp *pp)
dw_pcie_writel_dbi(pci, PCIE_GLOBAL_INT_MASK1_REG, reg);
}
+ if (IS_ENABLED(CONFIG_PCI_MSI) && (pcie->pcie_type == MVPCIE_TYPE_AC5))
+ ac5_pcie_msi_init(pci);
+
return 0;
}
@@ -242,6 +264,8 @@ static irqreturn_t armada8k_pcie_irq_handler(int irq, void *arg)
*/
val = dw_pcie_readl_dbi(pci, PCIE_GLOBAL_INT_CAUSE1_REG);
dw_pcie_writel_dbi(pci, PCIE_GLOBAL_INT_CAUSE1_REG, val);
+ if ((PCIE_MSI_MASK_AC5 & val) && (pcie->pcie_type == MVPCIE_TYPE_AC5))
+ dw_handle_msi_irq(&pci->pp);
return IRQ_HANDLED;
}
--
2.17.1
Hi Vadym,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on helgaas-pci/next]
[also build test WARNING on linus/master v6.0 next-20221006]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Vadym-Kochan/PCI-armada8k-Add-support-for-AC5-SoC/20221006-191418
base: https://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git next
config: ia64-allyesconfig
compiler: ia64-linux-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/51a4773d6d4e6ac65e7ab09f2be643ce6927ce20
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Vadym-Kochan/PCI-armada8k-Add-support-for-AC5-SoC/20221006-191418
git checkout 51a4773d6d4e6ac65e7ab09f2be643ce6927ce20
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=ia64 SHELL=/bin/bash drivers/pci/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <[email protected]>
All warnings (new ones prefixed by >>):
>> drivers/pci/controller/dwc/pcie-armada8k.c:186:6: warning: no previous prototype for 'ac5_pcie_msi_init' [-Wmissing-prototypes]
186 | void ac5_pcie_msi_init(struct dw_pcie *pci)
| ^~~~~~~~~~~~~~~~~
drivers/pci/controller/dwc/pcie-armada8k.c:346:33: warning: 'dw_pcie_ops' defined but not used [-Wunused-const-variable=]
346 | static const struct dw_pcie_ops dw_pcie_ops = {
| ^~~~~~~~~~~
{standard input}: Assembler messages:
{standard input}:451: Error: Register number out of range 0..3
{standard input}:452: Error: Register number out of range 0..3
{standard input}:452: Warning: Use of 'mov' violates WAW dependency 'GR%, % in 1 - 127' (impliedf), specific resource number is 39
{standard input}:452: Warning: Only the first path encountering the conflict is reported
{standard input}:451: Warning: This is the location of the conflicting usage
{standard input}:453: Error: Register number out of range 0..3
{standard input}:453: Warning: Use of 'mov' violates WAW dependency 'GR%, % in 1 - 127' (impliedf), specific resource number is 39
{standard input}:453: Warning: Only the first path encountering the conflict is reported
{standard input}:451: Warning: This is the location of the conflicting usage
{standard input}:453: Warning: Use of 'mov' violates WAW dependency 'GR%, % in 1 - 127' (impliedf), specific resource number is 39
{standard input}:453: Warning: Only the first path encountering the conflict is reported
{standard input}:452: Warning: This is the location of the conflicting usage
{standard input}:457: Error: Register number out of range 0..3
{standard input}:1193: Error: Register number out of range 0..6
vim +/ac5_pcie_msi_init +186 drivers/pci/controller/dwc/pcie-armada8k.c
185
> 186 void ac5_pcie_msi_init(struct dw_pcie *pci)
187 {
188 u32 val;
189
190 /* Set MSI bit in interrupt mask */
191 val = dw_pcie_readl_dbi(pci, PCIE_GLOBAL_INT_MASK1_REG);
192 val |= PCIE_MSI_MASK_AC5;
193 dw_pcie_writel_dbi(pci, PCIE_GLOBAL_INT_MASK1_REG, val);
194 }
195
--
0-DAY CI Kernel Test Service
https://01.org/lkp
On Thu, Oct 06, 2022 at 02:11:10PM +0300, Vadym Kochan wrote:
> From: Yuval Shaia <[email protected]>
>
> AC5 requieres different handling for MSI as with armada8k.
> Fix it by:
> 1. Enabling the relevant bits in init phase
> 2. Dispatch virtual IRQ handlers when MSI interrupts are received
s/requieres/requires/