This series is a preparatory cleanup of the jz4740-i2s driver before
adding support for a new SoC. The two improvements are lifting
unnecessary restrictions on sample rates and formats -- the existing
ones appear to be derived from the limitations of the JZ4740's internal
codec and don't reflect the actual capabilities of the I2S controller.
I'm unable to test the series on any JZ47xx SoCs, but I have tested
on an X1000 (which is the SoC I'll be adding in a followup series).
Changes in v6:
* Added Cc: stable for flush bits fix.
Changes in v5:
* Drop 'mem' resource removal patch already upstream.
* Update FIFO flush bits fix to address Paul's review comments.
* Drop PLL clock name patch, that needs a different approach.
Link for v4: https://lore.kernel.org/alsa-devel/[email protected]/
Aidan MacDonald (9):
ASoC: jz4740-i2s: Handle independent FIFO flush bits
ASoC: jz4740-i2s: Convert to regmap API
ASoC: jz4740-i2s: Simplify using regmap fields
ASoC: jz4740-i2s: Use FIELD_PREP() macros in hw_params callback
ASoC: jz4740-i2s: Align macro values and sort includes
ASoC: jz4740-i2s: Support S20_LE and S24_LE sample formats
ASoC: jz4740-i2s: Support continuous sample rate
ASoC: jz4740-i2s: Move component functions near the component driver
ASoC: jz4740-i2s: Refactor DAI probe/remove ops as component ops
sound/soc/jz4740/Kconfig | 1 +
sound/soc/jz4740/jz4740-i2s.c | 455 ++++++++++++++++++----------------
2 files changed, 243 insertions(+), 213 deletions(-)
--
2.38.1
On the JZ4740, there is a single bit that flushes (empties) both
the transmit and receive FIFO. Later SoCs have independent flush
bits for each FIFO.
Independent FIFOs can be flushed before the snd_soc_dai_active()
check because it won't disturb other active streams. This ensures
that the FIFO we're about to use is always flushed before starting
up. With shared FIFOs we can't do that because if another substream
is active, flushing its FIFO would cause underrun errors.
This also fixes a bug: since we were only setting the JZ4740's
flush bit, which corresponds to the TX FIFO flush bit on other
SoCs, other SoCs were not having their RX FIFO flushed at all.
Fixes: 967beb2e8777 ("ASoC: jz4740: Add jz4780 support")
Reviewed-by: Paul Cercueil <[email protected]>
Cc: [email protected]
Signed-off-by: Aidan MacDonald <[email protected]>
---
v5 -> v6: Cc'd stable.
sound/soc/jz4740/jz4740-i2s.c | 39 ++++++++++++++++++++++++++++++-----
1 file changed, 34 insertions(+), 5 deletions(-)
diff --git a/sound/soc/jz4740/jz4740-i2s.c b/sound/soc/jz4740/jz4740-i2s.c
index c4c1e89b47c1..83cb81999c6f 100644
--- a/sound/soc/jz4740/jz4740-i2s.c
+++ b/sound/soc/jz4740/jz4740-i2s.c
@@ -55,7 +55,8 @@
#define JZ_AIC_CTRL_MONO_TO_STEREO BIT(11)
#define JZ_AIC_CTRL_SWITCH_ENDIANNESS BIT(10)
#define JZ_AIC_CTRL_SIGNED_TO_UNSIGNED BIT(9)
-#define JZ_AIC_CTRL_FLUSH BIT(8)
+#define JZ_AIC_CTRL_TFLUSH BIT(8)
+#define JZ_AIC_CTRL_RFLUSH BIT(7)
#define JZ_AIC_CTRL_ENABLE_ROR_INT BIT(6)
#define JZ_AIC_CTRL_ENABLE_TUR_INT BIT(5)
#define JZ_AIC_CTRL_ENABLE_RFS_INT BIT(4)
@@ -90,6 +91,8 @@ enum jz47xx_i2s_version {
struct i2s_soc_info {
enum jz47xx_i2s_version version;
struct snd_soc_dai_driver *dai;
+
+ bool shared_fifo_flush;
};
struct jz4740_i2s {
@@ -116,19 +119,44 @@ static inline void jz4740_i2s_write(const struct jz4740_i2s *i2s,
writel(value, i2s->base + reg);
}
+static inline void jz4740_i2s_set_bits(const struct jz4740_i2s *i2s,
+ unsigned int reg, uint32_t bits)
+{
+ uint32_t value = jz4740_i2s_read(i2s, reg);
+ value |= bits;
+ jz4740_i2s_write(i2s, reg, value);
+}
+
static int jz4740_i2s_startup(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
struct jz4740_i2s *i2s = snd_soc_dai_get_drvdata(dai);
- uint32_t conf, ctrl;
+ uint32_t conf;
int ret;
+ /*
+ * When we can flush FIFOs independently, only flush the FIFO
+ * that is starting up. We can do this when the DAI is active
+ * because it does not disturb other active substreams.
+ */
+ if (!i2s->soc_info->shared_fifo_flush) {
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ jz4740_i2s_set_bits(i2s, JZ_REG_AIC_CTRL, JZ_AIC_CTRL_TFLUSH);
+ else
+ jz4740_i2s_set_bits(i2s, JZ_REG_AIC_CTRL, JZ_AIC_CTRL_RFLUSH);
+ }
+
if (snd_soc_dai_active(dai))
return 0;
- ctrl = jz4740_i2s_read(i2s, JZ_REG_AIC_CTRL);
- ctrl |= JZ_AIC_CTRL_FLUSH;
- jz4740_i2s_write(i2s, JZ_REG_AIC_CTRL, ctrl);
+ /*
+ * When there is a shared flush bit for both FIFOs, the TFLUSH
+ * bit flushes both FIFOs. Flushing while the DAI is active would
+ * cause FIFO underruns in other active substreams so we have to
+ * guard this behind the snd_soc_dai_active() check.
+ */
+ if (i2s->soc_info->shared_fifo_flush)
+ jz4740_i2s_set_bits(i2s, JZ_REG_AIC_CTRL, JZ_AIC_CTRL_TFLUSH);
ret = clk_prepare_enable(i2s->clk_i2s);
if (ret)
@@ -443,6 +471,7 @@ static struct snd_soc_dai_driver jz4740_i2s_dai = {
static const struct i2s_soc_info jz4740_i2s_soc_info = {
.version = JZ_I2S_JZ4740,
.dai = &jz4740_i2s_dai,
+ .shared_fifo_flush = true,
};
static const struct i2s_soc_info jz4760_i2s_soc_info = {
--
2.38.1
The I2S controller on JZ47xx SoCs doesn't impose restrictions on
sample rate and the driver doesn't make any assumptions about it,
so the DAI should advertise a continuous sample rate range.
Acked-by: Paul Cercueil <[email protected]>
Signed-off-by: Aidan MacDonald <[email protected]>
---
sound/soc/jz4740/jz4740-i2s.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/sound/soc/jz4740/jz4740-i2s.c b/sound/soc/jz4740/jz4740-i2s.c
index fd35a8a51f60..201368f828ff 100644
--- a/sound/soc/jz4740/jz4740-i2s.c
+++ b/sound/soc/jz4740/jz4740-i2s.c
@@ -390,13 +390,13 @@ static struct snd_soc_dai_driver jz4740_i2s_dai = {
.playback = {
.channels_min = 1,
.channels_max = 2,
- .rates = SNDRV_PCM_RATE_8000_48000,
+ .rates = SNDRV_PCM_RATE_CONTINUOUS,
.formats = JZ4740_I2S_FMTS,
},
.capture = {
.channels_min = 2,
.channels_max = 2,
- .rates = SNDRV_PCM_RATE_8000_48000,
+ .rates = SNDRV_PCM_RATE_CONTINUOUS,
.formats = JZ4740_I2S_FMTS,
},
.symmetric_rate = 1,
@@ -426,13 +426,13 @@ static struct snd_soc_dai_driver jz4770_i2s_dai = {
.playback = {
.channels_min = 1,
.channels_max = 2,
- .rates = SNDRV_PCM_RATE_8000_48000,
+ .rates = SNDRV_PCM_RATE_CONTINUOUS,
.formats = JZ4740_I2S_FMTS,
},
.capture = {
.channels_min = 2,
.channels_max = 2,
- .rates = SNDRV_PCM_RATE_8000_48000,
+ .rates = SNDRV_PCM_RATE_CONTINUOUS,
.formats = JZ4740_I2S_FMTS,
},
.ops = &jz4740_i2s_dai_ops,
--
2.38.1
The differences between register fields on different SoC versions
can be abstracted away using the regmap field API. This is easier
to understand and extend than comparisons based on the version ID.
Since the version IDs are unused after this change, remove them at
the same time, and remove unused macros.
Reviewed-by: Paul Cercueil <[email protected]>
Signed-off-by: Aidan MacDonald <[email protected]>
---
sound/soc/jz4740/jz4740-i2s.c | 135 +++++++++++++++++++---------------
1 file changed, 77 insertions(+), 58 deletions(-)
diff --git a/sound/soc/jz4740/jz4740-i2s.c b/sound/soc/jz4740/jz4740-i2s.c
index f3c0d7c0415e..b0bbcd025241 100644
--- a/sound/soc/jz4740/jz4740-i2s.c
+++ b/sound/soc/jz4740/jz4740-i2s.c
@@ -34,8 +34,6 @@
#define JZ_REG_AIC_CLK_DIV 0x30
#define JZ_REG_AIC_FIFO 0x34
-#define JZ_AIC_CONF_FIFO_RX_THRESHOLD_MASK (0xf << 12)
-#define JZ_AIC_CONF_FIFO_TX_THRESHOLD_MASK (0xf << 8)
#define JZ_AIC_CONF_OVERFLOW_PLAY_LAST BIT(6)
#define JZ_AIC_CONF_INTERNAL_CODEC BIT(5)
#define JZ_AIC_CONF_I2S BIT(4)
@@ -44,11 +42,6 @@
#define JZ_AIC_CONF_SYNC_CLK_MASTER BIT(1)
#define JZ_AIC_CONF_ENABLE BIT(0)
-#define JZ_AIC_CONF_FIFO_RX_THRESHOLD_OFFSET 12
-#define JZ_AIC_CONF_FIFO_TX_THRESHOLD_OFFSET 8
-#define JZ4760_AIC_CONF_FIFO_RX_THRESHOLD_OFFSET 24
-#define JZ4760_AIC_CONF_FIFO_TX_THRESHOLD_OFFSET 16
-
#define JZ_AIC_CTRL_OUTPUT_SAMPLE_SIZE_MASK (0x7 << 19)
#define JZ_AIC_CTRL_INPUT_SAMPLE_SIZE_MASK (0x7 << 16)
#define JZ_AIC_CTRL_ENABLE_RX_DMA BIT(15)
@@ -76,29 +69,25 @@
#define JZ_AIC_I2S_STATUS_BUSY BIT(2)
-#define JZ_AIC_CLK_DIV_MASK 0xf
-#define I2SDIV_DV_SHIFT 0
-#define I2SDIV_DV_MASK (0xf << I2SDIV_DV_SHIFT)
-#define I2SDIV_IDV_SHIFT 8
-#define I2SDIV_IDV_MASK (0xf << I2SDIV_IDV_SHIFT)
-
-enum jz47xx_i2s_version {
- JZ_I2S_JZ4740,
- JZ_I2S_JZ4760,
- JZ_I2S_JZ4770,
- JZ_I2S_JZ4780,
-};
-
struct i2s_soc_info {
- enum jz47xx_i2s_version version;
struct snd_soc_dai_driver *dai;
+ struct reg_field field_rx_fifo_thresh;
+ struct reg_field field_tx_fifo_thresh;
+ struct reg_field field_i2sdiv_capture;
+ struct reg_field field_i2sdiv_playback;
+
bool shared_fifo_flush;
};
struct jz4740_i2s {
struct regmap *regmap;
+ struct regmap_field *field_rx_fifo_thresh;
+ struct regmap_field *field_tx_fifo_thresh;
+ struct regmap_field *field_i2sdiv_capture;
+ struct regmap_field *field_i2sdiv_playback;
+
struct clk *clk_aic;
struct clk *clk_i2s;
@@ -239,12 +228,12 @@ static int jz4740_i2s_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
{
struct jz4740_i2s *i2s = snd_soc_dai_get_drvdata(dai);
+ struct regmap_field *div_field;
unsigned int sample_size;
- uint32_t ctrl, div_reg;
+ uint32_t ctrl;
int div;
regmap_read(i2s->regmap, JZ_REG_AIC_CTRL, &ctrl);
- regmap_read(i2s->regmap, JZ_REG_AIC_CLK_DIV, &div_reg);
div = clk_get_rate(i2s->clk_i2s) / (64 * params_rate(params));
@@ -267,23 +256,16 @@ static int jz4740_i2s_hw_params(struct snd_pcm_substream *substream,
else
ctrl &= ~JZ_AIC_CTRL_MONO_TO_STEREO;
- div_reg &= ~I2SDIV_DV_MASK;
- div_reg |= (div - 1) << I2SDIV_DV_SHIFT;
+ div_field = i2s->field_i2sdiv_playback;
} else {
ctrl &= ~JZ_AIC_CTRL_INPUT_SAMPLE_SIZE_MASK;
ctrl |= sample_size << JZ_AIC_CTRL_INPUT_SAMPLE_SIZE_OFFSET;
- if (i2s->soc_info->version >= JZ_I2S_JZ4770) {
- div_reg &= ~I2SDIV_IDV_MASK;
- div_reg |= (div - 1) << I2SDIV_IDV_SHIFT;
- } else {
- div_reg &= ~I2SDIV_DV_MASK;
- div_reg |= (div - 1) << I2SDIV_DV_SHIFT;
- }
+ div_field = i2s->field_i2sdiv_capture;
}
regmap_write(i2s->regmap, JZ_REG_AIC_CTRL, ctrl);
- regmap_write(i2s->regmap, JZ_REG_AIC_CLK_DIV, div_reg);
+ regmap_field_write(div_field, div - 1);
return 0;
}
@@ -356,7 +338,6 @@ static int jz4740_i2s_resume(struct snd_soc_component *component)
static int jz4740_i2s_dai_probe(struct snd_soc_dai *dai)
{
struct jz4740_i2s *i2s = snd_soc_dai_get_drvdata(dai);
- uint32_t conf;
int ret;
ret = clk_prepare_enable(i2s->clk_aic);
@@ -366,22 +347,14 @@ static int jz4740_i2s_dai_probe(struct snd_soc_dai *dai)
snd_soc_dai_init_dma_data(dai, &i2s->playback_dma_data,
&i2s->capture_dma_data);
- if (i2s->soc_info->version >= JZ_I2S_JZ4760) {
- conf = (7 << JZ4760_AIC_CONF_FIFO_RX_THRESHOLD_OFFSET) |
- (8 << JZ4760_AIC_CONF_FIFO_TX_THRESHOLD_OFFSET) |
- JZ_AIC_CONF_OVERFLOW_PLAY_LAST |
- JZ_AIC_CONF_I2S |
- JZ_AIC_CONF_INTERNAL_CODEC;
- } else {
- conf = (7 << JZ_AIC_CONF_FIFO_RX_THRESHOLD_OFFSET) |
- (8 << JZ_AIC_CONF_FIFO_TX_THRESHOLD_OFFSET) |
- JZ_AIC_CONF_OVERFLOW_PLAY_LAST |
- JZ_AIC_CONF_I2S |
- JZ_AIC_CONF_INTERNAL_CODEC;
- }
-
regmap_write(i2s->regmap, JZ_REG_AIC_CONF, JZ_AIC_CONF_RESET);
- regmap_write(i2s->regmap, JZ_REG_AIC_CONF, conf);
+
+ regmap_write(i2s->regmap, JZ_REG_AIC_CONF,
+ JZ_AIC_CONF_OVERFLOW_PLAY_LAST |
+ JZ_AIC_CONF_I2S | JZ_AIC_CONF_INTERNAL_CODEC);
+
+ regmap_field_write(i2s->field_rx_fifo_thresh, 7);
+ regmap_field_write(i2s->field_tx_fifo_thresh, 8);
return 0;
}
@@ -426,14 +399,20 @@ static struct snd_soc_dai_driver jz4740_i2s_dai = {
};
static const struct i2s_soc_info jz4740_i2s_soc_info = {
- .version = JZ_I2S_JZ4740,
- .dai = &jz4740_i2s_dai,
- .shared_fifo_flush = true,
+ .dai = &jz4740_i2s_dai,
+ .field_rx_fifo_thresh = REG_FIELD(JZ_REG_AIC_CONF, 12, 15),
+ .field_tx_fifo_thresh = REG_FIELD(JZ_REG_AIC_CONF, 8, 11),
+ .field_i2sdiv_capture = REG_FIELD(JZ_REG_AIC_CLK_DIV, 0, 3),
+ .field_i2sdiv_playback = REG_FIELD(JZ_REG_AIC_CLK_DIV, 0, 3),
+ .shared_fifo_flush = true,
};
static const struct i2s_soc_info jz4760_i2s_soc_info = {
- .version = JZ_I2S_JZ4760,
- .dai = &jz4740_i2s_dai,
+ .dai = &jz4740_i2s_dai,
+ .field_rx_fifo_thresh = REG_FIELD(JZ_REG_AIC_CONF, 24, 27),
+ .field_tx_fifo_thresh = REG_FIELD(JZ_REG_AIC_CONF, 16, 20),
+ .field_i2sdiv_capture = REG_FIELD(JZ_REG_AIC_CLK_DIV, 0, 3),
+ .field_i2sdiv_playback = REG_FIELD(JZ_REG_AIC_CLK_DIV, 0, 3),
};
static struct snd_soc_dai_driver jz4770_i2s_dai = {
@@ -455,13 +434,19 @@ static struct snd_soc_dai_driver jz4770_i2s_dai = {
};
static const struct i2s_soc_info jz4770_i2s_soc_info = {
- .version = JZ_I2S_JZ4770,
- .dai = &jz4770_i2s_dai,
+ .dai = &jz4770_i2s_dai,
+ .field_rx_fifo_thresh = REG_FIELD(JZ_REG_AIC_CONF, 24, 27),
+ .field_tx_fifo_thresh = REG_FIELD(JZ_REG_AIC_CONF, 16, 20),
+ .field_i2sdiv_capture = REG_FIELD(JZ_REG_AIC_CLK_DIV, 8, 11),
+ .field_i2sdiv_playback = REG_FIELD(JZ_REG_AIC_CLK_DIV, 0, 3),
};
static const struct i2s_soc_info jz4780_i2s_soc_info = {
- .version = JZ_I2S_JZ4780,
- .dai = &jz4770_i2s_dai,
+ .dai = &jz4770_i2s_dai,
+ .field_rx_fifo_thresh = REG_FIELD(JZ_REG_AIC_CONF, 24, 27),
+ .field_tx_fifo_thresh = REG_FIELD(JZ_REG_AIC_CONF, 16, 20),
+ .field_i2sdiv_capture = REG_FIELD(JZ_REG_AIC_CLK_DIV, 8, 11),
+ .field_i2sdiv_playback = REG_FIELD(JZ_REG_AIC_CLK_DIV, 0, 3),
};
static const struct snd_soc_component_driver jz4740_i2s_component = {
@@ -480,6 +465,36 @@ static const struct of_device_id jz4740_of_matches[] = {
};
MODULE_DEVICE_TABLE(of, jz4740_of_matches);
+static int jz4740_i2s_init_regmap_fields(struct device *dev,
+ struct jz4740_i2s *i2s)
+{
+ i2s->field_rx_fifo_thresh =
+ devm_regmap_field_alloc(dev, i2s->regmap,
+ i2s->soc_info->field_rx_fifo_thresh);
+ if (IS_ERR(i2s->field_rx_fifo_thresh))
+ return PTR_ERR(i2s->field_rx_fifo_thresh);
+
+ i2s->field_tx_fifo_thresh =
+ devm_regmap_field_alloc(dev, i2s->regmap,
+ i2s->soc_info->field_tx_fifo_thresh);
+ if (IS_ERR(i2s->field_tx_fifo_thresh))
+ return PTR_ERR(i2s->field_tx_fifo_thresh);
+
+ i2s->field_i2sdiv_capture =
+ devm_regmap_field_alloc(dev, i2s->regmap,
+ i2s->soc_info->field_i2sdiv_capture);
+ if (IS_ERR(i2s->field_i2sdiv_capture))
+ return PTR_ERR(i2s->field_i2sdiv_capture);
+
+ i2s->field_i2sdiv_playback =
+ devm_regmap_field_alloc(dev, i2s->regmap,
+ i2s->soc_info->field_i2sdiv_playback);
+ if (IS_ERR(i2s->field_i2sdiv_playback))
+ return PTR_ERR(i2s->field_i2sdiv_playback);
+
+ return 0;
+}
+
static const struct regmap_config jz4740_i2s_regmap_config = {
.reg_bits = 32,
.reg_stride = 4,
@@ -524,6 +539,10 @@ static int jz4740_i2s_dev_probe(struct platform_device *pdev)
if (IS_ERR(i2s->regmap))
return PTR_ERR(i2s->regmap);
+ ret = jz4740_i2s_init_regmap_fields(dev, i2s);
+ if (ret)
+ return ret;
+
platform_set_drvdata(pdev, i2s);
ret = devm_snd_soc_register_component(dev, &jz4740_i2s_component,
--
2.38.1
Using regmap for accessing the AIC registers makes the driver a
little easier to read, and later refactors can take advantage of
regmap APIs to further simplify the driver.
Reviewed-by: Paul Cercueil <[email protected]>
Signed-off-by: Aidan MacDonald <[email protected]>
---
sound/soc/jz4740/Kconfig | 1 +
sound/soc/jz4740/jz4740-i2s.c | 106 ++++++++++++----------------------
2 files changed, 39 insertions(+), 68 deletions(-)
diff --git a/sound/soc/jz4740/Kconfig b/sound/soc/jz4740/Kconfig
index e72f826062e9..dd3b4507fbe6 100644
--- a/sound/soc/jz4740/Kconfig
+++ b/sound/soc/jz4740/Kconfig
@@ -3,6 +3,7 @@ config SND_JZ4740_SOC_I2S
tristate "SoC Audio (I2S protocol) for Ingenic JZ4740 SoC"
depends on MIPS || COMPILE_TEST
depends on HAS_IOMEM
+ select REGMAP_MMIO
select SND_SOC_GENERIC_DMAENGINE_PCM
help
Say Y if you want to use I2S protocol and I2S codec on Ingenic JZ4740
diff --git a/sound/soc/jz4740/jz4740-i2s.c b/sound/soc/jz4740/jz4740-i2s.c
index 83cb81999c6f..f3c0d7c0415e 100644
--- a/sound/soc/jz4740/jz4740-i2s.c
+++ b/sound/soc/jz4740/jz4740-i2s.c
@@ -9,6 +9,7 @@
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/platform_device.h>
+#include <linux/regmap.h>
#include <linux/slab.h>
#include <linux/clk.h>
@@ -96,7 +97,7 @@ struct i2s_soc_info {
};
struct jz4740_i2s {
- void __iomem *base;
+ struct regmap *regmap;
struct clk *clk_aic;
struct clk *clk_i2s;
@@ -107,31 +108,10 @@ struct jz4740_i2s {
const struct i2s_soc_info *soc_info;
};
-static inline uint32_t jz4740_i2s_read(const struct jz4740_i2s *i2s,
- unsigned int reg)
-{
- return readl(i2s->base + reg);
-}
-
-static inline void jz4740_i2s_write(const struct jz4740_i2s *i2s,
- unsigned int reg, uint32_t value)
-{
- writel(value, i2s->base + reg);
-}
-
-static inline void jz4740_i2s_set_bits(const struct jz4740_i2s *i2s,
- unsigned int reg, uint32_t bits)
-{
- uint32_t value = jz4740_i2s_read(i2s, reg);
- value |= bits;
- jz4740_i2s_write(i2s, reg, value);
-}
-
static int jz4740_i2s_startup(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
struct jz4740_i2s *i2s = snd_soc_dai_get_drvdata(dai);
- uint32_t conf;
int ret;
/*
@@ -141,9 +121,9 @@ static int jz4740_i2s_startup(struct snd_pcm_substream *substream,
*/
if (!i2s->soc_info->shared_fifo_flush) {
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
- jz4740_i2s_set_bits(i2s, JZ_REG_AIC_CTRL, JZ_AIC_CTRL_TFLUSH);
+ regmap_set_bits(i2s->regmap, JZ_REG_AIC_CTRL, JZ_AIC_CTRL_TFLUSH);
else
- jz4740_i2s_set_bits(i2s, JZ_REG_AIC_CTRL, JZ_AIC_CTRL_RFLUSH);
+ regmap_set_bits(i2s->regmap, JZ_REG_AIC_CTRL, JZ_AIC_CTRL_RFLUSH);
}
if (snd_soc_dai_active(dai))
@@ -156,16 +136,13 @@ static int jz4740_i2s_startup(struct snd_pcm_substream *substream,
* guard this behind the snd_soc_dai_active() check.
*/
if (i2s->soc_info->shared_fifo_flush)
- jz4740_i2s_set_bits(i2s, JZ_REG_AIC_CTRL, JZ_AIC_CTRL_TFLUSH);
+ regmap_set_bits(i2s->regmap, JZ_REG_AIC_CTRL, JZ_AIC_CTRL_TFLUSH);
ret = clk_prepare_enable(i2s->clk_i2s);
if (ret)
return ret;
- conf = jz4740_i2s_read(i2s, JZ_REG_AIC_CONF);
- conf |= JZ_AIC_CONF_ENABLE;
- jz4740_i2s_write(i2s, JZ_REG_AIC_CONF, conf);
-
+ regmap_set_bits(i2s->regmap, JZ_REG_AIC_CONF, JZ_AIC_CONF_ENABLE);
return 0;
}
@@ -173,14 +150,11 @@ static void jz4740_i2s_shutdown(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
struct jz4740_i2s *i2s = snd_soc_dai_get_drvdata(dai);
- uint32_t conf;
if (snd_soc_dai_active(dai))
return;
- conf = jz4740_i2s_read(i2s, JZ_REG_AIC_CONF);
- conf &= ~JZ_AIC_CONF_ENABLE;
- jz4740_i2s_write(i2s, JZ_REG_AIC_CONF, conf);
+ regmap_clear_bits(i2s->regmap, JZ_REG_AIC_CONF, JZ_AIC_CONF_ENABLE);
clk_disable_unprepare(i2s->clk_i2s);
}
@@ -189,8 +163,6 @@ static int jz4740_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
struct snd_soc_dai *dai)
{
struct jz4740_i2s *i2s = snd_soc_dai_get_drvdata(dai);
-
- uint32_t ctrl;
uint32_t mask;
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
@@ -198,38 +170,30 @@ static int jz4740_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
else
mask = JZ_AIC_CTRL_ENABLE_CAPTURE | JZ_AIC_CTRL_ENABLE_RX_DMA;
- ctrl = jz4740_i2s_read(i2s, JZ_REG_AIC_CTRL);
-
switch (cmd) {
case SNDRV_PCM_TRIGGER_START:
case SNDRV_PCM_TRIGGER_RESUME:
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
- ctrl |= mask;
+ regmap_set_bits(i2s->regmap, JZ_REG_AIC_CTRL, mask);
break;
case SNDRV_PCM_TRIGGER_STOP:
case SNDRV_PCM_TRIGGER_SUSPEND:
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
- ctrl &= ~mask;
+ regmap_clear_bits(i2s->regmap, JZ_REG_AIC_CTRL, mask);
break;
default:
return -EINVAL;
}
- jz4740_i2s_write(i2s, JZ_REG_AIC_CTRL, ctrl);
-
return 0;
}
static int jz4740_i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
{
struct jz4740_i2s *i2s = snd_soc_dai_get_drvdata(dai);
-
- uint32_t format = 0;
- uint32_t conf;
-
- conf = jz4740_i2s_read(i2s, JZ_REG_AIC_CONF);
-
- conf &= ~(JZ_AIC_CONF_BIT_CLK_MASTER | JZ_AIC_CONF_SYNC_CLK_MASTER);
+ const unsigned int conf_mask = JZ_AIC_CONF_BIT_CLK_MASTER |
+ JZ_AIC_CONF_SYNC_CLK_MASTER;
+ unsigned int conf = 0, format = 0;
switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
case SND_SOC_DAIFMT_BP_FP:
@@ -265,8 +229,8 @@ static int jz4740_i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
return -EINVAL;
}
- jz4740_i2s_write(i2s, JZ_REG_AIC_CONF, conf);
- jz4740_i2s_write(i2s, JZ_REG_AIC_I2S_FMT, format);
+ regmap_update_bits(i2s->regmap, JZ_REG_AIC_CONF, conf_mask, conf);
+ regmap_write(i2s->regmap, JZ_REG_AIC_I2S_FMT, format);
return 0;
}
@@ -279,9 +243,9 @@ static int jz4740_i2s_hw_params(struct snd_pcm_substream *substream,
uint32_t ctrl, div_reg;
int div;
- ctrl = jz4740_i2s_read(i2s, JZ_REG_AIC_CTRL);
+ regmap_read(i2s->regmap, JZ_REG_AIC_CTRL, &ctrl);
+ regmap_read(i2s->regmap, JZ_REG_AIC_CLK_DIV, &div_reg);
- div_reg = jz4740_i2s_read(i2s, JZ_REG_AIC_CLK_DIV);
div = clk_get_rate(i2s->clk_i2s) / (64 * params_rate(params));
switch (params_format(params)) {
@@ -318,8 +282,8 @@ static int jz4740_i2s_hw_params(struct snd_pcm_substream *substream,
}
}
- jz4740_i2s_write(i2s, JZ_REG_AIC_CTRL, ctrl);
- jz4740_i2s_write(i2s, JZ_REG_AIC_CLK_DIV, div_reg);
+ regmap_write(i2s->regmap, JZ_REG_AIC_CTRL, ctrl);
+ regmap_write(i2s->regmap, JZ_REG_AIC_CLK_DIV, div_reg);
return 0;
}
@@ -356,13 +320,9 @@ static int jz4740_i2s_set_sysclk(struct snd_soc_dai *dai, int clk_id,
static int jz4740_i2s_suspend(struct snd_soc_component *component)
{
struct jz4740_i2s *i2s = snd_soc_component_get_drvdata(component);
- uint32_t conf;
if (snd_soc_component_active(component)) {
- conf = jz4740_i2s_read(i2s, JZ_REG_AIC_CONF);
- conf &= ~JZ_AIC_CONF_ENABLE;
- jz4740_i2s_write(i2s, JZ_REG_AIC_CONF, conf);
-
+ regmap_clear_bits(i2s->regmap, JZ_REG_AIC_CONF, JZ_AIC_CONF_ENABLE);
clk_disable_unprepare(i2s->clk_i2s);
}
@@ -374,7 +334,6 @@ static int jz4740_i2s_suspend(struct snd_soc_component *component)
static int jz4740_i2s_resume(struct snd_soc_component *component)
{
struct jz4740_i2s *i2s = snd_soc_component_get_drvdata(component);
- uint32_t conf;
int ret;
ret = clk_prepare_enable(i2s->clk_aic);
@@ -388,9 +347,7 @@ static int jz4740_i2s_resume(struct snd_soc_component *component)
return ret;
}
- conf = jz4740_i2s_read(i2s, JZ_REG_AIC_CONF);
- conf |= JZ_AIC_CONF_ENABLE;
- jz4740_i2s_write(i2s, JZ_REG_AIC_CONF, conf);
+ regmap_set_bits(i2s->regmap, JZ_REG_AIC_CONF, JZ_AIC_CONF_ENABLE);
}
return 0;
@@ -423,8 +380,8 @@ static int jz4740_i2s_dai_probe(struct snd_soc_dai *dai)
JZ_AIC_CONF_INTERNAL_CODEC;
}
- jz4740_i2s_write(i2s, JZ_REG_AIC_CONF, JZ_AIC_CONF_RESET);
- jz4740_i2s_write(i2s, JZ_REG_AIC_CONF, conf);
+ regmap_write(i2s->regmap, JZ_REG_AIC_CONF, JZ_AIC_CONF_RESET);
+ regmap_write(i2s->regmap, JZ_REG_AIC_CONF, conf);
return 0;
}
@@ -523,11 +480,19 @@ static const struct of_device_id jz4740_of_matches[] = {
};
MODULE_DEVICE_TABLE(of, jz4740_of_matches);
+static const struct regmap_config jz4740_i2s_regmap_config = {
+ .reg_bits = 32,
+ .reg_stride = 4,
+ .val_bits = 32,
+ .max_register = JZ_REG_AIC_FIFO,
+};
+
static int jz4740_i2s_dev_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct jz4740_i2s *i2s;
struct resource *mem;
+ void __iomem *regs;
int ret;
i2s = devm_kzalloc(dev, sizeof(*i2s), GFP_KERNEL);
@@ -536,9 +501,9 @@ static int jz4740_i2s_dev_probe(struct platform_device *pdev)
i2s->soc_info = device_get_match_data(dev);
- i2s->base = devm_platform_get_and_ioremap_resource(pdev, 0, &mem);
- if (IS_ERR(i2s->base))
- return PTR_ERR(i2s->base);
+ regs = devm_platform_get_and_ioremap_resource(pdev, 0, &mem);
+ if (IS_ERR(regs))
+ return PTR_ERR(regs);
i2s->playback_dma_data.maxburst = 16;
i2s->playback_dma_data.addr = mem->start + JZ_REG_AIC_FIFO;
@@ -554,6 +519,11 @@ static int jz4740_i2s_dev_probe(struct platform_device *pdev)
if (IS_ERR(i2s->clk_i2s))
return PTR_ERR(i2s->clk_i2s);
+ i2s->regmap = devm_regmap_init_mmio(&pdev->dev, regs,
+ &jz4740_i2s_regmap_config);
+ if (IS_ERR(i2s->regmap))
+ return PTR_ERR(i2s->regmap);
+
platform_set_drvdata(pdev, i2s);
ret = devm_snd_soc_register_component(dev, &jz4740_i2s_component,
--
2.38.1
The audio controller on JZ47xx SoCs can transfer 20- and 24-bit
samples in the FIFO, so allow those formats to be used with the
I2S driver. Although the FIFO doesn't care about the in-memory
sample format, we only support 4-byte format variants because the
DMA controller on these SoCs cannot transfer in 3-byte multiples.
Reviewed-by: Paul Cercueil <[email protected]>
Signed-off-by: Aidan MacDonald <[email protected]>
---
sound/soc/jz4740/jz4740-i2s.c | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/sound/soc/jz4740/jz4740-i2s.c b/sound/soc/jz4740/jz4740-i2s.c
index c3235e993ffb..fd35a8a51f60 100644
--- a/sound/soc/jz4740/jz4740-i2s.c
+++ b/sound/soc/jz4740/jz4740-i2s.c
@@ -237,9 +237,15 @@ static int jz4740_i2s_hw_params(struct snd_pcm_substream *substream,
case SNDRV_PCM_FORMAT_S8:
sample_size = 0;
break;
- case SNDRV_PCM_FORMAT_S16:
+ case SNDRV_PCM_FORMAT_S16_LE:
sample_size = 1;
break;
+ case SNDRV_PCM_FORMAT_S20_LE:
+ sample_size = 3;
+ break;
+ case SNDRV_PCM_FORMAT_S24_LE:
+ sample_size = 4;
+ break;
default:
return -EINVAL;
}
@@ -374,7 +380,9 @@ static const struct snd_soc_dai_ops jz4740_i2s_dai_ops = {
};
#define JZ4740_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \
- SNDRV_PCM_FMTBIT_S16_LE)
+ SNDRV_PCM_FMTBIT_S16_LE | \
+ SNDRV_PCM_FMTBIT_S20_LE | \
+ SNDRV_PCM_FMTBIT_S24_LE)
static struct snd_soc_dai_driver jz4740_i2s_dai = {
.probe = jz4740_i2s_dai_probe,
--
2.38.1
On Sun, 23 Oct 2022 15:33:19 +0100, Aidan MacDonald wrote:
> This series is a preparatory cleanup of the jz4740-i2s driver before
> adding support for a new SoC. The two improvements are lifting
> unnecessary restrictions on sample rates and formats -- the existing
> ones appear to be derived from the limitations of the JZ4740's internal
> codec and don't reflect the actual capabilities of the I2S controller.
>
> I'm unable to test the series on any JZ47xx SoCs, but I have tested
> on an X1000 (which is the SoC I'll be adding in a followup series).
>
> [...]
Applied to
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
Thanks!
[1/9] ASoC: jz4740-i2s: Handle independent FIFO flush bits
commit: 8b3a9ad86239f80ed569e23c3954a311f66481d6
[2/9] ASoC: jz4740-i2s: Convert to regmap API
commit: cf375e693252f4e8ecb6256af631ff381381a3dd
[3/9] ASoC: jz4740-i2s: Simplify using regmap fields
commit: 0fddb4bce669fd255f6ffade6905da5c8ed3e254
[4/9] ASoC: jz4740-i2s: Use FIELD_PREP() macros in hw_params callback
commit: b355ebebb17c438b90c3d339f38a79559f7259df
[5/9] ASoC: jz4740-i2s: Align macro values and sort includes
commit: dacc06b812f46e0d4cfdda98134a8b5d64375341
[6/9] ASoC: jz4740-i2s: Support S20_LE and S24_LE sample formats
commit: 7abd01cfc5428581b21099eb629d88e76a47b67a
[7/9] ASoC: jz4740-i2s: Support continuous sample rate
commit: 84a914349ba2634e8db6b0815f100697d878d033
[8/9] ASoC: jz4740-i2s: Move component functions near the component driver
commit: 165afe6b66aafaafc95484ac2f0f09f78d62386b
[9/9] ASoC: jz4740-i2s: Refactor DAI probe/remove ops as component ops
commit: 4e02fd6207474ef2d882b8620f4c3db9a02d4ddd
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark