To do remote FENCEs (i.e. remote TLB flushes) using IPI calls on the
RISC-V kernel, we need hardware mechanism to directly inject IPI from
the supervisor mode (i.e. RISC-V kernel) instead of using SBI calls.
The upcoming AIA IMSIC devices allow direct IPI injection from the
supervisor mode (i.e. RISC-V kernel). To support this, we extend the
riscv_ipi_set_virq_range() function so that IPI provider (i.e. irqchip
drivers can mark IPIs as suitable for remote FENCEs.
Signed-off-by: Anup Patel <[email protected]>
---
arch/riscv/include/asm/smp.h | 18 ++++++++++++++++--
arch/riscv/kernel/sbi-ipi.c | 2 +-
arch/riscv/kernel/smp.c | 11 ++++++++++-
drivers/clocksource/timer-clint.c | 2 +-
4 files changed, 28 insertions(+), 5 deletions(-)
diff --git a/arch/riscv/include/asm/smp.h b/arch/riscv/include/asm/smp.h
index 79ed0b73cd4e..56976e41a21e 100644
--- a/arch/riscv/include/asm/smp.h
+++ b/arch/riscv/include/asm/smp.h
@@ -16,6 +16,9 @@ struct seq_file;
extern unsigned long boot_cpu_hartid;
#ifdef CONFIG_SMP
+
+#include <linux/jump_label.h>
+
/*
* Mapping between linux logical cpu index and hartid.
*/
@@ -46,7 +49,12 @@ void riscv_ipi_disable(void);
bool riscv_ipi_have_virq_range(void);
/* Set the IPI interrupt numbers for arch (called by irqchip drivers) */
-void riscv_ipi_set_virq_range(int virq, int nr);
+void riscv_ipi_set_virq_range(int virq, int nr, bool use_for_rfence);
+
+/* Check if we can use IPIs for remote FENCEs */
+DECLARE_STATIC_KEY_FALSE(riscv_ipi_for_rfence);
+#define riscv_use_ipi_for_rfence() \
+ static_branch_unlikely(&riscv_ipi_for_rfence)
/* Secondary hart entry */
asmlinkage void smp_callin(void);
@@ -93,10 +101,16 @@ static inline bool riscv_ipi_have_virq_range(void)
return false;
}
-static inline void riscv_ipi_set_virq_range(int virq, int nr)
+static inline void riscv_ipi_set_virq_range(int virq, int nr,
+ bool use_for_rfence)
{
}
+static inline bool riscv_use_ipi_for_rfence(void)
+{
+ return false;
+}
+
#endif /* CONFIG_SMP */
#if defined(CONFIG_HOTPLUG_CPU) && (CONFIG_SMP)
diff --git a/arch/riscv/kernel/sbi-ipi.c b/arch/riscv/kernel/sbi-ipi.c
index f0a78420b127..ee8620104bd8 100644
--- a/arch/riscv/kernel/sbi-ipi.c
+++ b/arch/riscv/kernel/sbi-ipi.c
@@ -75,6 +75,6 @@ void __init sbi_ipi_init(void)
"irqchip/sbi-ipi:starting",
sbi_ipi_starting_cpu, sbi_ipi_dying_cpu);
- riscv_ipi_set_virq_range(virq, BITS_PER_BYTE);
+ riscv_ipi_set_virq_range(virq, BITS_PER_BYTE, false);
pr_info("providing IPIs using SBI IPI extension\n");
}
diff --git a/arch/riscv/kernel/smp.c b/arch/riscv/kernel/smp.c
index e8a20454d65b..74b8cb1a89ab 100644
--- a/arch/riscv/kernel/smp.c
+++ b/arch/riscv/kernel/smp.c
@@ -145,7 +145,10 @@ bool riscv_ipi_have_virq_range(void)
return (ipi_virq_base) ? true : false;
}
-void riscv_ipi_set_virq_range(int virq, int nr)
+DEFINE_STATIC_KEY_FALSE(riscv_ipi_for_rfence);
+EXPORT_SYMBOL_GPL(riscv_ipi_for_rfence);
+
+void riscv_ipi_set_virq_range(int virq, int nr, bool use_for_rfence)
{
int i, err;
@@ -168,6 +171,12 @@ void riscv_ipi_set_virq_range(int virq, int nr)
/* Enabled IPIs for boot CPU immediately */
riscv_ipi_enable();
+
+ /* Update RFENCE static key */
+ if (use_for_rfence)
+ static_branch_enable(&riscv_ipi_for_rfence);
+ else
+ static_branch_disable(&riscv_ipi_for_rfence);
}
EXPORT_SYMBOL_GPL(riscv_ipi_set_virq_range);
diff --git a/drivers/clocksource/timer-clint.c b/drivers/clocksource/timer-clint.c
index f9dd746a72c5..658049a5440b 100644
--- a/drivers/clocksource/timer-clint.c
+++ b/drivers/clocksource/timer-clint.c
@@ -249,7 +249,7 @@ static int __init clint_timer_init_dt(struct device_node *np)
goto fail_free_irq;
}
- riscv_ipi_set_virq_range(virq, BITS_PER_BYTE);
+ riscv_ipi_set_virq_range(virq, BITS_PER_BYTE, true);
clint_clear_ipi(clint_ipi_irq, NULL);
return 0;
--
2.34.1
On Tue, Nov 1, 2022 at 7:34 AM Anup Patel <[email protected]> wrote:
>
> To do remote FENCEs (i.e. remote TLB flushes) using IPI calls on the
> RISC-V kernel, we need hardware mechanism to directly inject IPI from
> the supervisor mode (i.e. RISC-V kernel) instead of using SBI calls.
>
> The upcoming AIA IMSIC devices allow direct IPI injection from the
> supervisor mode (i.e. RISC-V kernel). To support this, we extend the
> riscv_ipi_set_virq_range() function so that IPI provider (i.e. irqchip
> drivers can mark IPIs as suitable for remote FENCEs.
>
> Signed-off-by: Anup Patel <[email protected]>
> ---
> arch/riscv/include/asm/smp.h | 18 ++++++++++++++++--
> arch/riscv/kernel/sbi-ipi.c | 2 +-
> arch/riscv/kernel/smp.c | 11 ++++++++++-
> drivers/clocksource/timer-clint.c | 2 +-
> 4 files changed, 28 insertions(+), 5 deletions(-)
>
> diff --git a/arch/riscv/include/asm/smp.h b/arch/riscv/include/asm/smp.h
> index 79ed0b73cd4e..56976e41a21e 100644
> --- a/arch/riscv/include/asm/smp.h
> +++ b/arch/riscv/include/asm/smp.h
> @@ -16,6 +16,9 @@ struct seq_file;
> extern unsigned long boot_cpu_hartid;
>
> #ifdef CONFIG_SMP
> +
> +#include <linux/jump_label.h>
> +
> /*
> * Mapping between linux logical cpu index and hartid.
> */
> @@ -46,7 +49,12 @@ void riscv_ipi_disable(void);
> bool riscv_ipi_have_virq_range(void);
>
> /* Set the IPI interrupt numbers for arch (called by irqchip drivers) */
> -void riscv_ipi_set_virq_range(int virq, int nr);
> +void riscv_ipi_set_virq_range(int virq, int nr, bool use_for_rfence);
> +
> +/* Check if we can use IPIs for remote FENCEs */
> +DECLARE_STATIC_KEY_FALSE(riscv_ipi_for_rfence);
> +#define riscv_use_ipi_for_rfence() \
> + static_branch_unlikely(&riscv_ipi_for_rfence)
>
> /* Secondary hart entry */
> asmlinkage void smp_callin(void);
> @@ -93,10 +101,16 @@ static inline bool riscv_ipi_have_virq_range(void)
> return false;
> }
>
> -static inline void riscv_ipi_set_virq_range(int virq, int nr)
> +static inline void riscv_ipi_set_virq_range(int virq, int nr,
> + bool use_for_rfence)
> {
> }
>
> +static inline bool riscv_use_ipi_for_rfence(void)
> +{
> + return false;
> +}
> +
> #endif /* CONFIG_SMP */
>
> #if defined(CONFIG_HOTPLUG_CPU) && (CONFIG_SMP)
> diff --git a/arch/riscv/kernel/sbi-ipi.c b/arch/riscv/kernel/sbi-ipi.c
> index f0a78420b127..ee8620104bd8 100644
> --- a/arch/riscv/kernel/sbi-ipi.c
> +++ b/arch/riscv/kernel/sbi-ipi.c
> @@ -75,6 +75,6 @@ void __init sbi_ipi_init(void)
> "irqchip/sbi-ipi:starting",
> sbi_ipi_starting_cpu, sbi_ipi_dying_cpu);
>
> - riscv_ipi_set_virq_range(virq, BITS_PER_BYTE);
> + riscv_ipi_set_virq_range(virq, BITS_PER_BYTE, false);
> pr_info("providing IPIs using SBI IPI extension\n");
> }
> diff --git a/arch/riscv/kernel/smp.c b/arch/riscv/kernel/smp.c
> index e8a20454d65b..74b8cb1a89ab 100644
> --- a/arch/riscv/kernel/smp.c
> +++ b/arch/riscv/kernel/smp.c
> @@ -145,7 +145,10 @@ bool riscv_ipi_have_virq_range(void)
> return (ipi_virq_base) ? true : false;
> }
>
> -void riscv_ipi_set_virq_range(int virq, int nr)
> +DEFINE_STATIC_KEY_FALSE(riscv_ipi_for_rfence);
> +EXPORT_SYMBOL_GPL(riscv_ipi_for_rfence);
> +
> +void riscv_ipi_set_virq_range(int virq, int nr, bool use_for_rfence)
> {
> int i, err;
>
> @@ -168,6 +171,12 @@ void riscv_ipi_set_virq_range(int virq, int nr)
>
> /* Enabled IPIs for boot CPU immediately */
> riscv_ipi_enable();
> +
> + /* Update RFENCE static key */
> + if (use_for_rfence)
> + static_branch_enable(&riscv_ipi_for_rfence);
> + else
> + static_branch_disable(&riscv_ipi_for_rfence);
> }
> EXPORT_SYMBOL_GPL(riscv_ipi_set_virq_range);
>
> diff --git a/drivers/clocksource/timer-clint.c b/drivers/clocksource/timer-clint.c
> index f9dd746a72c5..658049a5440b 100644
> --- a/drivers/clocksource/timer-clint.c
> +++ b/drivers/clocksource/timer-clint.c
> @@ -249,7 +249,7 @@ static int __init clint_timer_init_dt(struct device_node *np)
> goto fail_free_irq;
> }
>
> - riscv_ipi_set_virq_range(virq, BITS_PER_BYTE);
> + riscv_ipi_set_virq_range(virq, BITS_PER_BYTE, true);
> clint_clear_ipi(clint_ipi_irq, NULL);
>
> return 0;
> --
> 2.34.1
>
Reviewed-by: Atish Patra <[email protected]>
--
Regards,
Atish