Make especially kernels without CONFIG_XEN_PV more efficient by
using cpu_feature_enabled(X86_FEATURE_XENPV) instead of boot_cpu_has()
and friends.
Juergen Gross (4):
x86: add X86_FEATURE_XENPV to disabled-features.h
x86: remove unneeded 64-bit dependency in arch_enter_from_user_mode()
x86: drop 32-bit Xen PV guest code in update_task_stack()
x86: switch to cpu_feature_enabled() for X86_FEATURE_XENPV
arch/x86/include/asm/disabled-features.h | 8 +++++++-
arch/x86/include/asm/entry-common.h | 4 ++--
arch/x86/include/asm/switch_to.h | 7 ++-----
arch/x86/kernel/cpu/amd.c | 2 +-
arch/x86/kernel/cpu/bugs.c | 2 +-
arch/x86/kernel/cpu/hygon.c | 2 +-
arch/x86/kernel/process_64.c | 4 ++--
arch/x86/kernel/topology.c | 2 +-
arch/x86/mm/cpu_entry_area.c | 2 +-
9 files changed, 18 insertions(+), 15 deletions(-)
--
2.35.3
The check for 64-bit mode when testing X86_FEATURE_XENPV isn't needed,
as Xen PV guests are no longer supported in 32-bit mode.
While at it switch from boot_cpu_has() to cpu_feature_enabled().
Signed-off-by: Juergen Gross <[email protected]>
---
arch/x86/include/asm/entry-common.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/include/asm/entry-common.h b/arch/x86/include/asm/entry-common.h
index 674ed46d3ced..117903881fe4 100644
--- a/arch/x86/include/asm/entry-common.h
+++ b/arch/x86/include/asm/entry-common.h
@@ -24,8 +24,8 @@ static __always_inline void arch_enter_from_user_mode(struct pt_regs *regs)
/*
* For !SMAP hardware we patch out CLAC on entry.
*/
- if (boot_cpu_has(X86_FEATURE_SMAP) ||
- (IS_ENABLED(CONFIG_64BIT) && boot_cpu_has(X86_FEATURE_XENPV)))
+ if (cpu_feature_enabled(X86_FEATURE_SMAP) ||
+ cpu_feature_enabled(X86_FEATURE_XENPV))
mask |= X86_EFLAGS_AC;
WARN_ON_ONCE(flags & mask);
--
2.35.3
Testing for Xen PV guest mode in a 32-bit only code section can be
dropped, as Xen PV guests are supported in 64-bit mode only.
While at it switch from boot_cpu_has() to cpu_feature_enabled() in the
64-bit part of the code.
Signed-off-by: Juergen Gross <[email protected]>
---
arch/x86/include/asm/switch_to.h | 7 ++-----
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/arch/x86/include/asm/switch_to.h b/arch/x86/include/asm/switch_to.h
index c08eb0fdd11f..5c91305d09d2 100644
--- a/arch/x86/include/asm/switch_to.h
+++ b/arch/x86/include/asm/switch_to.h
@@ -66,13 +66,10 @@ static inline void update_task_stack(struct task_struct *task)
{
/* sp0 always points to the entry trampoline stack, which is constant: */
#ifdef CONFIG_X86_32
- if (static_cpu_has(X86_FEATURE_XENPV))
- load_sp0(task->thread.sp0);
- else
- this_cpu_write(cpu_tss_rw.x86_tss.sp1, task->thread.sp0);
+ this_cpu_write(cpu_tss_rw.x86_tss.sp1, task->thread.sp0);
#else
/* Xen PV enters the kernel on the thread stack. */
- if (static_cpu_has(X86_FEATURE_XENPV))
+ if (cpu_feature_enabled(X86_FEATURE_XENPV))
load_sp0(task_top_of_stack(task));
#endif
}
--
2.35.3
Convert the remaining cases of static_cpu_has(X86_FEATURE_XENPV) and
boot_cpu_has(X86_FEATURE_XENPV) to use cpu_feature_enabled(), allowing
more efficient code in case the kernel is configured without
CONFIG_XEN_PV.
Signed-off-by: Juergen Gross <[email protected]>
---
arch/x86/kernel/cpu/amd.c | 2 +-
arch/x86/kernel/cpu/bugs.c | 2 +-
arch/x86/kernel/cpu/hygon.c | 2 +-
arch/x86/kernel/process_64.c | 4 ++--
arch/x86/kernel/topology.c | 2 +-
arch/x86/mm/cpu_entry_area.c | 2 +-
6 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 860b60273df3..697fe881e967 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -985,7 +985,7 @@ static void init_amd(struct cpuinfo_x86 *c)
set_cpu_cap(c, X86_FEATURE_3DNOWPREFETCH);
/* AMD CPUs don't reset SS attributes on SYSRET, Xen does. */
- if (!cpu_has(c, X86_FEATURE_XENPV))
+ if (!cpu_feature_enabled(X86_FEATURE_XENPV))
set_cpu_bug(c, X86_BUG_SYSRET_SS_ATTRS);
/*
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index da7c361f47e0..7f78e1527c5e 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -1302,7 +1302,7 @@ static enum spectre_v2_mitigation_cmd __init spectre_v2_parse_cmdline(void)
return SPECTRE_V2_CMD_AUTO;
}
- if (cmd == SPECTRE_V2_CMD_IBRS && boot_cpu_has(X86_FEATURE_XENPV)) {
+ if (cmd == SPECTRE_V2_CMD_IBRS && cpu_feature_enabled(X86_FEATURE_XENPV)) {
pr_err("%s selected but running as XenPV guest. Switching to AUTO select\n",
mitigation_options[i].option);
return SPECTRE_V2_CMD_AUTO;
diff --git a/arch/x86/kernel/cpu/hygon.c b/arch/x86/kernel/cpu/hygon.c
index 21fd425088fe..1c27645fd429 100644
--- a/arch/x86/kernel/cpu/hygon.c
+++ b/arch/x86/kernel/cpu/hygon.c
@@ -339,7 +339,7 @@ static void init_hygon(struct cpuinfo_x86 *c)
set_cpu_cap(c, X86_FEATURE_ARAT);
/* Hygon CPUs don't reset SS attributes on SYSRET, Xen does. */
- if (!cpu_has(c, X86_FEATURE_XENPV))
+ if (!cpu_feature_enabled(X86_FEATURE_XENPV))
set_cpu_bug(c, X86_BUG_SYSRET_SS_ATTRS);
check_null_seg_clears_base(c);
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index 6b3418bff326..e2f469175be8 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -165,7 +165,7 @@ static noinstr unsigned long __rdgsbase_inactive(void)
lockdep_assert_irqs_disabled();
- if (!static_cpu_has(X86_FEATURE_XENPV)) {
+ if (!cpu_feature_enabled(X86_FEATURE_XENPV)) {
native_swapgs();
gsbase = rdgsbase();
native_swapgs();
@@ -190,7 +190,7 @@ static noinstr void __wrgsbase_inactive(unsigned long gsbase)
{
lockdep_assert_irqs_disabled();
- if (!static_cpu_has(X86_FEATURE_XENPV)) {
+ if (!cpu_feature_enabled(X86_FEATURE_XENPV)) {
native_swapgs();
wrgsbase(gsbase);
native_swapgs();
diff --git a/arch/x86/kernel/topology.c b/arch/x86/kernel/topology.c
index 8617d1ed9d31..1b83377274b8 100644
--- a/arch/x86/kernel/topology.c
+++ b/arch/x86/kernel/topology.c
@@ -106,7 +106,7 @@ int arch_register_cpu(int num)
* Xen PV guests don't support CPU0 hotplug at all.
*/
if (c->x86_vendor != X86_VENDOR_INTEL ||
- boot_cpu_has(X86_FEATURE_XENPV))
+ cpu_feature_enabled(X86_FEATURE_XENPV))
cpu0_hotpluggable = 0;
/*
diff --git a/arch/x86/mm/cpu_entry_area.c b/arch/x86/mm/cpu_entry_area.c
index 6c2f1b76a0b6..c83799753d44 100644
--- a/arch/x86/mm/cpu_entry_area.c
+++ b/arch/x86/mm/cpu_entry_area.c
@@ -147,7 +147,7 @@ static void __init setup_cpu_entry_area(unsigned int cpu)
* On Xen PV, the GDT must be read-only because the hypervisor
* requires it.
*/
- pgprot_t gdt_prot = boot_cpu_has(X86_FEATURE_XENPV) ?
+ pgprot_t gdt_prot = cpu_feature_enabled(X86_FEATURE_XENPV) ?
PAGE_KERNEL_RO : PAGE_KERNEL;
pgprot_t tss_prot = PAGE_KERNEL;
#endif
--
2.35.3
Add X86_FEATURE_XENPV to the features handled specially in
disabled-features.h.
Signed-off-by: Juergen Gross <[email protected]>
---
arch/x86/include/asm/disabled-features.h | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/x86/include/asm/disabled-features.h b/arch/x86/include/asm/disabled-features.h
index 33d2cd04d254..c862552d7d6d 100644
--- a/arch/x86/include/asm/disabled-features.h
+++ b/arch/x86/include/asm/disabled-features.h
@@ -81,6 +81,12 @@
# define DISABLE_SGX (1 << (X86_FEATURE_SGX & 31))
#endif
+#ifdef CONFIG_XEN_PV
+# define DISABLE_XENPV 0
+#else
+# define DISABLE_XENPV (1 << (X86_FEATURE_XENPV & 31))
+#endif
+
#ifdef CONFIG_INTEL_TDX_GUEST
# define DISABLE_TDX_GUEST 0
#else
@@ -98,7 +104,7 @@
#define DISABLED_MASK5 0
#define DISABLED_MASK6 0
#define DISABLED_MASK7 (DISABLE_PTI)
-#define DISABLED_MASK8 (DISABLE_TDX_GUEST)
+#define DISABLED_MASK8 (DISABLE_XENPV|DISABLE_TDX_GUEST)
#define DISABLED_MASK9 (DISABLE_SGX)
#define DISABLED_MASK10 0
#define DISABLED_MASK11 (DISABLE_RETPOLINE|DISABLE_RETHUNK|DISABLE_UNRET)
--
2.35.3
On 03.11.22 14:19, Brian Gerst wrote:
> On Thu, Nov 3, 2022 at 8:37 AM Juergen Gross <[email protected]> wrote:
>>
>> Convert the remaining cases of static_cpu_has(X86_FEATURE_XENPV) and
>> boot_cpu_has(X86_FEATURE_XENPV) to use cpu_feature_enabled(), allowing
>> more efficient code in case the kernel is configured without
>> CONFIG_XEN_PV.
>>
>> Signed-off-by: Juergen Gross <[email protected]>
>> ---
>> arch/x86/kernel/cpu/amd.c | 2 +-
>> arch/x86/kernel/cpu/bugs.c | 2 +-
>> arch/x86/kernel/cpu/hygon.c | 2 +-
>> arch/x86/kernel/process_64.c | 4 ++--
>> arch/x86/kernel/topology.c | 2 +-
>> arch/x86/mm/cpu_entry_area.c | 2 +-
>> 6 files changed, 7 insertions(+), 7 deletions(-)
>>
>> diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
>> index 860b60273df3..697fe881e967 100644
>> --- a/arch/x86/kernel/cpu/amd.c
>> +++ b/arch/x86/kernel/cpu/amd.c
>> @@ -985,7 +985,7 @@ static void init_amd(struct cpuinfo_x86 *c)
>> set_cpu_cap(c, X86_FEATURE_3DNOWPREFETCH);
>>
>> /* AMD CPUs don't reset SS attributes on SYSRET, Xen does. */
>> - if (!cpu_has(c, X86_FEATURE_XENPV))
>> + if (!cpu_feature_enabled(X86_FEATURE_XENPV))
>> set_cpu_bug(c, X86_BUG_SYSRET_SS_ATTRS);
>>
>> /*
>> diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
>> index da7c361f47e0..7f78e1527c5e 100644
>> --- a/arch/x86/kernel/cpu/bugs.c
>> +++ b/arch/x86/kernel/cpu/bugs.c
>> @@ -1302,7 +1302,7 @@ static enum spectre_v2_mitigation_cmd __init spectre_v2_parse_cmdline(void)
>> return SPECTRE_V2_CMD_AUTO;
>> }
>>
>> - if (cmd == SPECTRE_V2_CMD_IBRS && boot_cpu_has(X86_FEATURE_XENPV)) {
>> + if (cmd == SPECTRE_V2_CMD_IBRS && cpu_feature_enabled(X86_FEATURE_XENPV)) {
>> pr_err("%s selected but running as XenPV guest. Switching to AUTO select\n",
>> mitigation_options[i].option);
>> return SPECTRE_V2_CMD_AUTO;
>> diff --git a/arch/x86/kernel/cpu/hygon.c b/arch/x86/kernel/cpu/hygon.c
>> index 21fd425088fe..1c27645fd429 100644
>> --- a/arch/x86/kernel/cpu/hygon.c
>> +++ b/arch/x86/kernel/cpu/hygon.c
>> @@ -339,7 +339,7 @@ static void init_hygon(struct cpuinfo_x86 *c)
>> set_cpu_cap(c, X86_FEATURE_ARAT);
>>
>> /* Hygon CPUs don't reset SS attributes on SYSRET, Xen does. */
>> - if (!cpu_has(c, X86_FEATURE_XENPV))
>> + if (!cpu_feature_enabled(X86_FEATURE_XENPV))
>> set_cpu_bug(c, X86_BUG_SYSRET_SS_ATTRS);
>>
>> check_null_seg_clears_base(c);
>> diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
>> index 6b3418bff326..e2f469175be8 100644
>> --- a/arch/x86/kernel/process_64.c
>> +++ b/arch/x86/kernel/process_64.c
>> @@ -165,7 +165,7 @@ static noinstr unsigned long __rdgsbase_inactive(void)
>>
>> lockdep_assert_irqs_disabled();
>>
>> - if (!static_cpu_has(X86_FEATURE_XENPV)) {
>> + if (!cpu_feature_enabled(X86_FEATURE_XENPV)) {
>> native_swapgs();
>> gsbase = rdgsbase();
>> native_swapgs();
>> @@ -190,7 +190,7 @@ static noinstr void __wrgsbase_inactive(unsigned long gsbase)
>> {
>> lockdep_assert_irqs_disabled();
>>
>> - if (!static_cpu_has(X86_FEATURE_XENPV)) {
>> + if (!cpu_feature_enabled(X86_FEATURE_XENPV)) {
>> native_swapgs();
>> wrgsbase(gsbase);
>> native_swapgs();
>> diff --git a/arch/x86/kernel/topology.c b/arch/x86/kernel/topology.c
>> index 8617d1ed9d31..1b83377274b8 100644
>> --- a/arch/x86/kernel/topology.c
>> +++ b/arch/x86/kernel/topology.c
>> @@ -106,7 +106,7 @@ int arch_register_cpu(int num)
>> * Xen PV guests don't support CPU0 hotplug at all.
>> */
>> if (c->x86_vendor != X86_VENDOR_INTEL ||
>> - boot_cpu_has(X86_FEATURE_XENPV))
>> + cpu_feature_enabled(X86_FEATURE_XENPV))
>> cpu0_hotpluggable = 0;
>>
>> /*
>> diff --git a/arch/x86/mm/cpu_entry_area.c b/arch/x86/mm/cpu_entry_area.c
>> index 6c2f1b76a0b6..c83799753d44 100644
>> --- a/arch/x86/mm/cpu_entry_area.c
>> +++ b/arch/x86/mm/cpu_entry_area.c
>> @@ -147,7 +147,7 @@ static void __init setup_cpu_entry_area(unsigned int cpu)
>> * On Xen PV, the GDT must be read-only because the hypervisor
>> * requires it.
>> */
>> - pgprot_t gdt_prot = boot_cpu_has(X86_FEATURE_XENPV) ?
>> + pgprot_t gdt_prot = cpu_feature_enabled(X86_FEATURE_XENPV) ?
>> PAGE_KERNEL_RO : PAGE_KERNEL;
>> pgprot_t tss_prot = PAGE_KERNEL;
>> #endif
>
> This is another case that can be removed because it's for 32-bit.
Oh yes, indeed. Thanks for noticing.
Juergen
On Thu, Nov 3, 2022 at 8:37 AM Juergen Gross <[email protected]> wrote:
>
> Convert the remaining cases of static_cpu_has(X86_FEATURE_XENPV) and
> boot_cpu_has(X86_FEATURE_XENPV) to use cpu_feature_enabled(), allowing
> more efficient code in case the kernel is configured without
> CONFIG_XEN_PV.
>
> Signed-off-by: Juergen Gross <[email protected]>
> ---
> arch/x86/kernel/cpu/amd.c | 2 +-
> arch/x86/kernel/cpu/bugs.c | 2 +-
> arch/x86/kernel/cpu/hygon.c | 2 +-
> arch/x86/kernel/process_64.c | 4 ++--
> arch/x86/kernel/topology.c | 2 +-
> arch/x86/mm/cpu_entry_area.c | 2 +-
> 6 files changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
> index 860b60273df3..697fe881e967 100644
> --- a/arch/x86/kernel/cpu/amd.c
> +++ b/arch/x86/kernel/cpu/amd.c
> @@ -985,7 +985,7 @@ static void init_amd(struct cpuinfo_x86 *c)
> set_cpu_cap(c, X86_FEATURE_3DNOWPREFETCH);
>
> /* AMD CPUs don't reset SS attributes on SYSRET, Xen does. */
> - if (!cpu_has(c, X86_FEATURE_XENPV))
> + if (!cpu_feature_enabled(X86_FEATURE_XENPV))
> set_cpu_bug(c, X86_BUG_SYSRET_SS_ATTRS);
>
> /*
> diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
> index da7c361f47e0..7f78e1527c5e 100644
> --- a/arch/x86/kernel/cpu/bugs.c
> +++ b/arch/x86/kernel/cpu/bugs.c
> @@ -1302,7 +1302,7 @@ static enum spectre_v2_mitigation_cmd __init spectre_v2_parse_cmdline(void)
> return SPECTRE_V2_CMD_AUTO;
> }
>
> - if (cmd == SPECTRE_V2_CMD_IBRS && boot_cpu_has(X86_FEATURE_XENPV)) {
> + if (cmd == SPECTRE_V2_CMD_IBRS && cpu_feature_enabled(X86_FEATURE_XENPV)) {
> pr_err("%s selected but running as XenPV guest. Switching to AUTO select\n",
> mitigation_options[i].option);
> return SPECTRE_V2_CMD_AUTO;
> diff --git a/arch/x86/kernel/cpu/hygon.c b/arch/x86/kernel/cpu/hygon.c
> index 21fd425088fe..1c27645fd429 100644
> --- a/arch/x86/kernel/cpu/hygon.c
> +++ b/arch/x86/kernel/cpu/hygon.c
> @@ -339,7 +339,7 @@ static void init_hygon(struct cpuinfo_x86 *c)
> set_cpu_cap(c, X86_FEATURE_ARAT);
>
> /* Hygon CPUs don't reset SS attributes on SYSRET, Xen does. */
> - if (!cpu_has(c, X86_FEATURE_XENPV))
> + if (!cpu_feature_enabled(X86_FEATURE_XENPV))
> set_cpu_bug(c, X86_BUG_SYSRET_SS_ATTRS);
>
> check_null_seg_clears_base(c);
> diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
> index 6b3418bff326..e2f469175be8 100644
> --- a/arch/x86/kernel/process_64.c
> +++ b/arch/x86/kernel/process_64.c
> @@ -165,7 +165,7 @@ static noinstr unsigned long __rdgsbase_inactive(void)
>
> lockdep_assert_irqs_disabled();
>
> - if (!static_cpu_has(X86_FEATURE_XENPV)) {
> + if (!cpu_feature_enabled(X86_FEATURE_XENPV)) {
> native_swapgs();
> gsbase = rdgsbase();
> native_swapgs();
> @@ -190,7 +190,7 @@ static noinstr void __wrgsbase_inactive(unsigned long gsbase)
> {
> lockdep_assert_irqs_disabled();
>
> - if (!static_cpu_has(X86_FEATURE_XENPV)) {
> + if (!cpu_feature_enabled(X86_FEATURE_XENPV)) {
> native_swapgs();
> wrgsbase(gsbase);
> native_swapgs();
> diff --git a/arch/x86/kernel/topology.c b/arch/x86/kernel/topology.c
> index 8617d1ed9d31..1b83377274b8 100644
> --- a/arch/x86/kernel/topology.c
> +++ b/arch/x86/kernel/topology.c
> @@ -106,7 +106,7 @@ int arch_register_cpu(int num)
> * Xen PV guests don't support CPU0 hotplug at all.
> */
> if (c->x86_vendor != X86_VENDOR_INTEL ||
> - boot_cpu_has(X86_FEATURE_XENPV))
> + cpu_feature_enabled(X86_FEATURE_XENPV))
> cpu0_hotpluggable = 0;
>
> /*
> diff --git a/arch/x86/mm/cpu_entry_area.c b/arch/x86/mm/cpu_entry_area.c
> index 6c2f1b76a0b6..c83799753d44 100644
> --- a/arch/x86/mm/cpu_entry_area.c
> +++ b/arch/x86/mm/cpu_entry_area.c
> @@ -147,7 +147,7 @@ static void __init setup_cpu_entry_area(unsigned int cpu)
> * On Xen PV, the GDT must be read-only because the hypervisor
> * requires it.
> */
> - pgprot_t gdt_prot = boot_cpu_has(X86_FEATURE_XENPV) ?
> + pgprot_t gdt_prot = cpu_feature_enabled(X86_FEATURE_XENPV) ?
> PAGE_KERNEL_RO : PAGE_KERNEL;
> pgprot_t tss_prot = PAGE_KERNEL;
> #endif
This is another case that can be removed because it's for 32-bit.
--
Brian Gerst