The i.MX6 watchdog can't be stopped once started. Additionally, watchdog
hardware configuration needs to be able to handle low-power modes of the
SoC. For low-power modes, there are two configuration bits in the TRM:
- WDZST bit disables the watchdog timer in "deeper" low power modes and
- WDW bit disables the watchdog timer in "WAIT" mode
WDZST bit support is already in place since 1a9c5efa576e ("watchdog: imx2_wdt: disable watchdog timer during low power mode").
On the other hand, handling of WDZST bit was omitted so far but now
these patch series bring support for it.
SoC's "WAIT" low-power mode corresponds to Linux's freeze or
Suspend-to-Idle (S0) mode which can be activated with:
$ echo freeze > /sys/power/state
Without these patches, board would be reset by the watchdog after
timeout of 128 seconds since watchdog would not be stopped when SoC
entered Suspend-to-Idle mode. With patches in place, boards using
imx2-wdt are able to stay in Suspend-to-Idle mode indefinitely.
Last but not least, WDW bit is not found on all imx2-wdt supported i.MX
devices, therefore a new device-tree property "fsl,suspend-in-wait" has
been introduced for this.
Here is v1: https://lore.kernel.org/lkml/[email protected]/
Here is v2: https://lore.kernel.org/all/[email protected]/#t
Here is v3: https://lore.kernel.org/all/[email protected]/
Change log in the corresponding patches.
Andrej Picej (3):
watchdog: imx2_wdg: suspend watchdog in WAIT mode
dt-bindings: watchdog: fsl-imx: document suspend in wait mode
ARM: dts: imx6ul/ull: suspend i.MX6UL watchdog in wait mode
.../bindings/watchdog/fsl-imx-wdt.yaml | 37 ++++++++++++-
.../boot/dts/imx6ul-phytec-phycore-som.dtsi | 4 ++
drivers/watchdog/imx2_wdt.c | 55 ++++++++++++++++++-
3 files changed, 90 insertions(+), 6 deletions(-)
--
2.25.1
It was discovered that the watchdog triggers when the device is put into
"Suspend-To-Idle"/"freeze" low-power mode. Setting WDW bit disables
watchdog when the device is put into WAIT mode.
Signed-off-by: Andrej Picej <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
---
Changes in v4:
- no changes
Changes in v3:
- no changes
Changes in v2:
- no changes
---
arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi b/arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi
index 3cddc68917a0..5168ed0ffec3 100644
--- a/arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi
+++ b/arch/arm/boot/dts/imx6ul-phytec-phycore-som.dtsi
@@ -102,6 +102,10 @@ &usdhc2 {
status = "disabled";
};
+&wdog1 {
+ fsl,suspend-in-wait;
+};
+
&iomuxc {
pinctrl_enet1: enet1grp {
fsl,pins = <
--
2.25.1
On Fri, Nov 04, 2022 at 08:03:58AM +0100, Andrej Picej wrote:
> It was discovered that the watchdog triggers when the device is put into
> "Suspend-To-Idle"/"freeze" low-power mode. Setting WDW bit disables
> watchdog when the device is put into WAIT mode.
>
> Signed-off-by: Andrej Picej <[email protected]>
> Reviewed-by: Fabio Estevam <[email protected]>
Applied dts, thanks!