2022-11-04 07:42:15

by Jürgen Groß

Subject: [PATCH v2 4/5] x86: remove X86_FEATURE_XENPV usage in setup_cpu_entry_area()

Testing of X86_FEATURE_XENPV in setup_cpu_entry_area() can be removed,
as this code path is 32-bit only, and Xen PV guests are not supporting
32-bit mode.

Signed-off-by: Juergen Gross <[email protected]>
---
V2:
- new patch
---
arch/x86/mm/cpu_entry_area.c | 8 ++------
1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/arch/x86/mm/cpu_entry_area.c b/arch/x86/mm/cpu_entry_area.c
index 6c2f1b76a0b6..42cd96e7d733 100644
--- a/arch/x86/mm/cpu_entry_area.c
+++ b/arch/x86/mm/cpu_entry_area.c
@@ -138,17 +138,13 @@ static void __init setup_cpu_entry_area(unsigned int cpu)
pgprot_t tss_prot = PAGE_KERNEL_RO;
#else
/*
- * On native 32-bit systems, the GDT cannot be read-only because
+ * On 32-bit systems, the GDT cannot be read-only because
* our double fault handler uses a task gate, and entering through
* a task gate needs to change an available TSS to busy. If the
* GDT is read-only, that will triple fault. The TSS cannot be
* read-only because the CPU writes to it on task switches.
- *
- * On Xen PV, the GDT must be read-only because the hypervisor
- * requires it.
*/
- pgprot_t gdt_prot = boot_cpu_has(X86_FEATURE_XENPV) ?
- PAGE_KERNEL_RO : PAGE_KERNEL;
+ pgprot_t gdt_prot = PAGE_KERNEL;
pgprot_t tss_prot = PAGE_KERNEL;
#endif

--
2.35.3

2022-11-04 15:21:20

by Dave Hansen

Subject: Re: [PATCH v2 4/5] x86: remove X86_FEATURE_XENPV usage in setup_cpu_entry_area()

On 11/4/22 00:27, Juergen Gross wrote:
> Testing of X86_FEATURE_XENPV in setup_cpu_entry_area() can be removed,
> as this code path is 32-bit only, and Xen PV guests are not supporting
> 32-bit mode.

Acked-by: Dave Hansen <[email protected]>

2022-11-22 18:35:10

by tip-bot2 for Alexey Makhalov

Subject: [tip: x86/cpu] x86/cpu: Remove X86_FEATURE_XENPV usage in setup_cpu_entry_area()

The following commit has been merged into the x86/cpu branch of tip:

Commit-ID: d76c4f7a610ac56c5b06e34258859945e77d190c
Gitweb: https://git.kernel.org/tip/d76c4f7a610ac56c5b06e34258859945e77d190c
Author: Juergen Gross <[email protected]>
AuthorDate: Fri, 04 Nov 2022 08:27:00 +01:00
Committer: Borislav Petkov <[email protected]>
CommitterDate: Tue, 22 Nov 2022 16:16:25 +01:00

x86/cpu: Remove X86_FEATURE_XENPV usage in setup_cpu_entry_area()

Testing of X86_FEATURE_XENPV in setup_cpu_entry_area() can be removed,
as this code path is 32-bit only, and Xen PV guests are 64-bit only.

Signed-off-by: Juergen Gross <[email protected]>
Signed-off-by: Borislav Petkov <[email protected]>
Acked-by: Dave Hansen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
---
arch/x86/mm/cpu_entry_area.c | 8 ++------
1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/arch/x86/mm/cpu_entry_area.c b/arch/x86/mm/cpu_entry_area.c
index 6c2f1b7..42cd96e 100644
--- a/arch/x86/mm/cpu_entry_area.c
+++ b/arch/x86/mm/cpu_entry_area.c
@@ -138,17 +138,13 @@ static void __init setup_cpu_entry_area(unsigned int cpu)
pgprot_t tss_prot = PAGE_KERNEL_RO;
#else
/*
- * On native 32-bit systems, the GDT cannot be read-only because
+ * On 32-bit systems, the GDT cannot be read-only because
* our double fault handler uses a task gate, and entering through
* a task gate needs to change an available TSS to busy. If the
* GDT is read-only, that will triple fault. The TSS cannot be
* read-only because the CPU writes to it on task switches.
- *
- * On Xen PV, the GDT must be read-only because the hypervisor
- * requires it.
*/
- pgprot_t gdt_prot = boot_cpu_has(X86_FEATURE_XENPV) ?
- PAGE_KERNEL_RO : PAGE_KERNEL;
+ pgprot_t gdt_prot = PAGE_KERNEL;
pgprot_t tss_prot = PAGE_KERNEL;
#endif