2022-11-06 08:04:14

by Frank Wunderlich

Subject: [PATCH v2 2/6] dt-bindings: pinctrl: update uart/mmc bindings for MT7986 SoC

From: Frank Wunderlich <[email protected]>

Fix mmc and uart pins after uart splitting.

Some pinmux pins of the mt7986 pinctrl driver is composed of multiple
pinctrl groups, the original binding only allows one pinctrl group
per dts node, this patch sets "maxItems" for these groups and add new
examples to the binding documentation.

Fixes: 65916a1ca90a ("dt-bindings: pinctrl: update bindings for MT7986 SoC")
Signed-off-by: Sam Shih <[email protected]>
Signed-off-by: Frank Wunderlich <[email protected]>
---
v3:
- squashed version from sam
- v2 was ack'd by Krzysztof, but sams patch included updated emmc-names
and different structure for uart to allow 2 pingroups
v2:
- wrap on col 80
---
.../pinctrl/mediatek,mt7986-pinctrl.yaml | 46 +++++++++++++++++--
1 file changed, 41 insertions(+), 5 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml
index 75766956cfad..b2b9c01efd70 100644
--- a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml
@@ -87,6 +87,8 @@ patternProperties:
"wifi_led" "led" 1, 2
"i2c" "i2c" 3, 4
"uart1_0" "uart" 7, 8, 9, 10
+ "uart1_rx_tx" "uart" 42, 43
+ "uart1_cts_rts" "uart" 44, 45
"pcie_clk" "pcie" 9
"pcie_wake" "pcie" 10
"spi1_0" "spi" 11, 12, 13, 14
@@ -98,9 +100,11 @@ patternProperties:
"emmc_45" "emmc" 22, 23, 24, 25, 26, 27, 28, 29, 30,
31, 32
"spi1_1" "spi" 23, 24, 25, 26
- "uart1_2" "uart" 29, 30, 31, 32
+ "uart1_2_rx_tx" "uart" 29, 30
+ "uart1_2_cts_rts" "uart" 31, 32
"uart1_1" "uart" 23, 24, 25, 26
- "uart2_0" "uart" 29, 30, 31, 32
+ "uart2_0_rx_tx" "uart" 29, 30
+ "uart2_0_cts_rts" "uart" 31, 32
"spi0" "spi" 33, 34, 35, 36
"spi0_wp_hold" "spi" 37, 38
"uart1_3_rx_tx" "uart" 35, 36
@@ -157,7 +161,7 @@ patternProperties:
then:
properties:
groups:
- enum: [emmc, emmc_rst]
+ enum: [emmc_45, emmc_51]
- if:
properties:
function:
@@ -227,8 +231,12 @@ patternProperties:
then:
properties:
groups:
- enum: [uart1_0, uart1_1, uart1_2, uart1_3_rx_tx,
- uart1_3_cts_rts, uart2_0, uart2_1, uart0, uart1, uart2]
+ items:
+ enum: [uart1_0, uart1_rx_tx, uart1_cts_rts, uart1_1,
+ uart1_2_rx_tx, uart1_2_cts_rts, uart1_3_rx_tx,
+ uart1_3_cts_rts, uart2_0_rx_tx, uart2_0_cts_rts,
+ uart2_1, uart0, uart1, uart2]
+ maxItems: 2
- if:
properties:
function:
@@ -362,6 +370,27 @@ examples:
interrupt-parent = <&gic>;
#interrupt-cells = <2>;

+ pcie_pins: pcie-pins {
+ mux {
+ function = "pcie";
+ groups = "pcie_clk", "pcie_wake", "pcie_pereset";
+ };
+ };
+
+ pwm_pins: pwm-pins {
+ mux {
+ function = "pwm";
+ groups = "pwm0", "pwm1_0";
+ };
+ };
+
+ spi0_pins: spi0-pins {
+ mux {
+ function = "spi";
+ groups = "spi0", "spi0_wp_hold";
+ };
+ };
+
uart1_pins: uart1-pins {
mux {
function = "uart";
@@ -369,6 +398,13 @@ examples:
};
};

+ uart1_3_pins: uart1-3-pins {
+ mux {
+ function = "uart";
+ groups = "uart1_3_rx_tx", "uart1_3_cts_rts";
+ };
+ };
+
uart2_pins: uart2-pins {
mux {
function = "uart";
--
2.34.1

2022-11-06 09:53:16

by Krzysztof Kozlowski

Subject: Re: [PATCH v2 2/6] dt-bindings: pinctrl: update uart/mmc bindings for MT7986 SoC

On 06/11/2022 09:01, Frank Wunderlich wrote:
> From: Frank Wunderlich <[email protected]>
>
> Fix mmc and uart pins after uart splitting.
>
> Some pinmux pins of the mt7986 pinctrl driver is composed of multiple
> pinctrl groups, the original binding only allows one pinctrl group
> per dts node, this patch sets "maxItems" for these groups and add new
> examples to the binding documentation.
>
> Fixes: 65916a1ca90a ("dt-bindings: pinctrl: update bindings for MT7986 SoC")
> Signed-off-by: Sam Shih <[email protected]>
> Signed-off-by: Frank Wunderlich <[email protected]>
> ---
> v3:
> - squashed version from sam
> - v2 was ack'd by Krzysztof, but sams patch included updated emmc-names
> and different structure for uart to allow 2 pingroups
> v2:


Acked-by: Krzysztof Kozlowski <[email protected]>

Best regards,
Krzysztof