Add compatible to am65-cpsw driver for J721e CPSW9G, which contains 8
external ports and 1 internal host port.
Add support to power on and power off the SERDES PHY which is used by the
CPSW MAC.
=========
Changelog
=========
v4 -> v5:
1. Update subject of all patches in the series to "PATCH net-next".
2. Rebase series on net-next tree.
v3 -> v4:
1. Fix subject of patch-1/3, updating it to:
"dt-bindings: net: ti: k3-am654-cpsw-nuss: Add J721e CPSW9G support"
and collect Reviewed-by tag.
2. Rebase series on linux-next tree tagged: next-20221107.
v2 -> v3:
1. Run 'make DT_CHECKER_FLAGS=-m dt_binding_check' and fix errors and
warnings corresponding to the patch for:
Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml
with the latest dt-schema and yamllint.
v1 -> v2:
1. Drop all patches corresponding to SGMII mode. This is done since I do
not have a method to test SGMII in the standard mode which uses an
SGMII PHY. The previous series used SGMII in a fixed-link mode,
bypassing the SGMII PHY. I will post the SGMII patches in a future
series after testing them.
2. Drop all patches corresponding to fixed-link in the am65-cpsw driver.
This is done since PHYLINK takes care of fixed-link automatically and
there is no need to deal with fixed-link in a custom fashion.
3. Fix indentation errors in k3-am65-cpsw-nuss.yaml.
4. Remove the stale code which tries to power on and power off the CPSW
MAC's phy, since the CPSW MAC's phy driver does not support it.
5. Rename the function "am65_cpsw_init_phy()" to
"am65_cpsw_init_serdes_phy()", to indicate that the phy corresponds to
the SERDES.
6. Invoke "am65_cpsw_disable_serdes_phy()" as a part of the cleanup that
is associated with the "am65_cpsw_nuss_remove()" function.
v4:
https://lore.kernel.org/r/[email protected]/
v3:
https://lore.kernel.org/r/[email protected]/
v2:
https://lore.kernel.org/r/[email protected]/
v1:
https://lore.kernel.org/r/[email protected]/
Siddharth Vadapalli (3):
dt-bindings: net: ti: k3-am654-cpsw-nuss: Add J721e CPSW9G support
net: ethernet: ti: am65-cpsw: Enable QSGMII mode for J721e CPSW9G
net: ethernet: ti: am65-cpsw: Add support for SERDES configuration
.../bindings/net/ti,k3-am654-cpsw-nuss.yaml | 33 ++++++++-
drivers/net/ethernet/ti/am65-cpsw-nuss.c | 73 +++++++++++++++++++
2 files changed, 102 insertions(+), 4 deletions(-)
--
2.25.1
CPSW9G in J721e supports additional modes like QSGMII.
Add new compatible for J721e in am65-cpsw driver.
Signed-off-by: Siddharth Vadapalli <[email protected]>
---
drivers/net/ethernet/ti/am65-cpsw-nuss.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c
index 75429ff0c200..bc9f29d10c22 100644
--- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c
+++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c
@@ -2681,11 +2681,19 @@ static const struct am65_cpsw_pdata j7200_cpswxg_pdata = {
.extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII),
};
+static const struct am65_cpsw_pdata j721e_cpswxg_pdata = {
+ .quirks = 0,
+ .ale_dev_id = "am64-cpswxg",
+ .fdqring_mode = K3_RINGACC_RING_MODE_MESSAGE,
+ .extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII),
+};
+
static const struct of_device_id am65_cpsw_nuss_of_mtable[] = {
{ .compatible = "ti,am654-cpsw-nuss", .data = &am65x_sr1_0},
{ .compatible = "ti,j721e-cpsw-nuss", .data = &j721e_pdata},
{ .compatible = "ti,am642-cpsw-nuss", .data = &am64x_cpswxg_pdata},
{ .compatible = "ti,j7200-cpswxg-nuss", .data = &j7200_cpswxg_pdata},
+ { .compatible = "ti,j721e-cpswxg-nuss", .data = &j721e_cpswxg_pdata},
{ /* sentinel */ },
};
MODULE_DEVICE_TABLE(of, am65_cpsw_nuss_of_mtable);
--
2.25.1
Update bindings for TI K3 J721e SoC which contains 9 ports (8 external
ports) CPSW9G module and add compatible for it.
Changes made:
- Add new compatible ti,j721e-cpswxg-nuss for CPSW9G.
- Extend pattern properties for new compatible.
- Change maximum number of CPSW ports to 8 for new compatible.
Signed-off-by: Siddharth Vadapalli <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
---
.../bindings/net/ti,k3-am654-cpsw-nuss.yaml | 33 ++++++++++++++++---
1 file changed, 29 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml b/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml
index 821974815dec..900063411a20 100644
--- a/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml
+++ b/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml
@@ -57,6 +57,7 @@ properties:
- ti,am654-cpsw-nuss
- ti,j7200-cpswxg-nuss
- ti,j721e-cpsw-nuss
+ - ti,j721e-cpswxg-nuss
- ti,am642-cpsw-nuss
reg:
@@ -111,7 +112,7 @@ properties:
const: 0
patternProperties:
- "^port@[1-4]$":
+ "^port@[1-8]$":
type: object
description: CPSWxG NUSS external ports
@@ -121,7 +122,7 @@ properties:
properties:
reg:
minimum: 1
- maximum: 4
+ maximum: 8
description: CPSW port number
phys:
@@ -186,12 +187,36 @@ allOf:
properties:
compatible:
contains:
- const: ti,j7200-cpswxg-nuss
+ const: ti,j721e-cpswxg-nuss
then:
properties:
ethernet-ports:
patternProperties:
- "^port@[3-4]$": false
+ "^port@[5-8]$": false
+ "^port@[1-4]$":
+ properties:
+ reg:
+ minimum: 1
+ maximum: 4
+
+ - if:
+ not:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - ti,j721e-cpswxg-nuss
+ - ti,j7200-cpswxg-nuss
+ then:
+ properties:
+ ethernet-ports:
+ patternProperties:
+ "^port@[3-8]$": false
+ "^port@[1-2]$":
+ properties:
+ reg:
+ minimum: 1
+ maximum: 2
additionalProperties: false
--
2.25.1