The Rockchip RK356x SoCs currently have incorrect, or at least sub-optimal,`reg`
and `ranges` values in their DTS files' PCIe nodes. Ondřej Jirman sent a patch
in [1] to resolve this, but it was not merged due to some issues discovered
during testing (it fixed his issues with devices behind a switch, but broke
directly connected NVMe drives, amongst others - see [2]).
This patch is a reworked of that patch, using the same mappings the Rockchip BSP
kernel uses. Peter sent these up during the discussion in [3] and they've been
tested on his boards as well as Ondřej's, mine, and those of a few others.
Ondřej also sent a patch in [4] with these fixed ranges, but without the fix
for RK3568 as he was not able to test on that SoC. I've included the fixes for
both SoCs as he's happy with that and the patch has not yet been merged.
I have tested these ranges against devices which only map 32-bit ranges, devices
which only map 64-bit, and devices which require both. An Intel i350-T4 NIC does
not enumerate at all with the existing or previous patch's addresses, but works
quite happily with these, as do NVMe drives and every other device I've been
able to test.
MSI/MSI-X has also been tested as working, but does not currently work upstream
due to a workaround needed in the GIC driver which Rockchip are still yet to
issue an erratum for.
Thanks,
Andrew
[1] https://lore.kernel.org/linux-rockchip/[email protected]/
[2] https://lore.kernel.org/linux-rockchip/CAMdYzYq3S2rR3Kb61irpV9xHYijNiJY0mkVnJwPrpXzxg_Zh9g@mail.gmail.com/
[3] https://lore.kernel.org/linux-rockchip/CAMdYzYp6ShLqKxdiAjaRFiRF5i+wzfKiQvwPMzyQLAutWZbApg@mail.gmail.com/
[4] https://lore.kernel.org/all/[email protected]/
Andrew Powers-Holmes (1):
arm64: dts: rockchip: rk356x: Fix PCIe register and range mappings
arch/arm64/boot/dts/rockchip/rk3568.dtsi | 14 ++++++++------
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 7 ++++---
2 files changed, 12 insertions(+), 9 deletions(-)
base-commit: f0c4d9fc9cc9462659728d168387191387e903cc
--
2.38.0