2022-11-22 16:49:41

by Pierre Gondois

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Subject: [PATCH v3 0/2] arm/arm64: dts: Update cache properties for broadcom

This patch is the v3 of the update of broadcom dts:
https://lore.kernel.org/all/[email protected]/

v3:
- Update the missed dtsi: bcm2836.dtsi, bcm47622.dtsi, bcm63148.dtsi,
bcm63178.dtsi, bcm6756.dtsi, bcm6846.dtsi, bcm6855.dtsi, bcm6878.dtsi
- Split the patch between arch/[arm|arm64] folders

Note:
As the 'cache-unified' property is only required by the DT spec when there
is one of these properties in the cache node:
'cache-[size|line-size|block-size|sets|level]'
the 'cache-unified' property was added only when necessary, cf:
https://lore.kernel.org/all/[email protected]/#t

Pierre Gondois (2):
arm: dts: Update cache properties for broadcom
arm64: dts: Update cache properties for broadcom

arch/arm/boot/dts/bcm2711.dtsi | 1 +
arch/arm/boot/dts/bcm2836.dtsi | 1 +
arch/arm/boot/dts/bcm2837.dtsi | 1 +
arch/arm/boot/dts/bcm47622.dtsi | 1 +
arch/arm/boot/dts/bcm63148.dtsi | 1 +
arch/arm/boot/dts/bcm63178.dtsi | 1 +
arch/arm/boot/dts/bcm6756.dtsi | 1 +
arch/arm/boot/dts/bcm6846.dtsi | 1 +
arch/arm/boot/dts/bcm6855.dtsi | 1 +
arch/arm/boot/dts/bcm6878.dtsi | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi | 1 +
arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi | 1 +
arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi | 4 ++++
19 files changed, 22 insertions(+)

--
2.25.1


2022-11-22 17:15:56

by Pierre Gondois

[permalink] [raw]
Subject: [PATCH v3 2/2] arm64: dts: Update cache properties for broadcom

The DeviceTree Specification v0.3 specifies that the cache node
'compatible' and 'cache-level' properties are 'required'. Cf.
s3.8 Multi-level and Shared Cache Nodes
The 'cache-unified' property should be present if one of the
properties for unified cache is present ('cache-size', ...).

Update the Device Trees accordingly.

Acked-by: William Zhang <[email protected]>
Signed-off-by: Pierre Gondois <[email protected]>
---
arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi | 1 +
arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi | 1 +
arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi | 4 ++++
9 files changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
index dac9d3b4e91d..996412ed52a0 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
@@ -63,6 +63,7 @@ cpu3: cpu@3 {

l2: l2-cache0 {
compatible = "cache";
+ cache-level = <2>;
};
};

diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
index 3d016c2ce675..d5bc31980f03 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
@@ -51,6 +51,7 @@ B53_3: cpu@3 {

L2_0: l2-cache0 {
compatible = "cache";
+ cache-level = <2>;
};
};

diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi
index 04de96bd0a03..6f805266d3c9 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi
@@ -35,6 +35,7 @@ B53_1: cpu@1 {

L2_0: l2-cache0 {
compatible = "cache";
+ cache-level = <2>;
};
};

diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi
index 13629702f70b..b982249b80a2 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi
@@ -51,6 +51,7 @@ B53_3: cpu@3 {

L2_0: l2-cache0 {
compatible = "cache";
+ cache-level = <2>;
};
};

diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi
index c3e6197be808..a996d436e977 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi
@@ -51,6 +51,7 @@ B53_3: cpu@3 {

L2_0: l2-cache0 {
compatible = "cache";
+ cache-level = <2>;
};
};

diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi
index 0bce6497219f..62c530d4b103 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi
@@ -35,6 +35,7 @@ B53_1: cpu@1 {

L2_0: l2-cache0 {
compatible = "cache";
+ cache-level = <2>;
};
};

diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
index 29a880c6c858..ba3d5a98ccbc 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
@@ -50,6 +50,7 @@ B53_3: cpu@3 {
};
L2_0: l2-cache0 {
compatible = "cache";
+ cache-level = <2>;
};
};

diff --git a/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi b/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi
index fda97c47f4e9..18cdbc20f03f 100644
--- a/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi
+++ b/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi
@@ -79,6 +79,7 @@ A57_3: cpu@3 {

CLUSTER0_L2: l2-cache@0 {
compatible = "cache";
+ cache-level = <2>;
};
};

diff --git a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
index 8f8c25e51194..e05901abe957 100644
--- a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
+++ b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi
@@ -108,18 +108,22 @@ cpu@301 {

CLUSTER0_L2: l2-cache@0 {
compatible = "cache";
+ cache-level = <2>;
};

CLUSTER1_L2: l2-cache@100 {
compatible = "cache";
+ cache-level = <2>;
};

CLUSTER2_L2: l2-cache@200 {
compatible = "cache";
+ cache-level = <2>;
};

CLUSTER3_L2: l2-cache@300 {
compatible = "cache";
+ cache-level = <2>;
};
};

--
2.25.1

2022-11-29 00:07:27

by Florian Fainelli

[permalink] [raw]
Subject: Re: [PATCH v3 2/2] arm64: dts: Update cache properties for broadcom

On Tue, 22 Nov 2022 17:32:07 +0100, Pierre Gondois <[email protected]> wrote:
> The DeviceTree Specification v0.3 specifies that the cache node
> 'compatible' and 'cache-level' properties are 'required'. Cf.
> s3.8 Multi-level and Shared Cache Nodes
> The 'cache-unified' property should be present if one of the
> properties for unified cache is present ('cache-size', ...).
>
> Update the Device Trees accordingly.
>
> Acked-by: William Zhang <[email protected]>
> Signed-off-by: Pierre Gondois <[email protected]>
> ---

Applied to https://github.com/Broadcom/stblinux/commits/devicetree-arm64/next, thanks!
--
Florian